EEL4720/5721 Reconfigurable Computing

Greg StittAssociate Professor

Instructors Dr. Greg Stitt

gstitt@ece.ufl.edu http://www.gstitt.ece.ufl.edu Office Hours: M Period 2, W Period 4

(Benton 323) Also, by appointment

TAs Nayanatara Kolhapuri Suresh

(nkolhapurisuresh@ufl.edu) Seyed Mehrdad Hashemi (hashemi@ufl.edu)

Course Website 2 sites

http://www.gstitt.ece.ufl.edu/courses/eel4720_5721/ Linked off my website Includes all slides, labs, reading assignments,

announcements, etc. Canvas

http://lss.at.ufl.edu/ Select Canvas Login with GatorLink account

Used for posting grades, turning in projects, student discussions

Email Policy When sending an email, include the class name in

brackets e.g. [EEL5721] Question about project 2

Grading Grading:

Mid-term 1: 25% (Wed. October 14th) Mid-term 2: 25% (Wed. December 9th) Labs: 25% Project: 25%

Tests will be 50 minutes, during normal class time

EDGE students have 3 day window for tests October 13th-15th and December 7th-9th

Final grade: curved average of all components 5721 may possibly have different tests,

project, or grading

Lab Assignments Linked off main website

http://www.gstitt.ece.ufl.edu/courses/eel4720_5721/labs/

Intended to familiarize with FPGA boards, VHDL

Initial labs will be individual Groups allowed when using boards

There are ~100 students in this class and ~10 boards

Will announce group policies when discussing corresponding labs

Likely 2 people per group

Research Project 2 options

Assigned project Proposed project

Assigned project Most of the class will do this project There will be several alternatives for different

group sizes EDGE students will have a project appropriate for a

individual participant EDGE students can participate in groups if desired

Important: I will require a minimum number of groups to deal with the small number of boards

Research Project, Cont. Proposed project

Topic subject to instructor approval Due to the limited number of boards, the proposed

project option must be earned Will allow those with best grades or project ideas to do their

own project Suggestion: find algorithm in your area of interest,

use reconfigurable computing to improve performance

Image processing, bioinformatics, physics, chemistry, AI, etc.

If interested in research, email me later in the semester

Will try to find a project that helps towards PhD

Reading Material

No required textbook Optional books on website and in syllabus

Research papers Check class website for material

associated with each lecture Will also post slides when used

Important: VHDL resources posted on website

Prerequisites You should be familiar with basics of:

Digital design Registers, muxes, adders, finite-state

machines, etc. Architecture

Controller+Datapath Memories Pipelining

Assumes no knowledge of reconfigurable computing or VHDL

Goals Understanding of issues related to RC

(reconfigurable computing) Architectures Tools Design methodologies Performance analysis Etc.

Detailed investigation of a specific application Research project

Publish! Outstanding projects will be submitted to

conferences

Academic Dishonesty Unless told otherwise, labs and homework

assignments must be done individually All assignments will be checked for cheating

Groups must obtain permission to use larger size May be allowed for difficult projects

Collaboration is allowed (and encouraged), but within limits

Can discuss problems, how to use tools etc. Cannot show code, solutions, etc.

I will be using automatic cheat checking Cheating penalties

First instance - 0 on corresponding assignment Second - 0 for entire class

Attendance Policy Attendance is optional, but highly

recommended If you are not an EDGE student, please don’t

disappear! I answer a lot of questions before and after lecture I will not be pleased if you come to my office or

send me an email with the same questions If you are sick, stay at home!

If obviously sick, you will be asked to leave Missed tests can be retaken with doctor’s note

What is Reconfigurable Computing?

Reconfigurable computing (RC) is the study of architectures that can adapt (after fabrication) to a specific application or application domain Involves architecture, tools, CAD, design

automation, algorithms, languages, etc.

What is Reconfigurable Computing?

Alternatively, RC is a way of implementing circuits without fabricating a device

Essentially allows circuits to be implemented as “software” Circuits are no longer synonymous with hardware

RC devices are programmable by downloading bits, just like microprocessors

Difference is that microprocessor bits specify instructions, whereas RC bits specify circuit structures

Processor Processor

001010010

0010…

Bits loaded into program memory

Microprocessor Binaries

ba

cx

y

001010010

FPGA Binaries (Bitfile)

Processor FPGA0010…

Bits loaded into logic blocks, switch matrices, memories, etc.

Why is RC important? Performance

Often orders of magnitude faster than microprocessors Low power consumption

A few RC devices can provide similar performance as large cluster at a fraction of the power

Also smaller, cheaper, etc. Motivating example: Novo-G

FPGA-based supercomputer 192 large Altera Stratix III FPGAs 24 Linux nodes Speedups of 100,000x to 550,000x for

computation biology apps (compared to 2.4 GHz Opteron)

Performance similar to top supercomputers However, power consumption is only 8

kilowatts compared to 2-7 megawatts

Reminders

URGENT Lab 0 – Vivado and VHDL Tutorial Start reading VHDL tutorial on class

website

Read RC survey linked off website