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By Engr. Hoo Mow Heng Topic 5: Integrated Circuit Packaging Technology

EE503 Topic 5

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Page 1: EE503 Topic 5

By Engr. Hoo Mow Heng

Topic 5: Integrated Circuit

Packaging Technology

mnma20
Text Box
By En. Mohd Noralimi Mohd Ali
Page 2: EE503 Topic 5

IntroductionIntroduction

• Chips that pass the wafer sort test undergo final assembly and packaging.

• IC final assembly separates each good die from the wafer and attaches the die to a from the wafer and attaches the die to a metal leadframe or substrate. IC packaging encloses the die in a protective package.

Page 3: EE503 Topic 5

Steps In IC Final AssemblySteps In IC Final Assembly• IC final assembly consists of four steps:

1. Backgrind2. die separation3. die attach 4. Wire bonding

• Backgrind reduces the wafer thickness to the appropriate • Backgrind reduces the wafer thickness to the appropriate dimension.

• Die separation cuts each die from the wafer. • Die attach is the physical attachment of the die to the

leadframe or substrate. • Wirebonding attaches fine-diameter wires between die

bonding pads and the terminals of the leadframe to form electrical connections.

• All assembled and packaged chips undergo a final electrical test for IC reliability.

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Traditional Assembly and PackagingTraditional Assembly and Packaging

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Wafer Saw and Sliced Wafer

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Die Attach ProcessDie Attach Process

• Die attach is done by epoxy attach, eutectic attach and glass frit attach.

• The common epoxy attach method bonds the chip to the leadframe using epoxy. chip to the leadframe using epoxy.

• Eutectic attach, common for bipolar ICs, uses a thin film of gold on the backside of the wafer that is alloyed with the metallized surface of the leadframe.

• Glass frit attach uses a mixture of silver and glass in an organic medium to attach chips in a ceramic package.

Page 7: EE503 Topic 5

Typical Leadframe for Die Attach

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Epoxy Die Attach

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Tie Bar Removal from Leadframe

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Au-Si Eutectic Attach

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Wire Bonding Process Wire Bonding Process • The three basic types of wirebonding are: thermocompression bonding, ultrasonic bondingand thermosonic ball bonding.

• Thermal energy and pressure are used in Thermocompression Bonding. Thermocompression Bonding.

• Ultrasonic Bonding is based on ultrasonic energy and pressure to form a wedge bond between the wire and pad.

• Thermosonic Ball Bonding combines ultrasonic energy, heat and pressure to form a ball bond.

Page 12: EE503 Topic 5

Wirebonding Chip to Leadframe

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Thermocompression Bonds

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Ultrasonic Wirebonding Sequence

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Thermosonic Ball Bond

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Functions of IC packagingFunctions of IC packaging

1. Protection from the environment and handling damage.

2. Interconnections for signals into and out of the chip.chip.

3. Physical support of the chip.

4. Heat dissipation.

Page 17: EE503 Topic 5

Inside of an ordinary IC package

(dual in-line package)

(encapsulation)

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IC packaging materialIC packaging material

1. Plastic ▫ Plastic packaging uses an epoxy polymer to

encapsulate the wirebonded die and leadframe. This technology has many different types of plastic packages.packages.

2. Ceramic▫ Ceramic packaging is used for state-of-the-art IC packages

that require either maximum reliability or high-power. ▫ The two main types of ceramic packaging are either a

refractory (high temperature) ceramic or ceramic DIP (CERDIP) technology.

▫ Both have a hermetic seal (sealed against moisture).

3. Metal

Page 19: EE503 Topic 5

Plastic PackagesPlastic Packages

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CERDIP PackageCERDIP Package

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Ceramic with Pin Grid ArrayCeramic with Pin Grid Array

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Advanced IC Packaging TechniquesAdvanced IC Packaging Techniques

• New packaging designs are being introduced to provide for more reliable, faster and higher-density circuits at lower cost.

• Advanced packaging designs include:• Advanced packaging designs include:

1. Flip chip

2. Ball grid array (BGA)

3. Multichip module (MCM)

4. Chip-on-board (COB)

5. Ttape automated bonding (TAB)

6. Chip scale package (CSP)

Page 23: EE503 Topic 5

Flip Chip Package

Flip chip packaging mounts the active side of a chip toward the

substrate. It uses bump technology (typically solder bumps) to

form the interconnection between the chip and substrate. An

epoxy underfill is used around the area-array of bumps to

improve reliability.

Page 24: EE503 Topic 5

Ball Grid Array

Ball grid array (BGA) uses a ceramic or plastic substrate with an

area array of solder balls to connect the substrate to the circuit

board. To lower costs, this technology is readily integrated into

standard surface mount assembly.

Page 25: EE503 Topic 5

Multichip Module (MCM)

Multichip module (MCM) has several die assembled onto one

substrate. This permits a higher density of chips.

Page 26: EE503 Topic 5

Chip on Board (COB)

Chip on board (COB) mounts IC chips directly to the substrate,

along side other surface mount (SMT) or pin-in-hole (PIH)

components.

Page 27: EE503 Topic 5

Tape Automated Bonding (TAB)

Tape automated bonding (TAB) uses a plastic tape as a chip

carrier. The tape has a thin copper foil that is etched to form the

leads. The chip and leads are removed from the carrier prior to

assembly onto the circuit board.

Page 28: EE503 Topic 5

• Chip scale packaging (CSP) has an IC package that is about the same size as the silicon chip (< 1.2 times the footprint of the die). 1.2 times the footprint of the die).

• This is a fast growing method of advanced packaging, and provides for lower cost, lower weight and lower thickness.