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EE241
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UC Berkeley EE241 B. Nikolic
EE241 - Spring 2002Advanced Digital Integrated Circuits
Lecture 14Low Power Design
Systems Perspective
UC Berkeley EE241 B. Nikolic
Announcementsl Project reports/postersl Due Thursday 3/21 10am; poster
presentations are in BWRC 11-12:30.» Title/names/e-mails, abstract» Motivation» Problem statement» Possible solutions from literature» Proposed comparison/solution» Conditions/assumptions» Analysis» Outline of proposed design work» Conclusion» References
EE241
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UC Berkeley EE241 B. Nikolic
Literature• Chapter 4, Low-Voltage Technologies, by
Kuroda and Sakurai• Chapter 3, Techniques for Leakage Power
Reduction, by De, et al.• Materials by T. Sakurai, ISSCC Workshop,
2001• K. Yano, SSTC Workshop 2000.
UC Berkeley EE241 B. Nikolic
VDD and VTH Control
Active Stand-byMultiple VTH Multi-VTH MTCMOSVariable VTH VTH hopping VTCMOSMultiple VDD Multi-VDD Boosted gate MOSVariable VDD DVS
Spatial control: multiple VDDs, VTHsTemporal control: variable VDDs, VTHs
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UC Berkeley EE241 B. Nikolic
Multiple Supplies
Lower VDD portion is shaded
CVS StructureConventional Design
Critical Path
Level-Shifting F/F
Critical Path
FF
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M.Takahashi, ISSCC’98. “Clustered voltage scaling”
UC Berkeley EE241 B. Nikolic
Multiple SuppliesCVS Layout:
Usami’98
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UC Berkeley EE241 B. Nikolic
Level Converting Flip-Flop
CK
CK
CLK CK
CK
D
VL
CK
Q
CK
VH
M1 M2
CK
UC Berkeley EE241 B. Nikolic
Leakage Components
Courtesy of IEEE Press, New York. 2000
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UC Berkeley EE241 B. Nikolic
Leakage Components1. pn junction reverse bias current2. Weak inversion3. Drain-induced barrier lowering (DIBL)4. Gate-induced drain leakage (GIDL)5. Punchthrough6. Narrow width effect7. Gate oxide tunneling8. Hot carrier injection
UC Berkeley EE241 B. Nikolic
Leakage Componentsl Drain-induced barrier lowering (DIBL)
» Voltage at the drain lowers the source potential barrier
» Lowers VT, no change on S
l Gate-induced drain leakage (GIDL)» High field between gate and drain
increases injection of carriers into substrate -> leakage (band-to-band leakage)
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UC Berkeley EE241 B. Nikolic
DIBL, GIDL, Weak Inversion
Courtesy of IEEE Press, New York. 2000
UC Berkeley EE241 B. Nikolic
Stack Effect
NAND gate:
Reduction:
Courtesy of IEEE Press, New York. 2000
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UC Berkeley EE241 B. Nikolic
Gate Leakage
Courtesy of IEEE Press, New York. 2000
Trends Tunneling at thin oxides
UC Berkeley EE241 B. Nikolic
Working with Leakagel Design time techniquesl Multi VTH
» Gate level/Synthesis approaches» “Random modulation”» Transistor-level multi-VTH design
l Standby/runtime leakage control» MTCMOS/ power-down» Substrate bias (VTCMOS)
– Self-substrate bias (SSB)– Self-adjusting threshold voltage (SAT)– Standby power reduction (SPR)– SAT+SPR
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UC Berkeley EE241 B. Nikolic
Using Multiple Thresholds
Yano, SSTCW’00
UC Berkeley EE241 B. Nikolic
Dual VT Domino
Courtesy of IEEE Press, New York. 2000
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UC Berkeley EE241 B. Nikolic
Techniques for Burst Mode Computation
UC Berkeley EE241 B. Nikolic
MTCMOS
Courtesy of IEEE Press, New York. 2000
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UC Berkeley EE241 B. Nikolic
SLEEP High VT
SLEEP High VT
CLK
SLEEP High VT
SLEEP High VT
[Mutoh95]
Latch Design in MTCMOS
UC Berkeley EE241 B. Nikolic
Sleep TransistorHigh-VTH transistor has to be very large for low resistancein linear region. Low-VTH transistor needs much less areafor the same resistance.
[R. Krishnamurthy]
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UC Berkeley EE241 B. Nikolic
Boosted-Gate MOS (BGMOS)
Leak cut-off Switch (LS)- high VTH- thick TOX
VDD
Virtual VSS
CMOS circuits- low VTH- ultra thin TOX
T.Inukai, CICC'00.0VVDD
VBOOST
<Standby> <Active>
Eliminates tunneling
UC Berkeley EE241 B. Nikolic
VTCMOS Variants
Courtesy of IEEE Press, New York. 2000
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UC Berkeley EE241 B. Nikolic
Normalized Delay vs VDD & VTH
Sakurai, Kuroda
VTH (V)
0 0.2 0.4 0.7 1
1.5 V
3.0 V
5.0 V
0.6
1.0
1.4
1.8
No
rmal
ized
Del
ay 0.15V
VDD =1.0 V
0.05V
? VTH
0.5
UC Berkeley EE241 B. Nikolic
Self-Adjusting Threshold-Voltage Scheme (SATS)
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UC Berkeley EE241 B. Nikolic
SATS Experimental Results
UC Berkeley EE241 B. Nikolic
Substrate Bias Effect
BSTBSFTTH VVVVV 100 2 γ−≈−φγ−=
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UC Berkeley EE241 B. Nikolic
Techniques for Burst Mode Computation
UC Berkeley EE241 B. Nikolic
Standby Power Reduction (SPR)
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UC Berkeley EE241 B. Nikolic
SPR Waveforms (SPICE)
UC Berkeley EE241 B. Nikolic
VT (Variable Threshold-Voltage) CMOS
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UC Berkeley EE241 B. Nikolic
Substrate Bias in VT
Kuroda, JSSC 11/96
UC Berkeley EE241 B. Nikolic
VTCMOS vs. MTCMOS