Chapter 5Chapter 5Field Effect TransistorsField Effect Transistors

Field Effect Transistors (FETs)Field Effect Transistors (FETs)OBJECTIVES:• describe the construction and basic operation of FETs• identify FET schematic symbols.• understand JFET parameters.• explain the information carried in FET data sheets.• identify the different FET DC bias circuits.• determine the DC operating point of FET DC bias circuits.• identify the characteristics that FET amplifiers have in common with

BJT amplifiers.• Explain the operation and characteristics of metal oxide

semiconductor field effect transistors (MOSFET)• identify the different MOSFET DC bias circuits.• explain the advantages and disadvantages of FET amplifiers

compared to BJT amplifiers.• apply troubleshooting principles to FET amplifiers.

IntroductionIntroduction

1. Field effect transistors control current by voltage applied to the gate.

1. The FET’s major advantage over the BJT is high input resistance.

1. Overall, the purpose of the FET is the same as that of the BJT.

BJT vs JFETBJT vs JFET

BipolarJunctionTransistor

• Current-based device• IBase controls ICollectorEmitter

JunctionFieldEffectTransistor

•Current-based device•VGate controls ISourceDrain

The JFET – Primary CharacteristicsThe JFET – Primary Characteristics• Junction field effect transistor controls current flow.

• The JFET uses voltage to control the current flow.

• You will recall, the transistor uses current flow through the base-emitter junction to control current.

• JFETs can be used as an amplifier just like the BJT.

• VGG voltage level controls current flow in the VDD, RD circuit.

The JFET - LabelsThe JFET - Labels

The terminals of a JFET are the source, gate, and drain.

A JFET can be either p channel or n channel.

The JFET - BiasingThe JFET - Biasing

• The “source-drain” current is controlled by a voltage field at the “gate”.

• That field is developed by the reverse biased gate-source junction (gate is connected to both sides).

• With more VGG (reverse bias) the field grows larger.

• This field or resistance limits the amount of current flow through RD.

• With low or no VGG current flow is at maximum.

The JFET – Current ControlThe JFET – Current Control

(a) Mid-Bias for moderate current flow

(b) Max-Bias for “Pinch-off” (no current flow)

(c) Lo-Bias for maximum current flow

JFET Characteristics and Parameters OhmicJFET Characteristics and Parameters OhmicLet’s first take a look at the effects with a VGS of 0V. ID increases proportionally with increases of VDD (VDS increases as VDD is increased). This is called the ohmic region (point A to B).

JFET Characteristics and Parameters Pinch-Off JFET Characteristics and Parameters Pinch-Off The point when ID ceases to increase regardless of VDD increases (constant current source) is called the pinch-off voltage (point B) (Note: VGS = 0). This current is called maximum drain current (IDSS). Breakdown (point C) is reached when too much voltage is applied. This is undesirable, so JFETs operation is always well below this value.

JFET Characteristics and Parameters Drain CurvesJFET Characteristics and Parameters Drain CurvesFrom this set of curves you can see increased negative voltage applied to the gate (-VGS) produces no change in ID. ID is limited and the pinch-off voltage (VP) is reduced. Note: VGS controls IDSS

This is the normal work zone for a JFETThis is the normal work zone for a JFET

JFET Characteristics and Parameters CutoffJFET Characteristics and Parameters Cutoff

We know that as VGS is increased ID will decrease. The point that ID ceases to increase is called cutoff. The amount of VGS required to do this is called the cutoff voltage (VP). The field (in white) grows such

that it allows practically no current to flow through.

It is interesting to note that pinch-off voltage (VGS(off)) and cutoff voltage (VP) are the same value but opposite polarity.

Pinch-Off Pinch-Off “Vp”“Vp” vs Cutoff vs Cutoff “V“VGS(off)GS(off)””

• VGS(off) and VP are always = and opposite is sign• VP(inch off) - the value of VDS where ID becomes constant with

VGS = 0.• VP(inch off) also occurs for VDS<VP if VGS ≠ 0.

Note: Although VP is constant, VDSmin where ID is constant, varies.

VGS(off)= -5VVp=+5V

JFET Characteristics and ParametersJFET Characteristics and ParametersThe transfer characteristic curve illustrates the control VGS has on ID from cutoff (VGS(off) ) to pinch-off (VP). Note the parabolic shape. The formula below can be used to determine drain current.

ID = IDSS (1 - VGS/VGS(off))2 Note:(VGS = 0 to VGS(off) controls ID)

Square-law device: Parabolic curve of the JFET Transfer Characteristic Curve.

VGS(OFF)

Vp

JFET Characteristics and ParametersJFET Characteristics and ParametersForward transfer conductance (gm) of JFETs is generally considered as Forward Transconductance.

It is the non-linear changes in ID based on changes in VGS.

gm = ∆ID/∆VGS

Note: This is a parallel concept of Voltage Gain

gm2

gm1

JFET Characteristics and ParametersJFET Characteristics and Parameters

Input resistance for a JFET is high since the gate-source junction is reverse-biased.

RIN = lVGS/IGSSl where: IGSS is the “gate reverse current”

@ a certain “gate-to-source” voltage.

Drain-to-source resistance is the ratio of changes of VDS to ID. Large changes in VDS produce very small changes in ID.

r´ds = ∆VDS/ ∆ID

However, the capacitive effects can offset this advantage, particularly at high frequencies. (remember varactors !!)

JFET BiasingJFET Biasing

Just as we learned that the bipolar junction transistor must be biased for proper operation, the JFET must also be biased for operation.

Let’s look at some of the methods for biasing JFETs.

In most cases the ideal Q-point will be the middle of the transfer characteristic curve, which is about half of the IDSS.

JFET Biasing – Self BiasJFET Biasing – Self Bias

Self-bias is the most common type of biasing method for JFETs. No voltage is applied to the gate. The voltage to ground from here will always be 0V. However, the voltage from gate to source (VGS) will be positive for n channel and negative for p channel keeping the junction reverse-biased. This voltage can be determined by the formulas below.

ID = IS for all JFET circuits.

(n channel) VGS = +IDRS

(p channel) VGS = -IDRS

VGS

VGS

JFET Biasing - Q-PointJFET Biasing - Q-PointSetting the Q-point requires us to determine a value of RS that will give us the desired ID and VGS . The formula below shows the relationship.

RS = | VGS/ID |

To be able to do that we must first determine the VGS and ID from the either the transfer characteristic curve or more practically from the formula below. The data sheet provides the IDSS and VGS(off).

VGS is the desired voltage to set the bias.

ID = IDSS(1 - VGS/VGS(off))2 Transfer characteristic curve

V

JFET Biasing – Midpoint Biasing JFET Biasing – Midpoint Biasing

Since midpoint biasing is most common, let’s determine how this is done.

Step 1. The values of RS and RD

determine the approximate midpoint bias. Half of IDSS would be ID midpoint. The VGS to establish this can be determined by the formula below.

Step 2. VGS ≅ VGS(off)/3.4

IDmidV2ID = IDSS when VGS = VGS(OFF)/3.4

JFET BiasingJFET Biasing

The value of RS needed to establish the computed VGS can be determined by the previously discussed relationship below.

Step 3. RS = | VGS/ID |

The value of RD needed can be determined by taking half of VDD

and dividing it by ID.

Step 4. RD = (VDD/2)/ID

V

JFET Biasing - SummaryJFET Biasing - Summary

Remember the purpose of biasing is to set a point of operation (Q-point). In a self-biasing type JFET circuit the Q-point is determined by the given parameters of the JFET itself and values of RS and RD. Setting it at midpoint on the drain curve is most common.

One thing not mentioned in the discussion was RG . Its value is arbitrary but it should be large enough to keep the input resistance high.

JFET Biasing – Graphical AnalysisJFET Biasing – Graphical Analysis

The transfer characteristic curve along with other parameters can be used to determine the midpoint bias Q-point of a self-biased JFET circuit.

First determine the VGS at IDSS from the formula below.

VGS = -IDRS

#1 VGS = -IDRS = (0)(470Ω) = 0V

#2 VGS = -IDRS=(10mA)(470Ω)= -4.7V

Where the two lines intersect gives us the ID and VGS (Q-point) needed for midpoint bias. Note that load line extends from VGS(off)(ID= 0A) to VP(ID = IDSS)

#1#2

Load Line

(ID = IDSS/2)Intersect

JFET Biasing – Voltage-DividerJFET Biasing – Voltage-Divider

Voltage-divider bias can also be used to bias a JFET. R1 and R2 are used to keep the

gate-source junction in reverse bias. Operation is no different from self-bias. Determining ID & VGS for a JFET voltage-

divider circuit with VD given can be

calculated with the formulas below.

VS = IDRS

VG = (R2/R1 + R2)VDD

VGS = VG - VS

ID = (VDD – VD)/RD

JFET Biasing – Graphical AnalysisJFET Biasing – Graphical Analysis

In using the transfer characteristic curve to determine the approx. Q-point, we must establish the two points for the load line.

The 1st point is for ID = 0.

(Note: VGS = VG when ID = 0).

VGS = VG = (R2/R1 + R2)VDD

The 2nd point is ID when VGS

is 0.ID = VG/RS

2nd pt.

1st pt.

Intersect

JFET Biasing – gm variableJFET Biasing – gm variable

Transfer characteristics can vary for JFETs of the same type (just like the β of a transistor).

This will adversely affect the Q-point. The voltage-divider bias is less affected by this than self-bias.

This is an undesirable problem that in extreme cases would require trying several of the same type until you find one that works within the desired range of operation.

Q-Point InstabilityQ-Point Instability

• Shaded area between Q1 and Q2 illustrates the variability of Q-point with changes in the transfer characteristics (gm) of a selection of replacement JFETs.

• Self-bias exerts no control over gm variability.

• Voltage-divider bias offers some improvement.

The MOSFETThe MOSFETThe metal oxide semiconductor field effect transistor (MOSFET) is the second category of FETs. The chief difference is that there is no actual pn junction as the p and n materials are insulated from each other. MOSFETs are static sensitive devices and must be handled by appropriate means.

These are depletion MOSFETs (D-MOSFET). Note the differences in construction with the E-MOSFETs on next slide)

D-MOSFETD-MOSFET

These are depletion MOSFETs (D-MOSFET). Interestingly, they can also be biased to operate as enhancement mode D-MOSFETS

Note the differences in construction with the E-MOSFETs on next slide)

E-MOSFET – has no physical channelE-MOSFET – has no physical channel

The enhancement MOSFET (E-MOSFET) has no structural channel. The channel is “induced” thru biasing. For an n-channel device, a +VG induces a channel to form (must exceed a threshold voltage).

No Channel

The D-MOSFET – Depletion ModeThe D-MOSFET – Depletion Mode

The D-MOSFET can be operated in depletion or enhancement modes. To be operated in depletion mode, the gate is made more negative effectively narrowing the channel or depleting the channel of electrons.

Note the “solid” lines indicating D_MOSFET.

The D-MOSFET – Enhancement ModeThe D-MOSFET – Enhancement Mode

To be operated in the enhancement mode the gate is made more positive, attracting more electrons into the channel for better current flow. Remember we are using n channel MOSFETs for discussion purposes. For p channel MOSFETs, polarities would change.

The E-MOSFETThe E-MOSFET

The E-MOSFET or enhancement MOSFET can operate in only the enhancement mode. With a positive voltage on the gate the p substrate is made more conductive.

Note: Broken line indicates E_MOSFET

Power MOSFETsPower MOSFETs

The lateral double diffused MOSFET (LDMOSFET) and the V-groove MOSFET (VMOSFET) are specifically designed for high power applications.

Dual gate MOSFETs have two gates, which helps control unwanted capacitive effects at high frequencies.

LDDMOSFETVMOSFET

Dual Gate MOSFET

MOSFET Characteristics and ParametersMOSFET Characteristics and Parameters

Since most of the characteristics and parameters of MOSFETs are the same as JFETs we will cover only the key differences.

D-MOSFET Characteristics and ParametersD-MOSFET Characteristics and ParametersFor the D-MOSFET we have to also consider its enhancement mode. Calculating ID with given parameters in the enhancement mode and depletion mode is the same. Note this equation is no different for ID than JFETs and the transfer characteristics are similar except for its effect in the enhancement mode.

ID = IDSS(1 - VGS/VGS(off)) 2

Remember n and p channel polarity differences.

E-MOSFET Characteristics and ParametersE-MOSFET Characteristics and Parameters

The E-MOSFET for all practical purposes does not conduct until VGS

reaches the threshold voltage (VGS(th)). ID when it is when conducting

can be determined by the formulas below. The constant K must first be determined. ID(on) is a data sheet given value.

K = ID(on) /(VGS - VGS(th))2

ID = K(VGS - VGS(th))2

MOSFET BiasingMOSFET BiasingThe three ways to bias a MOSFET are zero-bias, voltage-divider bias, and drain-feedback bias.

For D-MOSFET, zero biasing as the name implies has no applied bias voltage to the gate. The input voltage swings it into depletion and enhancement mode. VGS = 0, ID = IDSS therefore, no amplification, input isolation only.

MOSFET BiasingMOSFET Biasing

For E-MOSFETs, no zero biasing. Voltage-divider bias used to set the VGS greater

than the threshold voltage (VGS(th)). ID can

be determined as follows. To determine VGS, normal voltage divider methods can

be used. The following formula can now be applied.

K = ID(on)/(VGS - VGS(th)) 2

ID = K(VGS -VGS(th)) 2

VDS can be determined by application of Ohm’s law and Kirchhoff’s voltage law to the drain circuit.

MOSFET BiasingMOSFET Biasing

With drain-feedback bias there is no voltage drop across RG making VGS = VDS. With VGS given determining ID can be accomplished by the formula below.

ID = VDD - VDS/RD

TroubleshootingTroubleshooting

As always, having a thorough knowledge of the devices makes it easier to utilize them for troubleshooting circuits. We will discuss some of the common faults associated with FET circuits.

Experience in troubleshooting is the best teacher, and having basic theoretical knowledge is extremely helpful.

TroubleshootingTroubleshooting

If VD = VDD in a self-biased JFET circuit, it could be one of several opens. It is a clear indication of no drain current. Use of senses to check for obvious failures is the first and easiest step. Replace the FET only if associated components are known to be good.

If VD is less than normal in a self-biased JFET circuit, an open in the gate circuit is more than likely the problem. The low drain voltage would be indicative of more drain current flowing than normal.

less

TroubleshootingTroubleshooting

In a zero-biased D-MOSFET or drain-feedback biased E-MOSFET, an open in the gate circuit is more difficult to detect. It may seem to be biased properly with dc voltages but will fail to work properly when an ac signal is applied.

This is a classic FET fault!!

TroubleshootingTroubleshooting

With a voltage-divider biased E-MOSFET, circuit faults are more easily detected. With an open R1 there is no drain current, so the VD = VDD. With an open R2 full VDD is applied to the gate turning it on fully. VD = 0

SummarySummary

JFETs are unipolar devices.

JFETs have three terminals: source, gate, and drain.

JFETs have a high input resistance since the gate-source junction is reverse-biased.

IDSS for all FETs is the maximum amount of current flow in the drain circuit when VGS is 0V.

All FETs must be biased for proper operation. Midpoint is most common for use in amplifiers.

Unwanted capacitance associated with FETs can be dealt with by using dual gate-type FETs.

SummarySummary

E-MOSFETs have no physical channel. A channel is induced with VGS greater than VGS(th).

There are special MOSFET designs for high power applications.

E-MOSFETs have no IDSS parameter.

MOSFETs differ in construction in that the gate is insulated from the channel. D-MOSFETs can operate in both depletion and enhancement modes. E-MOSFETs can only operate in the enhancement mode.