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Messung Systems NEXGEN PLC I/O Modules
High Speed Mix Analog Input Output Module(4366) Published July 2002Document No.: ED-2002-020/V1.0 Page 1 of 30
NEXGEN Series of PLCs
High Speed Mix Analog I/O Module
(Ordering Code 4366)
Document No.:ED-2002-020
Version: 1.0
Published July 2002
MESSUNG SYSTEMSEL-2, J- Block MIDC Bhosari,
Pune 411026.(INDIA)
Tel: (+91)-020-712 0807, 712 2807.Email : [email protected]
WEB: www.messung.com
mailto:[email protected]:[email protected]://www.messung.com/http://www.messung.com/http://www.messung.com/mailto:[email protected]8/12/2019 ED-2002-020 High Speed Mix Analog Input Output Module (4366).pdf
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Revision
Version Date Description
1.0 22 May 2004 High Speed Mix Analog I/O Module(Ordering Code 4366)
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INDEX
1. Module Overview..............................................................................................................5
1.1 High Speed Mix Analog Module Overview..................................................................5 1.2 LED Indications...........................................................................................................7 1.3 General Specifications................................................................................................7
2. Module Operation .............................................................................................................8
2.1 Block Diagram.............................................................................................................8 2.2 Input Range ................................................................................................................9 2.3 Output Range............................................................................................................11 2.4 On-Board Processor Operations...............................................................................12
2.4.1 Power On Operations..........................................................................................12 2.4.2 Analog to Digital Conversion...............................................................................13 2.4.3 Digital Filter .........................................................................................................13 2.4.4 Digital to Analog Conversion...............................................................................14
2.5 Module Information ...................................................................................................15
2.5.1 Input Output Image Mapping...............................................................................15 2.5.2 Memory Mapping ................................................................................................16 2.5.3 Module Status Bits ..............................................................................................17
3. Installations and Wiring...................................................................................................18
3.1 Module Installation....................................................................................................18 3.2 Connection Details....................................................................................................18 3.3 Precautions to be taken ............................................................................................20
4. Configuration and Programming.....................................................................................21
4.1 Slot Configuration .....................................................................................................21 4.2 Data Information to Module.......................................................................................22
4.2.1 Analog Input Channel enable/ disable ................................................................22
4.2.2 Analog Output Channel Data ..............................................................................23 4.2.3 Digital Filter .........................................................................................................23 4.3 Analog Input Channel Data.......................................................................................23 4.4 Module Scan Time ....................................................................................................23 4.5 Programming with Nexgen 4000 CPU......................................................................24 4.6 Programming with Nexgen 5000 CPU......................................................................24
INDEX OF FIGURES
Figure 1 : Front View of High Speed Mix Analog Module..........................................................6 Figure 2 : Block diagram of High Speed Mix Analog Module ....................................................8
Figure 3 :Data Range of Analog Input Voltage Signal...............................................................9 Figure 4 :Data Range of Analog Input Current Signal.............................................................10 Figure 5 :Data Range of Analog Output Voltage Signal..........................................................11 Figure 6 :ADC Coversion Cycle ..............................................................................................13 Figure 7 : Digital Filter Action ..................................................................................................14 Figure 8 : Input Output Image Mapping of High Speed Mix Analog Module ...........................15 Figure 9 : Memory Mapping of High Speed Mix Analog Module............................................16 Figure 10 :Connection diagram of High Speed Mix Analog Module .......................................19
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Guidelines for the Safety of the user and protectionof I/O Modules.
This manual provides information for the use of the I/O Modules . Themanual has been written to be used by trained and competent personnel.
The definition of such a person or persons is as follows:a) Any engineer who is responsible for the planning, design andconstruction of automatic equipment using the product associated withthis manual should be of a competent nature, trained and qualified tothe local and national standards required to fulfill that role. Theseengineers should be fully aware of all aspects of safety with regards toautomated equipment.
b) Any commissioning or service engineer must be of a competent nature,trained and qualified to the local and national standards required tofulfill that job. These engineers should also be trained In the use andmaintenance of the completed product. This Includes being completelyfamiliar with all associated documentation for the said product. Allmaintenance should be carried out in accordance with established
safety practices.c) All operators of the completed equipment should be trained to use thatproduct in a safe and coordinated manner in compliance to establishedsafety practices. The operators should also be familiar withdocumentation, which is connected with the actual operation of thecompleted equipment.
Note: The term-completed equipment refers to a third party constructeddevice, which contains or uses the product associated with this manual.Note on the Symbol used in this Manual
At various times through out this manual certain symbols will be used tohighlight points of Information, which are Intended to ensure the userspersonal safety and protect the integrity of equipment. Whenever any of thefollowing symbols are encountered its associated.
Note must be read and understood. Each of the symbols used is listedbelow; with a brief description of its meaning.
Warning !
This product can only function correctly and safely if it is installedcorrectly, and maintained as recommended.
Warning !
The specifications of product and contents of manual are subject to
change without notice.
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1. Module Overview
This chapter describes the following
High Speed Mix Analog Module Overview LED Indications General Specifications
1.1 High Speed Mix Analog Module Overview
This is high speed mix analog module. It provides four differential analogvoltage input channels and two non-isolated analog output channels. Fourdifferential analog voltage/current inputs are converted into equivalent binarynumbers and for two channels, binary data from CPU module is converted toequivalent analog voltage output. For analog input, this is sigma delta type
analog to digital conversion where as for analog output. R-2R type of digitalto analog conversion is used. ADC is with 16-bit resolution. DAC is with 12-bit resolution. Conversion time for ADC is 1 ms per channel. Conversion timefor DAC is 200 sThe analog range supported is.
Analog input 0 to +10 VDC 0 to 20 mA
Analog output 0 to +10 VDC
The resolution is 312.5 V/ 625 A for analog input. The resolution is 2.50mV for analog output.
This is an intelligent module with on board processor and memory. The datatransfer between CPU module and high speed mix analog module takesplace by 'READ_W' and 'WRITE_W' functions in application program. Themodule status is available in input image.
The figure 1 on next page shows front view of high speed mix analogmodule.
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0102
03
0405
0607
1110
0908
1314
1516
1718
19
2221
12
20
23
24
2526
2728
29
33
3231
30
3536
3738
34
V0 +
I0 +V2 +COM 0I2 +
V1 +
COM 2I1 +V3 +COM 1I3 +
VOUT 1COM 3
AGVOUT 2
AG
FG
NO 5 V SUPPLY
CPU FAULT
CH0
CH1
CH2
CH3
4366MIXED ANALOG IO4 IP 2 OP
ADC FAULT
Figure 1 : Front View of H igh Speed Mix Analog Module
The module provides LED indications on the front. Brief information aboutchannel can be written on the front door. Behind front door, 38-pin removableterminal block is provided for interfacing. The wiring details are shown onbackside of front door.
The high speed mix analog module can be configured in any IO slot of thePLC. The number of high speed mix analog module is limited by back panelcurrent capacity. In all, 13 words information per module is available.
Front ShieldPlate
Terminal BlockFixing Screw
38 PinRemovable
Terminal Block
ConnectionDetails Label
Front Door
IO Label
LEDIndications
ChannelStatusLEDs
ModuleStatusLEDs
Terminal BlockFixing Screw
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1.2 LED Indications
The following table explains significance of LEDs provided on the module.
LED Color Status DescriptionOFF 5 VDC from back plane healthyNo 5 V Supply Orange
ON 5 VDC from back plane not presentOFF CPU watch dog healthyCPU Fault OrangeON CPU watch dog faultOFF ADC hardware OK ADC Fault OrangeON ADC hardware faultOFF Analog input channel disabled Analog Input Channel Status (4)
One for each channelGreen
ON Analog Input channel enabled
1.3 General Specifications
General specifications of mix analog module are as given below..
Item DescriptionNumber of analog input channels 4 differentialConversion Method Sigma DeltaInput voltage 0 to 10 VDCInput Range 0 to 32000 (Unipolar)
Resolution 312.5 V (15 Bits)625 A (15 Bits)Conversion time 1 ms per channel
Channel to channel NilIsolationChannel to internal circuit 1.5 KV optical
Input impedance for voltage input 1 M Input impedance for current input 500
Number of analog output channels 2 non-isolatedConversion method R 2R ladderOutput voltage 0 to 10 V DCOutput range 0 to 32000 (Unipolar)Resolution 2.50 mV (12 bit)Load resistance > 1 KOhmsLoad current 10 mA max.Output short circuit protection YesMaximum conversion time 200 sec
Channel to channel NilIsolationChannel to Internal circuit 1.5 KV optical
Isolation between analog input and output channels Nil
Indications
No 5 VDC supply CPU Fault ADC Fault Analog input channel status (4)
Back-plane current ( 5 V consumption) 1 A * IO points consumed 8 Input bits and 8 output bitsTermination / Connection Removable 38 pin terminal blockOrdering code 4366
* This module does not require any external power supply.
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2. Module Operation
This chapter helps in getting started with high speed mix analog module. Itdescribes the basic operation of the module. This chapter explainsoperational details of:
Block Diagram Input Range Output Range On-Board Processor Operations Module Information
At the time of application program development, the module can beconfigured using the programming software DOXMINI+. Refer chapter 4 forconfiguration and programming details.
2.1 Block Diagram
Block diagram of high speed mix analog module is shown below.
Figure 2 : Block diagram of High Speed Mix Analog Module
CPUModule
Analog toDigital
Converter
OPTIC AL
ISOL
ATI
ON
On boardProcessor
Memory forConfiguration,Data, StatusInformation
ModuleInterface
Circuit
WatchDog
Instrumentation Amplifier
ChannelMultiplexer
Channel 0Input
Circuit
DC-to-DCConverter
+15 V
-15 V
+5 V
+ 5 VDC
5 V GNDGND
IsolatedSupply for
Analog Circuit
DAC0R-2R
DAC1R-2R
0 to +10 VDCOutput Signal
Channel 0
Output 0 Driver
0 to +10 VDCOutput Signal
Channel 1
Output 1 Driver
Channel 0
0 to +10 VDC
500 0 to 20 mA
Frombackplane
Channel 3Input
Circuit
Channel 30 to +10 VDC
500 0 to 20 mA
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The module provides four analog to digital channels for analog input. CPUbus is optically isolated from ADC circuit. The enabled channel input signalsare multiplexed and then amplified by differential amplifier for ADC input.Thus sigma-delta ( / ) ADC converts only enabled analog channels todigital value one by one. On-board processor manipulates the convertedcount for each channel. It provides instantaneous as well as filtered channel
data information.The input channels can be independently enabled or disabled. The analoginput data information is available in dual port RAM on the module. The inputchannel selection information is transferred to the module memory usingWRITE_W function in the application program. Similarly data of all channelscan be read by READ_W function in the application program.
The module also provides two digital to analog channels. CPU bus isoptically isolated from DAC circuit. The data from CPU for two channels isstored in dual port module memory registers. DAC (R2R type) convertsbinary data to an equivalent analog output voltage. The module providesproportional 0 to + 10 VDC. In output driving stage, presets are provided foradjustments of gain and offset for each channel. These are factory settingsand should not be tampered.
The module works on 5 VDC supply from back plane. 5 VDC supply isdirectly given to digital circuit. Also, DC-to-DC converter generates isolated 15 VDC and + 5 VDC as required for analog section. If isolated supply doeanalog section is not available to module, it generates 'No 5 V Supply' signalfor main CPU.
2.2 Input Range
This section describes data ranges as applicable to analog input.
Figure 3 :Data Range of Analog Input Voltage Signal
+10.24 VDC$ 7FFF
+312.5 V$ 1
0 VDC$0000 +10 VDC$ 7D00
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Figure 4 :Data Range of Analog Input Current Signal
The module provides 15-bit resolution. The figure above shows digital dataand associated input voltage values.
For the range of 0 to +10 V ( 20 mA ), the digital value ranges from 0 to+32,000.
The resolution is the smallest detectable change in analog signal.For 0 to +10 V range, the voltage span is 10 V and there can be 32,000 (15bits) equal steps. Each step corresponds to
10 V / 32000 = 312.5 V
Similarly, for 0 to 20 mA range, the current span is 20 mA and there can be32,000 (15 bits) equal steps. Each step corresponds to
20 mA / 32000 = 625 A
The table below shows typical data values in decimal as well as hexadecimal
format and their equivalent voltage values.Input Voltage
ValueInput Current
ValueData
(Decimal)Data
(Hexadecimal)0 0 0 0312. 5 V 625 A 1 11 V 2 mA 3200 C802 V 4 mA 6400 19003 V 6 mA 9600 25804 V 8 mA 12800 32005 V 10 mA 16000 3E806 V 12 mA 19200 4B007 V 14 mA 22400 57808 V 16 mA 25600 64009 V 18 mA 28800 708010 V 20 mA 32000 7D0010.24 V 20.48 mA 32767 7FFF
20.48 mA$ 7FFF
625 A$ 1
0 VDC$0000 20 mA$ 7D00
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2.3 Output Range
This section describes data ranges as applicable to analog voltage output.
Figure 5 :Data Range of Analog Output Voltage Signal
The module provides 12-bit resolution. The figure above shows digital dataand associated output voltage values.
For voltage range of 0 to +10 V, the digital value ranges from 0 to +32,000for user convenience.
The resolution is the smallest detectable change in analog output signal.
For 0 to +10 V range, the voltage span is 10 V and there can be 4,000 (12bits) equal steps. Each step corresponds to
10 V / 4,000 = 2.5 mV
The table below shows typical data values in decimal as well as hexadecimalformat and their equivalent voltage values. Even though resolution is 2.5 mV( 4000 steps in 0 to 10 VDC ), input range provided is 0 to +32,000 for userconvenience.
OutputValue
Data(Decimal)
Data(Hexadecimal)
0 0 02.5 mV 1 11 V 3200 C802 V 6400 19003 V 9600 25804 V 12800 32005 V 16000 3E806 V 19200 4B007 V 22400 57808 V 25600 64009 V 28800 708010 V 32000 7D0010.24 V 32767 7FFF
+10.24 VDC
$ 7FFF+2.5 mV$ 8
0 VDC$0000 +10 VDC$ 7D00
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2.4 On-Board Processor Operations
The high speed mix analog module is intelligent module with on-boardprocessor. The functions of on-board processor are explained below.
2.4.1 Power On Operations
After power ON, if isolated supply for analog section is absent then on-boardprocessor sets I x .0 bit in input image. After power ON, this processor checksthe hardware called as self test. During self-test, I x .7 bit is set in case ofwatchdog fault and digital section hardware fault. Also CPU Fault LED onfront panel is put ON indicating that module is not accessible. Also, duringmodule operation if digital section hardware is found faulty or watchdog erroris detected, I x .7 bit is set.
If module CPU section is healthy, I x .7 bit is cleared. The default values areloaded for some parameters such as analog input filter values, etc. Modulestarts ADC and DAC conversion as per data information available in modulememory. As per input channel selection, module starts sampling and digitalconversion cycle of enabled channels. For more details of IO image ofmodule, refer chapter 2.4.4 . If ADC hardware fault is detected, I x.6 bit ininput image is set and analog input channel data is not updated.
The module continues sampling, converting the channels and updatingmodule memory even after main CPU is put in STOP mode. But In this case,CPU module does not read the channel data and status.
For analog output channels, module reads channel binary data from modulememory and converts it to an equivalent analog output voltage. The moduleprovides proportional 0 to + 10 VDC. In case of ADC Fault, analog output isupdated as per binary data.
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2.4.2 Analog to Digital Conversion
The module samples an analog input channel and converts analog input toits digital value one by one. After power on, conversion is started for enabledanalog input channels. The disabled are bypassed retaining earlier values.
After one channel conversion, module initiates next channel conversion.During this conversion period, module processes converted data of previouschannel. The processed data for previous channel is made available duringthis period. After converting all healthy channels, processed data of all thechannels is transferred to respective memory area on the module. This cyclecontinues. Thus when the processor module performs READ_W operation, itreads either old or new information i.e. data and status of channels.
Figure 6 :ADC Coversion Cycle
The module takes certain time to sample all enabled channels and convertinto digital value. The factors affecting module update time is number ofchannels enabled. The module update time is minimum when only onechannel is enabled. Likewise the module update time is maximum when all
channels are enabled.
2.4.3 Digital Filter
Module provides analog input channel data as instantaneous value as wellas filtered value. This is a digital filter implemented in software algorithm.User can set three parameters for the filter, which is applicable for all the fouranalog input channels. The significance of three filter parameters isexplained below.
Band 1 is a band within which analog input count is treated as valid analoginput count. Module samples analog input channel in its scan and converts to
equivalent binary count. This ADC cycle is explained in chapter 2.3.2 . Module compares current count with previous count and if current count lieswithin band 1, then current count is valid count and respective memorylocations are updated accordingly. If current count is crossing the band 1,then previous count is considered as valid count and respective memorylocations are not updated. As explained in chapter 2.2 , for analog input from0 to 10 V, module provides equivalent 0 to 32,000 counts. If band 1 value is50, then acceptable band is previous count band 1value.
Channel 0Conversion
Channel 1Conversion
Channel 2Conversion
Channel 3Conversion
Update allchanneldata
Channeldisabled
Channeldisabled
Channeldisabled
Channeldisabled
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Band 2 parameter comes in picture when current analog input count crossesband 1. Once current count has crossed the band 1, this changed count isstored in temporary memory location. Previous count is treated as validcount. Now current analog input count is compared with band 2. This is toconfirm whether the change in analog input count is a valid change or someerroneous change due to noise, etc. If current count is within band 2 , thencurrent count replaces earlier count in temporary location. In this way ifnumber of successive samples of current count lies within band 2, then onlythe change in analog input count is treated as valid and current count istransferred to respective memory location. Parameter delay count decides forhow many samples the change in analog input count is to be confirmed. If atany point, current count is again not within band 2, then changed valuereplaces earlier count in temporary memory location and again change isvalidated for number of samples as defined in parameter delay count. Thus,once the change in analog input is detected, it is confirmed if number ofsamples lies within a band defined as temporary memory location count band 2 value.
The typical response for a step input is shown is figure below.
Figure 7 : Digital Filter Action
2.4.4 Digital to Analog Conversion
Once ADC cycle is over, module reads the binary data from respectivememory locations and transfers that data to DAC serially. DAC converts
binary data to equivalent voltage signal. This signal is then amplified byamplifier. The amplifier stage has presets for adjusting offset and gain. Theoutput of amplifier is 0 to 10 VDC signal. The presets for offset and gainadjustments are factory set and should not be tampered.
Temporary Memorylocation
Band 1
Band 1
Module memory location foranalog input channel data
Analog input
Filtered Analog inputcount
Sampling Instance
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2.5 Module Information
This section explains the entire information required and available with highspeed analog module. The following points are discussed
Input Output Image Mapping
Memory Mapping Module Status Bits
2.5.1 Input Output Image Mapping
Input output image mapping related to high speed mix analog module isshown below.
Output image bits are not used
Figure 8 : Input Output Image Mapping of High Speed Mix Analog Module
The module consumes 8 input bits (1 byte) of input image and 8 output bits(1 byte) of output image in the CPU module. CPU reads the status of modulein input scan. For immediate updation of input image in application program,IMM_IN functions can be used in application program whenever required.For the details refer chapter 2.4.4 .
Input ImageNo 5 V Supply Ix.0
High Speed Mix Analog Module
Channel 0
Input Scan
Logic Scan
Channel 1
Channel 0
Channel 1
Channel 2
Channel 3Module
Interfacecircuit
CPU Module
Input ImageNo 5 V Supply Ix.0
ADC Fault Ix.6CPU Fault Ix.7
SLOT
ENOIMM_IN
EN
AnalogInput
AnalogOutput
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2.5.2 Memory Mapping
The memory mapping related to high speed analog module is shown in figurebelow.
Figure 9 : Memory Mapping of High Speed Mix Analog Module
The analog input channel enable/ disable configuration and filter values fromPLC variable area e.g. memory or page is transferred to module memorywhen WRITE_W function gets executed in application program i.e. in logicscan. The module takes appropriate action on configuration informationchange immediately. After power on, the module starts converting enabledinput channels. If filter values are modified or channel is enabled / disabled, ittakes effect only in the subsequent conversion cycle. The configuration, filtervalues can be modified by using WRITE_W function. Similarly channel canbe enabled or disabled during normal operation for optimum results.
CPU writes binary data for two analog output channels to module memorywords. The module coverts this data to equivalent analog output voltage.These values can be modified by using WRITE_W function.
The analog input channel readings and module scan time count can be readfrom the module using READ_W function.
CPU Module
6 Words Analog input channels enable/disable MW50 Analog output channel 0 data MW52 Analog output channel 1 data MW54 Analog input filter value 1 MW56 Analog input filter value 2 MW58 Analog input filter value 3 MW60
9 Words Analog input channel 0 data (Filtered) MW100
Analog input channel 1 data (Filtered) MW102 Analog input channel 2 data (Filtered) MW104 Analog input channel 3 data (Filtered) MW106 Analog input channel 0 data (Instant) MW108 Analog input channel 1 data (Instant) MW110 Analog input channel 2 data (Instant) MW112 Analog input channel 3 data (Instant) MW114Module scan time MW116
High Speed Mix Analog Module
6 Words Analog input channels enable/disable MMW00 Analog output channel 0 data MMW02 Analog output channel 1 data MMW04 Analog input filter value 1 MMW06 Analog input filter value 2 MMW08 Analog input filter value 3 MMW10
9 Words Analog input channel 0 data (Filtered) MMW256
Analog input channel 1 data (Filtered) MMW258 Analog input channel 2 data (Filtered) MMW260 Analog input channel 3 data (Filtered) MMW262 Analog input channel 0 data (Instant) MMW264 Analog input channel 1 data (Instant) MMW266 Analog input channel 2 data (Instant) MMW268 Analog input channel 3 data (Instant) MMW270Module scan time MMW272
ENO
SLOT
DATA
LEN
ADDR
ENWRITE_W
SLOT
DATA
LEN
ADDR
EN ENOREAD_W
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2.5.3 Module Status Bits
As discussed in chapter 2.4.1 , input image bits are used as module statusindications. User can check the module status through application program.The module writes status in its input image area cyclically. The CPU readsthis input image area in input scan. If 'IMM_IN' function is executed in logic
scan for a particular slot, it stops current logic scan, executes input scan fordefined slot and resumes logic scan again. This is useful when everimmediate updation of input image is needed. The functions of input imagebits are given below
No. Bit Address Module Status Status Description
ON Isolated supply to analog section is absent orfaulty1 I xx .0 No 5 V SupplyOFF Isolated supply to analog section is healthyON ADC hardware fault2 I xx .6 ADC FaultOFF ADC healthy
Module CPU watch dog faultON
Module not ready.3 I xx .7 CPU Fault
OFF Module CPU section healthy and ready
Note xx is slot number in which module is fixed.I xx .1 to I xx .5 is reserved and should not be used.
Whenever accessing the module, user must check the module status bit I x .0and I x .7. Whenever, isolated supply to analog section is absent or faulty, No5 V Supply bit Ixx.0 is set. In this case, ADC Fault bit Ixx.6 also set.
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0102
03
0405
0607
1110
0908
1314
1516
1718
19
2221
12
20
23
24
2526
2728
29
33
3231
30
3536
3738
34
V0 +
I0 +V2 +COM 0I2 +
V1 +
COM 2I1 +V3 +COM 1I3 +
VOUT 1COM 3
AGVOUT 2
AG
FG
Figure 10 :Connection diagram of High Speed Mix Analog Module
In figure, analog voltage input is connected to channel 0 and analog currentinput is connected to channel 2. For interfacing analog signals, 38-pinterminal block is provided. Analog voltage input is connected to Vn + andCOM n terminals, where n is a channel number. Ensure correct polarity ofanalog input. Analog voltage input 0 is to be connected to terminal numbers15 and 19. Analog voltage input 1 is to be connected to terminal numbers 21and 25. Analog voltage input 2 is to be connected to terminal numbers 18and 22. Analog voltage input 3 is to be connected to terminal numbers 24and 28.
0 to 10 VDC Input
+
--
0 to 20 mA Input
0 to 10 VDC Output--
--
+
+
0 to 10 VDC Output--
+
To interface current input, it isnecessary to short Vn + and Interminals of respective channel.
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Analog current input is connected to In + and COM n terminals, where n is achannel number. Here, short corresponding Vn + terminal to In + terminal.
Analog current input 0 is to be connected to terminal numbers 17 and 19.Current input 1 is to be connected to terminal numbers 23 and 25. Currentinput 2 is to be connected to terminal numbers 20 and 22. Current input 3 isto be connected to terminal numbers 26 and 28.
Analog output is taken from VOUT n and AG. Analog output 1 can be takenfrom terminal numbers 27 and 29. Analog output 2 can be taken fromterminal numbers 30 and 32.
For functioning of high-speed mix analog module, 5 VDC supply is takenfrom back plane hence no external supply is required.
3.3 Precautions to be taken
All the normal precautions concerning the wiring and protection of anelectronic equipment in an industrial environment should be observed. Toguard against coupling noise from one conductor to another, follow the
guidelines given below.
Inside control panel
Following guidelines to be observed inside control panel.
All power circuit wiring e.g. connected to power supply module, powercontactors, etc i.e. high voltage wiring should be kept separate and apartfrom thermocouple signals.
Digital input wiring and digital output wiring (especially, relay output and AC output) should be separately bundled and kept as apart as possiblefrom analog signals.
Analog signals should be carried through shielded cables.
Outside control panel
Following guidelines to be observed outside control panel.
Depending upon the type of modules used in PLC, separate ducts should beprovided for Power circuit wiring and power cables. Input cables Output cables All cables carrying low level signals for analog IO modules,
thermocouple/ RTD input modules and for communication.
Wherever possible, it is recommended to Avoid parallel routing of cables carrying analog signals and powercables, etc over long distances
Ensure that cables carrying analog signals cross at right angles to powercables so that minimum length of cable will be in close vicinity of powercables.
Run cables on metallic surfaces Avoid number of joints Keep cable lengths as short as possible.
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4. Configuration and Programming
This chapter explains configuration of high speed mix analog module andtransferring information with high speed analog module. This information isuseful for application program development. The module configurationconsists of only slot configuration as explained below.
4.1 Slot Configuration
The high speed mix analog module provides 4 analog input channels and 2analog output channels, which can be independently operated. Configuringthe slot for high speed mix analog module is just like any other discrete IOmodule only. The programming and documentation software DOXMINI+ isused for configuration and programming. The module consumes 1 byte ofinput image and 1 byte of output image. The input image is used for readingstatus of module. For more details, refer chapter 2.4.4 .
The IO byte consumption along with configuration of Nexgen PLC is shownbelow.
Power SupplyModule
Nexgen 4000CPU Module
Slot 0
32 DC InputModule
I0.0 to I0.7I1.0 to I1.7I2.0 to I2.7I3.0 to I3.7
Slot 1
32 DC OutputModule
Q4.0 toQI4.7Q5.0 to Q5.7Q6.0 to Q6.7Q7.0 to Q7.7
Slot 2
High Speed Analog Module
I8.0 to I8.7Q8.0 to Q8.7
Slot 3
16 DC OutputModule
Q9.0 to Q9.7Q10.0 to Q10.7
Input module in first slot 0 consumes IB0 to IB3 of input image. Output
module in slot 1 consumes QB4 to QB7 of output image. High speed mixanalog module consumes IB8 of input image and QB8 of output image.16DC Output module in slot 3 consumes QB9 and QB10 of output image.
The IO byte consumption along with configuration of Nexgen PLC is shownbelow.
Power SupplyModule
Nexgen 5000CPU Module
Slot 0
32 DC InputModule
I0.0 to I0.7
I1.0 to I1.7I2.0 to I2.7I3.0 to I3.7
Slot 1
32 DC OutputModule
Q0.0 toQ0.7
Q1.0 to Q1.7Q2.0 to Q2.7Q3.0 to Q3.7
Slot 2
High Speed Analog Module
I4.0 to I4.7
Q4.0 to Q4.7
Slot 3
16 DC OutputModule
Q5.0 to Q5.7
Q6.0 to Q6.7
Input module in first slot 0 consumes IB0 to IB3 of input image. Outputmodule in slot 1 consumes QB0 to QB3 of output image. High speed mixanalog module consumes IB4 of input image and QB4 of output image.16DC Output module in slot 3 consumes QB5 and QB6 of output image.
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4.2 Data Information to Module
The high speed mix analog module can be configured in any slot of PLC. Itprovides 4 differential input channels and 2 non-isolated output channels.
Analog input channels can be independently used for voltage or currentinputs. Following information is provided by CPU module to high speed mixanalog modules
Channel enable/disable Analog input filter values Analog output binary data
This information is transferred to module memory by using 'WRITE_Wfunction. The module takes action on this information immediately in its ownscan.
The required information is to be written to module memory words MMW #0to MMW #10.
4.2.1 Analog Input Channel enable/ disable
Bit wise information is stored in module memory word MMW #0 for fouranalog input channels as shown below.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Enable 1 Analog Input 0Disable 0Enable 1 Analog Input 1Disable 0Enable 1 Analog Input 2Disable 0Enable 1 Analog Input 3Disable 0
Analog input 0 enable/disable bit is bit 0 of MMW#0 and so on. If this bit isset, analog input channel 0 is enabled and module samples and convertsinput to equivalent binary value. Channel 0 data is updated accordingly. Also,corresponding channel LED indication (green) on module is switched ONindicating that channel is enabled. If this bit is reset, analog input channel 0 isdisabled and the channel is not sampled and channel data is not updated.Corresponding channel LED indication on module is switched OFF.
During module power ON, default value $000F is loaded to MMW#0 enablingall the four analog input channels. At the same time, all four channel LEDsare switched ON. User can modify this word by WRITE_W function foroptimum module scan time.
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4.2.2 Analog Output Channel Data
Module memory word MMW #2 holds data for analog output channel 0whereas MMW #4 holds data for analog output channel 1.
MMW #2 Analog Output Channel 0 data
MMW #4 Analog Output Channel 1 data
The data range is from 0 to 32,000 for 0 to 10 VDC output. For more detailsof analog voltage output and equivalent binary data, refer chapter 2.2 .
4.2.3 Digital Filter
Three filter values are to be programmed for stable analog input reading asper varous site conditions. These three values are written to module memorywords MMW#6 to MMW#10.
During module power ON, following default values are loaded.User can
modify these words by WRITE_W function as per site conditions to get stableanalog input reading.
Module Memory Word Item Default ValueMMW #6 Filter Value 1 # 100MMW #8 Filter Value 2 # 75MMW #10 Filter Value 3 # 3
4.3 Analog Input Channel Data
For the configured channels, necessary information is available as filteredchannel data and instantaneous channel data.
Module memory words MMW #256 to MMW #262 are module memory wordsfor four channel readings updated after applying software filter. Modulememory words MMW #264 to MMW #270 are module memory words for fourchannel readings updated immediately.
For enabled channels, this information is updated cyclically in module. Thedata is read and stored using READ_W function in application program.
MMW #256 Analog Input Channel 0 filtered data
MMW #262 Analog Input Channel 3 filtered dataMMW #264 Analog Input Channel 0 instantanous data
MMW #270 Analog Input Channel 3 instantanous data
4.4 Module Scan Time
Module scan count is available in module memory word MMW#272. The timein nano seconds can be calculated as below.
Module scan time in ns = Module scan count x 375 x 10 -9 available in MMW#272
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4.5 Programming with Nexgen 4000 CPU
The data in PLC variables is transferred to the high speed mix analogmodule when 'WRITE_W' function is executed. The data in the PLC variablescan be updated using functions like 'MOV_W', arithmetic or any otherfunctions. The data from high speed mix analog module memory can betransferred to PLC variables when 'READ_W' function is executed.
The WRITE_W function below shows data transfer from the CPU modulememory to high speed mix analog module memory. The details of transferare -
High speed analog module is configured in slot 2 of PLC Start address of memory on the CPU module is MW50 Length of data area to be transferred is 6 words Address on high speed analog module in slot 2 is #00
'WRITE_W' function gets executed when condition for enable 'EN' is ON.'ENO' output becomes ON, when EN is ON and function is executedsuccessfully. ENO is OFF if
Parameters of function are invalid or not within specified range.High speed analog module is not accessible to CPU module.
M0.0 ------ WRITE_W ---- M0.1+---| |---+--------- |EN ENO|-+---------+---( )---
| |#2 -|SLOT |
| |MW50 -|DATA |
| |#6 -|LEN || |
#00 -|ADDR || |-------------------
So 6 words (MW50 to MW60) information from CPU memory is transferred tothe memory at address #00 onwards of high speed mix analog module fittedin slot 2.
The 'READ_W' function below shows data transfer from the high speed mixanalog module memory to CPU memory. The details of transfer are -
High speed analog module is configured in slot 2 of PLC Address on high speed mix analog module in slot 2 is #256 Start address of memory on the CPU module is MW100 Length of data area to be transferred is 9 words
READ_W' function gets executed when condition for enable 'EN' is ON.'ENO' output becomes ON, when EN is ON and function is executedsuccessfully. ENO is OFF if
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Parameters of function are invalid or not within specified range. High speed mix analog module is not accessible to CPU module
M0.2 ------ READ_W ----- M0.3+---| |---+--------- |EN ENO|-+---------+---( )---
| |#2 -|SLOT |
| |#256 -|ADDR |
| |#9 -|LEN |
| |MW100-|DATA |
| |-------------------
So 9 words (MMW256 to MMW272) information on high speed mix analogmodule fitted in slot #2 are transferred to the CPU memory words (MW100 toMW116).
Example of basic application program is given below. For the same, referNexgen PLC configuration shown in chapter 4.1 . In the configuration,following points are to be noted.
I 8.0 is a module status bit as 'No 5 V Supply' bit. I8.0 is set if 5 VDC supplyto module is not healthy.
I 8.6 is a 'ADC Fault' bit. It is set in case of ADC circuit hardware fault. If thisbit is set, analog input channel readings are not updated.
I 8.7 is a module CPU circuit status bit as 'CPU Fault' bit. This is set in caseof watchdog fault.
S 4.2 is a 'Module Error' bit for the module fitted in slot 2.
While developing application program, first check whether the module ishealthy. For the same, check 'Module Error' bit S 4.2, 'CPU Fault' bit I8.7 and'NO 5 V Supply' bit I8.0. If any bit is set, declare respective fault. In this case,module is not accessible. If all these bits are OFF, then only enable'WRITE_W' and 'READ_W' functions for high speed analog module.
Check 'ADC Fault' bit I8.6 while reading analog input channel data. In case of ADC fault, analog input channel data is not updated and so data is not valid.
During self test of module at the time of power ON, default values are loadedin MMW#0 and MMW#6 to MMW#10. This enables all the four analog inputchannels indicated by four channels status LEDs. Default filters values arealso loaded. If user wants to continue with this configuration, it is notnecessary to write the configuration again. If user wants change theconfiguration, it can be done using WRITE_W function as explained further.
When 'WRITE_W' function is executed successfully, ENO output becomesON, once this information is transferred to module, it is valid as long as PLCpower is present. It is recommended to enable 'WRITE_W function when
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Module Error bit becomes OFF i.e. System bit S4.2 is OFF No 5 V Supply bit becomes OFF i.e. Input bit I8.0 is OFF CPU Fault bit becomes OFF and Input bit I8.7 is OFF
Any other condition as per requirement of application program e.g. memorybit M2.0 is ON.
S4.2 M0.3 ------ WRITE_W ---- M2.2+---| |---+---|N|---|---------|EN ENO|-+---( )---
| | |I8.0 M0.4 | | |
+---| |---+---|N|---| #2 -|SLOT || | |
M8.6 M0.5 | | |+---| |---+---|N|---| MW50 -|DATA |
| | |M2.0 M2.1 | | |
+---| |---+---|P|--- #6 -|LEN || |
| |#0 -|ADDR || |-------------------
If 'WRITE_W' function is executed successfully, M2.2 bit becomes ON forone scan duration. If this bit is not ON even if function enable conditions areON, declare fault and take appropriate action.
When 'WRITE_W' function is executed, necessary data from PLC variablesMW 50 to MW60 is transferred to module memory MMW#00 onwards. Thesignificance of PLC variables is as given below.
MW 50 Channel enable / disable wordMW 52 - Analog output channel 0 binary dataMW 54 - Analog output channel 1 binary dataMW 56 Digital filter 1 value for analog inputsMW 58 Digital filter 2 value for analog inputsMW 60 Digital filter 3 value for analog inputs
After transferring this information to high speed mix analog module memory,module starts functioning as per requirement. Enable 'READ_W' functionwith any condition M1.0 with interlocks of Module Error bit S4.2, 'CPU Fault'bit I8.7 and ADC Fault bit I8.6. When 'READ_W' function is executed, theanalog input channel readings stored in module memory MMW#256 toMMW#270 and module scan count stored in MMW#272 are transferred toCPU memory MW100 to MW#116 respectively.
If 'READ_W' function is executed successfully, M1.1 bit becomes ON. If thisbit is not ON even if function enable conditions are ON, declare fault and takeappropriate action.
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M1.0 S4.2 I8.7 I8.6 ------ READ_W ----- M1.1+---| |---+---|/|---+---|/|---+|---|/|---|EN ENO|-+--( )-
| || |
#2 -|SLOT || || |
#256 -|ADDR || || |
#9 -|LEN || || |
MW100 -|DATA || |-------------------
After execution, filtered analog input data from four channels is available inPLC variables MW100 to MW106.
Instantanous analog analog input data from four channels is available inMW108 to MW114. Module scan count is stored in MW116. This data can beproceesed further in application program.
4.6 Programming with Nexgen 5000 CPU
The data in PLC variables is transferred to the high speed mix analogmodule when 'IM_Write' function is executed. The data in the PLC variablescan be updated using functions like 'MOV_W', arithmetic or any otherfunctions. The data from high speed mix analog module memory can betransferred to PLC variables when 'IM_Read' function is executed.
The IM_Write function below shows data transfer from the CPU modulememory to high speed mix analog module memory. The details of transferare -
High speed analog module is configured in slot 2 of PLC The Configuration information is stored in an 6 word array Config Length of data area to be transferred is 12 bytes Address on high speed analog module in slot 2 is #00
'IM_Write' function gets executed when condition for enable ' Wr_Delay.Q' isON. ' Config_Dn' output becomes ON, when EN is ON and function isexecuted successfully. Config_Dn is OFF if
Parameters of function are invalid or not within specified range.High speed analog module is not accessible to CPU module.
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So 6 words information from CPU memory is transferred to the memory ataddress #00 onwards of high speed mix analog module fitted in slot 2.
The 'IM_Read' function below shows data transfer from the high speed mixanalog module memory to CPU memory. The details of transfer are -
High speed analog module is configured in slot 2 of PLC Address on high speed mix analog module in slot 2 is #256 The Data to be stored in PLC variable array AIData Length of data area to be transferred is 9 words
Im_Read' function gets executed when condition for enable ' Rd_Delay.Q' isON. ' Rd_Dn' output becomes ON, when EN is ON and function is executed
successfully. ENO is OFF if Parameters of function are invalid or not within specified range. High speed mix analog module is not accessible to CPU module
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NEXGEN PLC I/O Modules
Highspeed Mix Analog IO Module(4366)
Document No.:ED-2002-006