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ECE 477 Design Review Team 2 Spring 2010 Digi-Brush Josh Long Caleb Ayew- ew Katie Schremser

ECE 477 Design Review Team 2 Spring 2010 Digi -Brush

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ECE 477 Design Review Team 2  Spring 2010 Digi -Brush. Josh Long. Katie Schremser. Caleb Ayew-ew. Outline. Project overview Project-specific success criteria Block diagram Component selection rationale Packaging design Schematic and theory of operation PCB layout - PowerPoint PPT Presentation

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Page 1: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

ECE 477 Design ReviewTeam 2 Spring 2010

Digi-Brush

Josh Long Caleb Ayew-ewKatie Schremser

Page 2: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Outline• Project overview • Project-specific success criteria• Block diagram• Component selection rationale• Packaging design• Schematic and theory of operation• PCB layout• Software design/development status• Project completion timeline• Questions / discussion

Page 3: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Project Overview• Child’s toy that can eliminate the mess and stress

of children painting.• User can use multiple colors by mixing 8 given

colors • Current color will be indicated through an LED in

the tip of the brush• Painting will be recognized by interaction with a

15” touch screen • Image on the display can be saved onto an SD

Card

Page 4: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Project-Specific Success Criteria

1. An ability to display images on the display board2. An ability to track the digital brush on the

display board3. An ability to mimic paintbrush stroke

characteristics on the display board4. An ability to save the painted image on a SD

card5. An ability to distinguish user’s color selection

and display selected color before being painted

Page 5: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Block Diagram

Page 6: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Microcontroller :Freescale 9S12DP512DGV1

• 16-bit CPU (HCS12)• 512 kB Flash EEPROM (Program Memory)• Multiple Peripherals

– 3 SPI (FPGA)– 2 8-channel, 10-bit ATD (Color pots, Touch Screen,

Force Resistor)– 1 IIC (LED Driver)

• Max Frequency of 50 MHz (with external oscillator)• 5V Operation

Page 7: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

FPGA: Cyclone II EP2C20Q240C8 K ABB9Y0737A• 4 PLLs• 239,616 total RAM bits• 26 Embedded Multipliers• 3.3V , Max 260 MHz Operation• Easily Accessible VHDL Libraries• Low Cost

Page 8: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

15” Touch Monitor/Touch Screen• 15” Size

– Comparable to an 8.5” x 11” piece of paper– Cheaper than 12.1” for both parts combined

• 15” Touch Monitor– Separate Monitor and Touch Screen were cheaper than a

pre-packaged touch screen

• 15” 5-Wire Resistive Touch Screen– Resistive technology allows recognition by items other

than fingers– 5-Wire allows more accuracy than 4-Wire

Page 9: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Packaging Design

8 Color pots 1 “Water” Pot

15” LCD Monitor15” Touch Screen

Save/Clear Buttons

Brush Holder/Connector

Page 10: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Theory of Operation• Power• Microcontroller

– LED Driver– Color Pots– Force Resistor– Touch Panel

• FPGA– Boot Chip– SDRAM– VDAC/Monitor– SD Card Reader

Page 11: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Theory of Operation: Power

• 31V @ 2.4A inputs to linear regulators from a wall-wart

• Three LM350 Linear Regulators– >=28V to:

• 1.25V• 3.3V• 5V

Page 12: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Theory of Operation: Power Schematic

Page 13: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Theory of Operation: Microcontroller

External Device Protocol (No. Pins)

FPGA SPI (4)GPIO (4)

Color Pots ATD (1 each * 9 = 9)

Force Resistor ATD (1)

LED Driver IIC (2)

Touch Screen ATD (1)GPIO (4)

• 50 MHz External Oscillator

• 2 GPIO for Save and Clear Screen Pushbuttons

• 5V Vdd

Page 14: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Theory of Operation: Microcontroller Schematic

Page 15: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

LED Driver

Page 16: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Theory of Operation: FPGA

• 50 MHz External Oscillator

• 133 MHz External Oscillator

• 1.25V Internal• 3.3V Vdd

– Level Translator between FPGA and Microcontroller

External Device Protocol (No. Pins)

Microcontroller SPI (4)GPIO (4)

SD Card Reader SPI (4)

VDAC Parallel Bus (33)

SDRAM Data Bus (16)I/O (24)

Boot Chip Digital I/O (5)

Page 17: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Theory of Operation:FPGA Schematic

Page 18: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

VDAC, Boot Chip, Level Translator

Page 19: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

SDRAM

Page 20: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

PCB Layout: Considerations

• Separation of Analog and Digital• Large Traces for Power and GND

– Copper Pour for GND

• Many Decoupling Capacitors• Valid Trace Placements• Room for Expansion (Headers) if needed

Page 21: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

PCB Layout: Overall

Page 22: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

PCB: Power Supply

Page 23: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

PCB: µC, LED Driver, Oscillator, and Level Translator

Page 24: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

PCB: FPGA

Page 25: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

PCB: VDAC, Boot Chip

Page 26: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

PCB: SDRAM

Page 27: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush
Page 28: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush
Page 29: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Software Design/Development Status

• Functional Proof of Concept for mixing colors created using Java

• Programming Microcontroller with Freescale CodeWarrior and P&E BDM Multilink– Using to simulate interrupts and simple programs

relevant to the project

• Have access to SPI, VDAC, and SDRAM VHDL Libraries for the FPGA

Page 30: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Project Completion Timeline

Page 31: ECE 477 Design Review Team 2    Spring 2010 Digi -Brush

Questions / DiscussionQuestions / Discussion