ECE 445 Analysis and Design of Power Electronic Circuits ...vahe/fall2002/ece445/pdf/... · ECE 445 Analysis and Design of Power Electronic Circuits ProblemSet3Solutions Fall2002

ECE 445 Analysis and Design of Power Electronic Circuits

Problem Set 3 SolutionsFall 2002

Due: September 24, 2002

Problem PS3.1

Consider the circuit shown in Figure 1 where the switch is closed at t = 0. Prior to closing the switch, thecapacitor voltage is zero, (i.e. vC(0

−) = 0). This is the circuit that was analyzed in Problem PS1.1. We willnow analyze the behavior of this system using a simulator of your choice. For the simulation, assume thatVs = 12V, R = 1kΩ, C = 1µF.

1. Simulate the circuit long enough (about 5 time constants) to capture enough information about thewaveforms.

2. Produce hardcopies of waveforms for capacitor voltage vC(t) and current iC(t).

PSfrag replacements

Vs

R

C

++

−−

is

vC

iCS

Figure 1: Problem PS3.1

Solution

First, here’s the netlist for the circuit.

ps3_1.cir - Switched RC Circuit

Vs 1 0 12 ; dc voltage source

* S and Vsw model a switch that turns on at t=0

S 1 2 5 0 sx ; voltage controlled switch

Vsw 5 0 pulse(0 1 0 1u 1u 100 1000) ; control voltage for switch S

R 2 3 1k ; 1 kOhm resistance

C 3 0 1u (ic=0) ; 1 uF capacitor with initial voltage=0V

* switch model (turn-on voltage, turn-off voltage, on resistance, off resistance)

.model sx vswitch (von=0.9, voff=0.1, ron=1m, roff=1meg)

.tran 10u 10m 0 10u uic

.probe

.end

Running this circuit in PSpice produces the waveforms shown in Figure 2. Based on our solutions fromProblem Set 1, the capacitor voltage and current are given by

vC(t) = Vs(1− e−t/RC)u(t)

= 12(1− e−1000t)u(t) V

iC(t) = CdvC(t)

dt=

VsR

e−t/RC u(t)

= 12 e−1000t u(t) mA

where time constant of the circuit is τ = RC = 1ms and u(t) is the unit step function. Examining Figure 2shows that these are precisely the waveforms that were computed. The waveforms shown in Figure 2 reachtheir steady state values in about five time constants (5τ = 5ms) which is what we would have expected.

V. Caliskan 1 September 27, 2002




Date/Time run: 09/16/02 20:33:38ps3_1.cir - Switched RC Circuit

Temperature: 27.0

Vahe Caliskan, ScD MIT Lab for Electromagnetic and Electronic Systems

(D) ps3_1.dat

0s 2ms 4ms 6ms 8ms 10ms

TimeV(3)

16V

10V

0VSEL>>

capacitor voltage

I(C)

16mA

10mA

0A

capacitor current

Figure 2: Simulation results for Problem PS3.1.

Problem PS3.2

Consider the dc-excited LC circuit shown in Figure 3 where all of the elements are ideal. The switch isclosed at t = 0. Prior to closing the switch, the capacitor voltage and inductor current are both zero, (i.e.vC(0

−) = 0, iL(0−) = 0). This is the circuit that was analyzed in Problem PS1.3. We will now analyze

the behavior of this system using a simulator of your choice. For the simulation, assume that Vs = 24V,L = 100µH, C = 100µF.

1. Simulate the circuit long enough to capture enough information about the waveforms.

2. Produce hardcopies of waveforms for the capacitor voltage vC(t) and inductor current iL(t).

PSfrag replacements

Vs

R

C

++

−−

is

vC

iciL

S

L


Solution


ps3_2.cir - dc-excited LC circuit


* S and Vsw implement a switch that turns on at t=0

S 1 2 5 0 sx

Vsw 5 0 pulse(0 1 0 1u 1u 100 1000)

L 2 3 100u (ic=0) ; 100 uH inductor with zero initial current





C 3 0 100u (ic=0) ; 100 uF capacitor with zero initial voltage




.probe

.end


iL(t) =VsZ0

sin(ω0t) (1)

= 24 sin(10000t)A (2)

vC(t) = Vs (1− cos(ω0t)) (3)

= 24 (1− cos(10000t)) V (4)

where Z0 =√

L/C = 1Ω and ω0 = 1/√LC = 10000rad/s. The period of the oscillations is simply

2π/ω = 628µs. Examining Figure 4 verifies that our solutions are correct.

Date/Time run: 09/16/02 22:15:21ps3_2.cir - dc-excited LC circuit

Temperature: 27.0


(E) ps3_2.dat

0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms

TimeI(L)

30A

0A

-30ASEL>>

inductor current

V(3)

50V

0V

capacitor voltage

Figure 4: Simulation results for Problem PS3.2.





Problem PS3.3

Consider the dc-excited LCD (inductor-capacitor-diode) circuits shown in Figure 5. The switch is closed att = 0. Prior to closing the switch, the capacitor voltage and inductor current are both zero, (i.e. vC(0

−) = 0,iL(0

−) = 0). This is the circuit that was analyzed in Problem PS2.1. We will now analyze the behaviorof this system using a simulator of your choice. For the simulation, assume that Vs = 24V, L = 100µH,C = 100µF. The netlists for the circuits are given below.


2. Produce hardcopies of waveforms for the capacitor voltage vC(t) and inductor current iL(t).

PSfrag replacements

Vs

R

C+

+

−−

is

vC

ic

iLS

LD

PSfrag replacements

Vs

R

C+

+−−

is

vC

ic

iLS

L

D


Solution for the series diode circuit


ps3_3a.cir - dc-excited LC circuit with series diode



S 1 2 5 0 sx

Vsw 5 0 pulse(0 1 0 1u 1u 100 1000)

D 2 3 dx ; almost-ideal diode



* diode model

.model dx d (rs=.1m, n=100u)




.probe

.end


iL(t) =VsZ0

sin(ω0t) (5)

= 24 sin(10000t)A (6)

vC(t) = Vs (1− cos(ω0t)) (7)

= 24 (1− cos(10000t)) V (8)

where Z0 =√

L/C = 1Ω and ω0 = 1/√LC = 10000rad/s. The period of the oscillations is simply

2π/ω = 628µs. But as shown in the Problem Set 2 solutions, these voltages and currents only last forπ/ω = 314µs. After this time the voltage stays at 2Vs = 48V and the current stays at 0.





Date/Time run: 09/16/02 22:17:13ps3_3a.cir - dc-excited LC circuit with series diode

Temperature: 27.0


(F) ps3_3a.dat

0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms

TimeI(L)

30A

20A

10A

-0A

inductor current

V(4)

50V

0VSEL>>

capacitor voltage

Figure 6: Simulation results for Problem PS3.3 – series diode circuit.

Solution for the parallel diode circuit


ps3_3b.cir - dc-excited LC circuit with parallel diode



S 1 2 5 0 sx

Vsw 5 0 pulse(0 1 0 1u 1u 100 1000)




* diode model





.probe

.end

Running this circuit in PSpice produces the waveforms shown in Figure 7. Based on our solutions fromProblem Set 2, the diode never turns on and the results are identical to the system shown in PS3.2.





Date/Time run: 09/16/02 22:18:49ps3_3b.cir - dc-excited LC circuit with parallel diode

Temperature: 27.0


(G) ps3_3b.dat

0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms

TimeI(L)

30A

0A

-30A

inductor current

V(3)

50V

0VSEL>>

capacitor voltage

Figure 7: Simulation results for Problem PS3.3 – parallel diode circuit.

Problem PS3.4

Consider the half-wave rectifier circuits shown in Figure 8. The ac voltage source is given by Vs sin(ωt). Theseare the circuits that were analyzed in Problems PS2.2 and PS2.3. We will now analyze the behavior of theserectifiers using a simulator of your choice. For the simulation, assume that Vs = 170V, ω = 2π(60)rad/s,R = 1.2Ω. For the inductance use L = 1mH for the single diode rectifier and L = 50mH for the two dioderectifier. The netlists for the circuits are given below.


2. Produce hardcopies of waveforms for the inductor current iL(t) and filter drive voltage vd(t).

PSfrag replacements

Vs

R

C

+ +

−−

isvCic

iL

SLD

vdvsD1

D2

PSfrag replacements

Vs

R

C

+ +

− −

isvCic

iL

SL

D

vdvs

D1

D2


Solution for half-wave rectifier with inductive load


ps3_4a.cir - half-wave rectifier with inductive load

Vs 1 0 sin(0 170 60 0 0) ; ac voltage source 170*sin(2*pi*60*t)


L 2 3 1m (ic=0) ; 1 mH inductor with zero initial current

R 3 0 1.2 ; 1.2 Ohm load resistor

* diode model









.probe

.end

The results of the simulation are shown in Figure 9. These waveforms are consistent with our predictionsfrom Problem Set 2 Solutions. Note that since the inductor current is reset to zero in every cycle, there isno startup transient.

Date/Time run: 09/16/02 23:12:53ps3_4a.cir - half-wave rectifier with inductive load

Temperature: 27.0


(H) ps3_4a.dat

0s 10ms 20ms 30ms 40ms 50ms

TimeI(L)

150A

100A

50A

-0ASEL>>

inductor current

V(2)

200V

100V

0V

-50V

filter drive voltage

Figure 9: Simulation results for Problem PS3.4 – half-wave rectifier with inductive load.

Solution for half-wave rectifier with inductive load and circulation diode


ps3_4b.cir - half-wave rectifier with inductive load and circulation diode D2

Vs 1 0 sin(0 170 60 0 0) ; ac voltage source 170*sin(2*pi*60*t)

D1 1 2 dx ; almost-ideal diode

D2 0 2 dx ; almost-ideal circulating diode

L 2 3 50m (ic=0) ; 50 mH inductor with zero initial current

R 3 0 1.2 ; 1.2 Ohm load resistor

* diode model





.probe

.end





The results of the simulation are shown in Figure 10. These waveforms are consistent with our predictionsfrom Problem Set 2 Solutions. Since we have circulation diode the inductor current is not reset to zero inevery cycle, so we do see a startup transient. In other words it takes time for the inductor current to build upto its average value. The results that we gave in Problem Set 2 Solution assumed that the startup transienthad passed and we were already in periodic steady state.

Date/Time run: 09/16/02 23:16:51ps3_4b.cir - half-wave rectifier with inductive load and circulation diode D2

Temperature: 27.0


(I) ps3_4b.dat

0s 20ms 40ms 60ms 80ms 100ms

TimeI(L)

50A

0A

inductor current

V(2)

200V

100V

0VSEL>>

filter drive voltage

Figure 10: Simulation results for Problem PS3.4 – half-wave rectifier with inductive load and circulationdiode.





Problem PS3.5

Consider the half-wave and full-wave rectifier circuits shown in Figure 11. Each circuit has a commutatinginductance Lc on the ac side. The inductive lowpass filter that is on the output of each of the rectifiers hasbeen approximated by a constant dc current source of value Id. Assume that all of the diodes in the rectifiersare ideal. For each of these circuits do the following:

1. Write down all possible circuit structures (based on the diode states) and determine which of thesestructures are valid (i.e., do not violate any basic laws).

2. Write down all of the constraints on circuit variables for the valid subcircuits.

3. Calculate and sketch the source current is(t) and rectifier output voltage vd(t).

4. Calculate and sketch 〈vd〉, the average value of vd(t), as a function of the dc load current Id.

5. What would be the average value of the rectifier output voltage 〈vd〉 if the commutating inductanceLc = 0 (i.e., a short circuit)?

6. Calculate the power factor of the source for the case when Lc = 0.

PSfrag replacements

+ ++

+

− −−

−isis vd vdvsvs

D1

D1

D2

D2

D3 D4

LcLc

Id Id


Solution for half-wave rectifier with constant-current load

1. With the presence of two diodes, there are four possible states that the circuit can possess. These statesare the following: (1) D1 on, D2 off; (2) D1 on, D2 on; (3) D1 off, D2 on; (4) D1 off, D2 off. All of thesestates except (4) is valid. State (4) is invalid because it violates Kirchoff’s current law (KCL). The three validsubcircuits for the half-wave rectifier are shown in Figure 12. Note that the presence of the commutatinginductance results in subcircuit (2) being a valid structure. If Lc was not present on the ac side, subcircuit(2) would violate Kirchoff’s voltage law (KVL).

PSfrag replacements

R

++

+

+ + ++

+

+

−−

− − −−

−−

−

vC

is

is

is

Lc Lc Lc

Id Id Id

D1

D2

vd vd vdvs vs vs

iD1 iD1 vD1

iD2iD2vD2

(1) D1 on, D2 off (2) D1 on, D2 on (3) D1 off, D2 on

vLc

Figure 12: Subcircuits for the half-wave rectifier with commutation inductance Lc constant-current load Id.





2. For the subcircuits corresponding to states (1), (2) and (3) in Figure 12, one can write some inequalitiesinvolving the diode voltages and currents.

• Subcircuit (1) with D1 on and D2 off: In this subcircuit is = iD1 = Id > 0 and vD2 < 0. When vsbecomes negative, vD2 = −vs will become positive and D2 will become forward-biased and we willmove to subcircuit (2).

• Subcircuit (2) with D1 on and D2 on: In this subcircuit iD1+iD2 = Id, iD1 > 0, iD2 > 0, vLc = vs. Wewill enter this circuit mode when vs crosses 0 and will stay in this circuit mode until the load currentId transitions from one diode to other. Once the transition has occurred, one of the diodes will carryall of the current while the other will have zero current and will turn off. The turning off of the diodewill move us to either to subcircuit (1) or (3) depending of the direction of the current diversion.

• Subcircuit (3) with D1 off and D2 on: In this subcircuit vD1 < 0 and iD2 = Id > 0. When vsbecomes positive, vD1 = vs will become positive and D1 will become forward-biased and we will moveto subcircuit (2).

3. The sequence of the subcircuits is 1 → 2 → 3 → 2 → 1 → 2 → 3 · · · . In subcircuit (2), the voltage vs isdirectly applied the commutating inductance Lc as shown in Figure 12. Since a sinusoidal voltage is directlyapplied across Lc, the current is through the inductor will also be a sinusoid. The current is will eitherincrease or decrease depending on the polarity of vs. Taking into account the sequence of the subcircuits andthe expected sinusoidal transitions, the typical waveforms for the output voltage vd and the diode currentwaveforms are shown in Figure 13.

Upon closer examination of Figure 13, we see that it takes u radians for the diode currents to transitionfrom 0 to Id or from Id to 0. To determine the angle u, we can take a look at any of the transitions. Forexample, let us take a look at the interval π < ωt < π+ u. At ωt = π, iD1 = is = Id and iD2 = 0. Applyingthe initial condition on the inductor current is(ωt = π) = Id to subcircuit (2) gives:

is(ωt) = is(π) +

∫ ωt

π

vLc(ωt)d(ωt)

= Id +

∫ ωt

π

VsωLc

sin(ωt)d(ωt)

= Id −VsωLc

(1 + cos(ωt))

This expression is valid over the angular interval π < ωt < π+u. We further know from examining Figure 13that is = iD1 evaluated at ωt = π + u should give 0. Evaluating the above expression at ωt = π + u andsolving for u yields:

is(ωt = π + u) = 0 = Id −VsωLc

(1 + cos(π + u))

0 = Id −VsωLc

(1− cos(u))

⇒ u = cos−1

(

1− ωLcIdVs

)

The angle u is usually referred to as the commutation angle.

4. As shown in Figure 13, when diode D2 conducts, the output voltage vd is zero. In the absence of thecommutating inductance (i.e. Lc = 0), the voltage vd was a half-rectified sinusoid. With the commutating




Due: September 24, 2002PSfrag replacementsVs

Z0

− Vs

Z0

ωt

ωt

ωt0

0

0

π

π

π

2π

2π

2π

3π

3π

3π

4π

4π

4π

π/2

π/2

π/2

3π/2

3π/2

3π/2

5π/2

5π/2

5π/2 7π/2

7π/2

7π/2

iL(t)

vd(t)

IL0

iL(ωt = π)vs(t)

Vs

−Vs

is = iD1

iD2

Id

Id

u

u

u

π+u

π+u

2π+u

2π+u

2π+u 3π+u

3π+u

Figure 13: Output voltage vd and diode currents iD1 and iD2 for the half-wave rectifier with constant-currentload Id.

inductance, the voltage vd is zero for an additional interval u when the current is transitioning from D2 toD1. The results in an overall reduction of the average output voltage 〈vd〉. The average value of vd can becalculated as

〈vd〉 =1

2π

∫ 2π

0

vd(ωt)d(ωt) =Vs2π

∫ π

u

sin(ωt)d(ωt)

=Vs2π

(1 + cos(u)) =Vs2π

(

2− ωLcIdVs

)

=Vsπ

(

1− ωLcId2Vs

)

Note that the term Vs/π is the average value of the output voltage in the absence of the commutationinductance. However, for a given value of the commutation inductance, as the load current Id is increased,average output value 〈vd〉 decreases. The plot of the average output voltage versus output current is shownin Figure 14.

5. Average value of the output voltage in the absence of the commutating inductance is Vs/π. This wasalready shown in the Lecture 7 Notes.





PSfrag replacements

〈vd〉

Vs

π

Id2Vs

ωLc

Figure 14: Average output voltage 〈vd〉 as a function of load current Id for a half-wave rectifier.

6. The power factor for the case with zero commutation inductance can be found by examining the waveformsshown in Figure 3 of Lecture 7 Notes. Or we can take our results from above and set the commutation angleu = 0.

kp =〈p(t)〉

S=〈vs(t)is(t)〉Vs,rmsIs,rms

=〈vd(t)Id〉

Vs,rmsIs,rms=

Id〈vd(t)〉Vs,rmsIs,rms

So to figure out the power factor all we need to do is to figure out 〈vd(t)〉 Vs,rms and Is,rms. These are allpretty easy to calculate.

〈vd〉 =1

2π

∫ 2π

0


∫ π

0

sin(ωt)d(ωt) =Vsπ

Is,rms =

√

1

2π

∫ 2π

0

i2sd(ωt) =

√

1

2π

∫ π

0

I2dd(ωt) =

Id√2

Vs,rms =Vs√2

Putting these values into the power factor expression yields

kp =Id

Vs

πVs√

2

Id√2

=2

π≈ 0.637





Solution for full-wave rectifier with constant-current load

1. With the presence of four diodes, there are sixteen possible subcircuits that the circuit can possess. Thesestates and their validity are given in the following table:

Subcircuit D1 D2 D3 D4 valid?(1) off off off off ×, violates KCL, no path for Id to flow(2) off off off on ×, violates KCL, no path for Id to flow(3) off off on off ×, violates KCL, no path for Id to flow(4) off off on on ×, violates KCL, no path for Id to flow(5) off on off off ×, violates KCL, no path for Id to flow(6) off on off on ×, if D2 and D4 are on, both D1 and D3 must be on(7) off on on off X

(8) off on on on ×, if D2 and D4 are on, both D1 and D3 must be on(9) on off off off ×, violates KCL, no path for Id to flow(10) on off off on X

(11) on off on off ×, if D1 and D3 are on, both D2 and D4 must be on(12) on off on on ×, if D1 and D3 are on, both D2 and D4 must be on(13) on on off off ×, violates KCL, no path for Id to flow(14) on on off on ×, if D2 and D4 are on, both D1 and D3 must be on(15) on on on off ×, if D1 and D3 are on, both D2 and D4 must be on(16) on on on on X (commutation (7) ←→ (10))

The only valid subcircuits are (7), (10) and (16). These subcircuits for the full-wave rectifier are shown inFigure 15.

PSfrag replacements

++ +

+ ++

− − −− − −

is is isvd vd vdvs vs vs

D1 D1 D1D2 D2 D2

D3 D3 D3D4 D4 D4

Lc LcLc

Id Id Id

(7) (10) (16)

Figure 15: Valid subcircuits for the full-wave rectifier.

2. For the subcircuits corresponding to subcircuits (7), (10) and (16) in Figure 15, one can write someinequalities involving the diode voltages and currents.

• Subcircuit (7) with D2, D3 on and D1, D4 off: This subcircuit is valid for vs < 0 during which is = −Id.

• Subcircuit (10) with D1, D4 on and D2, D3 off: This subcircuit is valid for vs > 0 during which is = Id.

• Subcircuit (16) with D1, D2, D3 & D4 on: This subcircuit is valid during the zero crossings of thesource voltage vs(t) when the source current is(t) transitions between Id and −Id in both directions.

3. The sequence of the subcircuits is 7 → 16 → 10 → 16 → 7 → 16 · · · . In subcircuit (16), the voltage vsis directly applied the commutating inductance Lc. Since a sinusoidal voltage is directly applied across Lc,the current is through the inductor will also be a sinusoid. The current is will either increase or decrease





depending on the polarity of vs. Taking into account the sequence of the subcircuits and the expectedsinusoidal transitions, the typical waveforms for the output voltage vd and the diode current waveforms areshown in Figure 16.

Upon closer examination of Figure 16, we see that it takes u radians for the source currents (and alsothe diode currents) to transition from −Id to Id or from Id to −Id. To determine the angle u, we can takeconsider any of the transitions. For example, let us take a look at the interval π < ωt < π + u when we arein subcircuit (10). At ωt = π, iD1 = iD4 = is = Id and iD2 = iD3 = 0. Applying the initial condition on theinductor current is(ωt = π) = Id to subcircuit (10) gives:

is(ωt) = is(π) +

∫ ωt

π

vLc(ωt)d(ωt)

= Id +

∫ ωt

π

VsωLc

sin(ωt)d(ωt)

= Id −VsωLc

(1 + cos(ωt))

This expression is valid over the angular interval π < ωt < π+u. We further know from examining Figure 16that is = iD1 = iD4 evaluated at ωt = π+u should give −Id. Evaluating the above expression at ωt = π+uand solving for u yields:

is(ωt = π + u) = −Id = Id −VsωLc

(1 + cos(π + u))

−Id = Id −VsωLc

(1− cos(u))

⇒ u = cos−1

(

1− 2ωLcIdVs

)

The angle u is usually referred to as the commutation angle.

4. As shown in Figure 16, when all diodes conduct during commutation, the output voltage vd is zero. In theabsence of the commutating inductance (i.e. Lc = 0), the voltage vd was a half-rectified sinusoid. With thecommutating inductance, the voltage vd is zero for an additional interval u when the current is transitioningto/from Id and −Id. This results in an overall reduction of the average output voltage 〈vd〉. The averagevalue of vd can be calculated as

〈vd〉 =1

2π

∫ 2π

0


∫ π

u

sin(ωt)d(ωt) +Vs2π

∫ 2π

u+π

sin(ωt)d(ωt)

=Vsπ(1 + cos(u)) =

Vsπ

(

2− 2ωLcIdVs

)

=2Vsπ

(

1− ωLcIdVs

)

Note that the term 2Vs/π is the average value of the output voltage in the absence of the commutationinductance. However, for a given value of the commutation inductance, as the load current Id is increased,average output value 〈vd〉 decreases. The plot of the average output voltage versus output current is shownin Figure 17.





PSfrag replacementsVs

Z0

− Vs

Z0

ωt

ωt

0

0

π

π

2π

2π

3π

3π

4π

4π

π/2

π/2

3π/2

3π/2

5π/2

5π/2

7π/2

7π/2

iL(t)

vd(t)

IL0

iL(ωt = π)vs(t)

Vs

−Vsis = iD1

iD2

Id

u

u π+u

π+u

2π+u

2π+u

3π+u

−Id

is(t)

Figure 16: Output voltage vd and the source current is(t) for the full-wave rectifier with constant-currentload Id.

5. Average value of the output voltage in the absence of the commutating inductance is 2Vs/π. This wasalready shown in the Lecture 8 Notes.

6. Let us try to apply the power factor calculations to the full-bridge rectifier with a constant-current loadas shown in Figure 18 where the source voltage vs(t) = Vs sin(ωt). Also illustrated in the figure are thesource current is(t) and the rectifier output voltage vd(t). We now have all of the information necessary tocalculate the power factor of the source.First let us calculate the rms values of the source variables. The rms value of the source voltage vs(t) andsource current is(t) are given by

Vs,rms =Vs√2

and Is,rms = Id (9)

The average power supplied by the source is given by

〈p(t)〉 = 〈vs(t)is(t)〉 (10)

Since the rectifier is lossless, all of the power supplied by the source is delivered to the load; therefore, averagepower can also be calculated as

〈p(t)〉 = 〈vd(t)Id〉 = Id〈vd(t)〉 = Id ·1

T

∫ T

0

vd(t)dt = Id ·2

T

∫ T/2

0

Vs sin(ωt)dt = Id2Vsπ

(11)

Now the power factor can be calculated by substituting (9) and (11) into the expression for power factor

kp =〈p(t)〉

S=

〈p(t)〉Vs,rmsIs,rms

=Id

2Vs

πVs√

2Id

=2√2

π≈ 0.9 (12)





PSfrag replacements

〈vd〉

Vs

2π

IdVs

ωLc

Figure 17: Average output voltage 〈vd〉 as a function of load current Id for a full-wave rectifier.

PSfrag replacements

++

− −

is

is

vd

vd

vs

Vs

−Id

D1

D2

D3

D4

LcId

Idωt

ωt

π

π

2π

2π

3π

3π

4π

4π

Figure 18: Full-bridge rectifier with a constant-current load Id.


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ECE 445 Analysis and Design of Power Electronic Circuits ...vahe/fall2002/ece445/pdf/... · ECE 445 Analysis and Design of Power Electronic Circuits ProblemSet3Solutions Fall2002