ECA1212Introduction to Electrical &

Electronics EngineeringChapter 6: Field Effect Transistor

by Muhazam Mustapha, October 2011

Learning Outcome

• Be able to explain some basic physical theory and operation of FET

• Be able to do calculation on DC and AC analysis on FET circuit

By the end of this chapter students are expected to:

Chapter Content

• Theory of FET

• FET Operation

• FET in Digital Circuit

Field Effect Transistor

CO1

Field Effect Transistor

• FET is a piece of electronic device that conducts electricity by the control of a gate

• It can be considered as a voltage controlled resistor or voltage controlled current source

Gate

• Current flows through the center body of channel from terminals called drain to source

• Gate is a plate not touching the substrate

Drain

Source

Channel

CO1

FET Types

• There are many types of FET– MOSFET – Metal Oxide Semiconductor FET– JFET – Junction FET– NMOS – n-channel MOSFET– PMOS – p-channel MOSFET

• We will cover mostly NMOS

CO1

Channel Types

• FET is also characterized by its channel

• n-channel– The majority carrier in the channel is electron

• p-channel– The majority carrier in the channel is hole

CO1

Modes

• Enhancement mode– FET is normally NOT conducting current even

when given voltage at drain and source– Gate is to increase the current

• Depletion mode– FET is normally conducting current when

given voltage at drain and source– Gate is to decrease the current

CO1

Depletion Mode

Drain

Source

Gate

• p-channel– Current flow is reduced by

putting a positive voltage at gate to repel holes flow and finally block the current

– The more positive the gate, the less current flow

+ve

−ve

p-channel

Hole Flow

Gate’s electric field repelling holes

+ve

CO1

Depletion Mode

Drain

Source

Gate

• n-channel– Current flow is reduced by

putting a negative voltage at gate to repel electrons flow and finally block the current

– The more negative the gate, the less current flow

+ve

−ve

n-channel

Electron Flow

Gate’s electric field repelling electrons

−ve

CO1

Enhancement Mode (PMOS)

Drain

Source

Gate

• p-channel– When negative voltage is put

to drain that is made of highly p dopant (p+), reverse bias junction is formed at drain – hence no current flows

– Negative voltage is put to gate to attract holes and effectively compensate the reverse biases – until current can flow

−ve

+ve

n-substrate

Gate’s electric field attracting holes

p-channel formation

p+

−ve

p+

Hole Flow

CO1

Enhancement Mode (NMOS)

Drain

Source

Gate

• n-channel– When positive voltage is put

to drain that is made of highly n dopant (n+), reverse bias junction is formed at drain – hence no current flows

– Positive voltage is put to gate to attract electrons and effectively compensate the reverse biases – until current can flow

+ve

−ve

p-substrate

Gate’s electric field attracting electrons

n-channel formation

n+

+ve

n+

Electron Flow

CO1

Circuit Symbol and Notations

n-channel

p-channel

Depletion Enhancement JFET

CO1

Operation Region

CO1

I-V Characteristic

Ohmic Region

VGS = 5.0V

VGS = 4.5V

VGS = 4.0V

VGS = 3.5V

VGS = 3.0V

VGS = 2.5V

ID, mA

Saturation Region

Cutoff Region

VDS, V0 1 2 3 4 5 6 7 8 9

15

10

5

0

CO1

Operation Region

• Cutoff– VGS < VT and VGD < VT

– No current flow

• Ohmic / Triode– VGS > VT and VGD > VT

– Linear I-V characteristic

CO1

Operation Region

• Saturation– VGS > VT and VGD < VT

– ID is controlled by VGS (Saturation Region Formula):

2)( TGSD VVKI

Conductance parameter

Threshold voltage – minimum voltage to form a conducting channel

CO1

FET In Digital Circuit

CO1

NAND, NOR and NOT Gates

CO1