Dynamic Simulation of DFIG Wind Turbines onFPGA Boards

Hao Chen, Student Member, IEEE, Song Sun, Student Member, IEEE,Dionysios C. Aliprantis, Senior Member, IEEE, and Joseph Zambreno, Member, IEEE

(1)

(2)

(3)

(4)

(5)

(6)

(9)

where p == -it is the differentiation operator; R; and R~ are thestator and rotor resistances; L s and L~ are the stator and rotorinductances; t.; is the magnetizing inductance; vgs' vds' igs'and ids are the qd-axes stator voltages and currents; v~~, v~sr'

i~sr' and i'dr are the qd-axes rotor voltages and currents; W r isthe rotor angular electrical speed; Tm and T; are mechanicaland electromagnetic torque; P is the number of poles; J isthe total rotor inertia; and B is a friction coefficient.

The wind turbine model is based on the relation betweenthe upstream wind speed V w and the mechanical power Pmextracted from the wind [10]. The pertinent equations are

Pm == ~P1fR~Cp(A,(3)V~ (7)

Cp (A, (3) = 0.5176 (11,6 - 0.4(3 - 5) e -A~l + 0.0068A (8)

1 1 0.035--------x, A+ 0.08(3 (33 + 1

where p is the air density; R w is the wind turbine radius;cp (A, (3) is the performance coefficient; (3 is the pitch angle indegrees; and A is the tip-speed ratio given by A == wwRw/vw,where Ww is the wind turbine rotor speed. Note that the relationbetween Ww and W r is determined by the gearbox ratio. For(3 == 0, the performance coefficient attains its maximum valuec;ax == 0.48 for an optimal Aop == 8.10. The mechanical torqueapplied to the generator shaft is T m == E2 Pm .

W r

B. DFIG Control

II. MODELING AND CONTROL

A. Induction Machine and Wind Turbine Model

The fifth-order induction machine model in the stationaryreference frame is given by [9]:

I. INTRODUCTION

Abstract-This paper presents the implementation of a dy­namic simulation of a doubly fed induction generator (DFIG)­based wind turbine on a field-programmable gate array (FPGA)board. The explicit fourth-order Runge-Kutta numerical integra­tion algorithm is used to obtain the system dynamic response.The FPGA simulation results and speed improvement are val­idated versus a Matlab/Simulink simulation. Using FPGAs ascomputational engines can lead to significant simulation speedgains when compared to a typical PC computer, especially whenoperations can be efficiently parallelized on the board.

A field-programmable gate array (FPGA) is a reconfig­urable digital logic platform, which allows for the parallelexecution of millions of bit-level operations in a spatiallyprogrammed environment. Research has been under way onthe modeling and real-time simulation of various electricalpower components using FPGAs as computational [1]-[6]and non-computational [7], [8] devices. Herein, the goal isto implement an entire dynamic simulation of a doubly fedinduction generator (DFIG) wind turbine system on a singleFPGA board as fast as possible (i.e., without being constrainedby the requirement of real-time simulation).

The individual mathematical operations required by numer­ical integration algorithms are generally simple in terms ofrequired logic (additions and multiplications). Hence, hard­ware implementations can be used to increase efficiency byreducing the overhead introduced by software, thus leadingto simulation speed gains of two orders of magnitude whencompared to PCs. Moreover, complex systems requiring thesimultaneous solution of numerous differential equations forsimulation are inherently conducive to a parallel mappingto physical computational resources. Therefore, an FPGAbecomes an attractive choice for simulating complex electricalpower and energy systems. Herein, a DFIG wind turbinesystem model is designed using very high speed integratedcircuit hardware description language (VHDL), synthesizedand verified using Xilinx integrated software environment(ISE). The basic steps of designing an explicit fourth-orderRunge-Kutta (RK4) numerical ordinary differential equation(ODE) solver on the FPGA platform are outlined.

An essential characteristic of DFIG control strategy is that

The authors arewith theDepartment of Electrical and Computer Engineer- the generated active and reactive powers can be controlleding, Iowa State University, Ames, lA, 50011, USA. Email: {chenh.sunsong.independently.ltis common to use the air-gap flux ori­dali, zambreno}@iastate.edu. ented vector control [11] or the stator flux oriented vector

This project was financially supported by the "CODELESS: COnfigurableDEvices for Large-scale Energy System Simulation" project, funded by the control [12]-[14], under the assumption of negligible statorElectrical Power Research Center (EPRC) at Iowa State University. 39 resistances. In particular, it has been shown that stator flux

978-1-4244-5901-8/10/$26.00 ©2010 IEEE

Balanced3-Phase

Voltage Set

B,

(;i; K: iahc

Be 3-Phase Inductor

v;* ,- R LVq vaGrid-Side vh' K' PWM

v;* ,,-Converter Vcvd

B, ig vdc+ -(.

OJr, Bri,

v;rRotor-Side ,

PWMvh,

Converter v;"

+

T,Calculator

' er: _ 'dd +

Fig . I. Contro l block diagram for DFIG

orientation can cause instability under certain operating con­ditions [15]. Herein, a stator voltage oriented vector controlwithout the assumption of negligible stator resistances ispresented. The overall control structure of back-to-back pulse­width modulated (PWM) converters is shown in Fig. I. Thereference frame transformation matrices K~ , K :, K ;, sK e,eK s, and eK r are defined in [9].

I) Rotor current control: Aligning the stator voltage vectorwith the q-axis , the induction machine voltage equations in thesynchronous reference frame can be written as

where a = 1 - L;,/LsL~ . Substituting (14) and (15) into (12)and (13) yields

( 16)

(17)

where "« and Vd are compensating feedforward voltages givenby

(20)

(18)

(19)

v = L ", PAe + (w - w ) [aL' i'e + L ", Ae ]q L s qs e r r dr L s dsV = L ", PAe - (w - w ) [aL' i'e + L ", Ae ]d L s ds e r r qr L s qs

and K q , Tq , Kd' and Td are parameters of two PI currentcontrollers. The stator flux linkages (A~s ' Ads) are computedfrom the stator and rotor current measurements. The deriva­tives PA~s and pAds are obtained from (10) and (I I).

2) Torque and power control: The optimal electromagnetictorque reference T; shown in Fig. I, after compensating forthe friction losses , is given by [12], [13]

P K 3K d?axw2 2T * = _ 1 2 p r _ B - w

e 2 A3 P rap

(10)

(II)

(12)

(13)

where Vs is the stator voltage amplitude, and We is the statorvoltage angular frequency. The rotor flux linkage equations are

(14) .where K 1 = 2Rw /GP, K 2 = ~p7rR~ , and G IS the gearbox

( 15)40 ratio .

(32)

(31)

eX == 2x log2 e

== 2 Xi2 X j == 2xiexjln2, X > 0

eX == 2x log2 e

where Xi and X f are the integer and fractional part ofx log2 e, respectively. 1 Since 0 < x f In 2 < 1 in (31) ando< (xf + 1) In 2 < 1 in (32), the 32 bits representing thesedecimal fractions can be divided into 3 sections: bits 2- 1

to 2-8 (XH), bits 2-9 to 2- 16 (XL) and bits 2- 17 to 2-32

reference Q;, the DC-link voltage reference vdc' and the three­phase RL circuit d-axis current reference in the synchronousreference frame id* . The output variables are the stator-sideactive and reactive power.

As shown in Fig. 2, four functional modules are used toestablish the entire system. The "Stator Voltage Input" moduleis responsible for the generation of vgs and vds. The "ODEFunction" and "Vector Update" modules constitute the RK4solver. The "Output" module implements the calculation ofthe stator-side active and reactive power (P; and Qs) and themachine rotor qd-axes currents in the synchronous referenceframe (i~er and i~er). These modules have been developed usingVHDL in ModelSim, which is a verification and simulationtool for VHDL designs. All variables and parameters are repre­sented as signed fixed-point numbers with 13 bits representingthe integral part, and 32 bits representing the fractional part.This provides a numerical range that can accommodate everyvariable involved in the simulation, with a resolution of 2-32.For economizing FPGA resources, the per unit system is usedin order to decrease the necessary number of bits (becausevariables are expected to be close to 1.0).

Every RK4 iteration shown in Fig. 3 consists of six steps.The "ODE Function" module executes the evaluation off(t, x). The "Vector Update" module is responsible for thealteration of x in f( t, x) during steps 2, 3, and 4, as well as thecalculation of (25) in step 5. Since vgs and vds are dependenton the time t, the "Stator Voltage Input" module shouldgenerate the appropriate vgs and vds for the "ODE Function"module. Specifically, vgs(tn - l + O.5h) and vds(tn - l + O.5h)are generated during step 1 and stored for the usage ofthe "ODE Function" module in step 2 and step 3, whilevgs(tn - l + h) and vds(tn - l + h) are generated during step 3and stored for the usage of the "ODE Function" module instep 4 and step 1 of the next iteration. Note that the "StatorVoltage Input" module and the "ODE Function" module areexecuted in parallel in step 1. A similar parallel executionis also performed in step 3. On the other hand, the "ODEFunction" module and the "Vector Update" module have tobe executed in serial pattern because the inputs of one strictlydepend on the outputs of the other.

To design a sinusoidal function involved in the' Stator Volt­age Input' module, a look-up table approach is followed [17].The evaluation of the exponential function involved in (8) isbased on the following identities [18]:

k- == f (tn-I, Xn-l) (27)

k 2 == f (tn - l + O.5h, X n-l + O.5hk1 ) (28)

k 3 == f (tn - l + O.5h, X n-l + O.5hk2 ) (29)

k., == f (tn - l + h, X n-l + hk3 ) . (30)

III. FPGA IMPLEMENTATION

3) Grid-side converter control: The purpose of the grid­side converter is to regulate the DC-link voltage [12]. Thevector control approach shown in Fig. 1 is used. Aligning thestator voltage vector with the q-axis, the voltage equations inthe synchronous reference frame can be written as

v~s == Vs == Ri~ + Lpi~ + weLi d + v~ (21)

vds == 0 == Rid + Lpi d - weLi~ + vd (22)

where Rand L are the resistance and inductance of thecurrent's filter inductors, and vg, vd' i~, and id are the qd-axisconverter input voltages and currents. From (21) and (22), theconverter voltage references vg* and vd* are

e* e (R· e+ L .e) + v: u:vq == vq == - ~q p~q s - W e ~d

== -Kqg (1 + _1_) (i~* - i~) + Vs - weLi dTqgS

(23)

where X n is the RK4 approximation of x(tn ) (i.e., the exactsolution), h is the time step, and

Vd* == vd == - (Rid + Lpi d) + weLi~

== -Kdg (1 + _1_) (id* - id) + weLi d (24)Tdg S

where K qg, T qg, Kdg, and Tdg are parameters of two PI currentcontrollers. Herein, i d* is arbitrarily set to zero in order to setthe stator-side reactive power to zero, but this is not alwaysnecessary in practice.

A. Simulation Architecture

The transient response of the system is obtained by theRK4 numerical integration algorithm [16]. This is a fixed-stepexplicit integration algorithm, which is based on simple nu­merical calculations (additions and multiplications), and is thusstraightforward to implement on the FPGA. The RK4 methodfor the initial value problem (px == f( t, x), x(to) == xo) isdescribed by:

X n == X n-l + ~ (k, + 2k2 + 2k3 + k 4 ) (25)

t« == t n - l + h (26)

The ODEs representing the entire DFIG system, expressedin the form px == f(t, x), are derived by combining theinduction machine model, wind turbine model and DFIGcontrol strategy. The state variables are igs' ids' i~sr' i1r' W r, theintegrators of four PI controllers for the rotor-side converter(X6, X7, X8, and X9), the three-phase RL circuit qd currents inthe stationary reference frame (igand id)' the DC-link voltageVdc, and the integrators of three PI controllers for the grid-side

converter (XI3, X14, and XIS). The input variables are vgs ' IPor example, if xlog2 e = 2.3, then Xi = 2 and xf = 0.3; if

vds' the wind speed vw , the pitch angle (3, the reactive power41 xlog2 e = -2.3, then Xi = -2 and xf = -0.3.

Clock Signal (ClK)

(

SteSteSteSte

1V I\" Step 6:fJ Runge-Kutta ODE Solver

P, Q,Q' xn _1 -f- XII

~ I ,~ i;:U = .,

,

uL Output MemoryVdc L Ii;* on

x" BoardU'---V

ODE

rio'" k,

Step 5:

Stator VS Function Vector xn (Eq. 23)ods

f'(r ,x)Step 2: k ,

UpdateVoltage Step 3: k ,Input Step 4: k , I-

~ f----

v' . = [v;'(I)] Iqds V~,(I)

p1: I ~I"_I ( Step 1: x ~ X"_IP 2: I ~ 1"_1+ O.5h Step 2: x~ X,,_I + O.5hk l

p 3: I ~ 1"_1+ O.5h Step 3: x ~ X"_I + O.5hk 2

p4: 1~1"_I +h Step 4: x ~ X,,_I + hk,

Fig. 2. FPGA implementation of DFIG wind turbine system

iterationn-1

iterationn

iterationn+l

of them contains 256 elements. eXT is calculated by Taylorseries expansion ( e XT ~ 1 + XT ). Thus,

e X = 2Xi

eXll

eXL (1 + XT), x > 0 or

eX = 2 x i -l e x ll e XL(1 + XT ), x < O.

The multiplication by 2Xi or 2x i - 1 is executed by a bit-shiftingoperation.

B. Synth esis and Implementation

After the functionality and results of all modules designedusing VHDL were validated in the ModelSim environment,the Xilinx ISE was used to develop , synthesize, and verifythe substantial top-level wrapper module together with theDFIG wind turbine system model. The target FPGA devicewas Xilinx Virtex-5 XC5VLX330. The post-place and routereport presented the FPGA hardware resources usage as shownin Table I, and the maximum frequency of the clock signalthat can be applied is 221 .533 MHz. Generall y, the consump­tion of FPGA hardware resources increase s with the modelcomplexity. Note that the entire design for the DFIG windturbin e system must fit within the resource limitation of thetarget FPGA device . Otherwise, an FPGA device with morehardware resources should be chosen or the model shou ld beredesigned in order to meet the requirement of the FPGAdevice. The final system will be integrated on a developmentboard that features the XC5VLX330 device-for example,Xilinx Virtex-5 and DDR2 SDRAM multi-application platformboard . The simulation output data will be stored in the memoryembedded on the development board .

Fig. 3. RK4 iteration processIV. S IM UL ATION RE SULTS

The simulation parameters are shown in Table II. The(XT) . e Xll and e XL are obtained using two exponential look- moment of inertia J was set to 2 kg-m'' (an unrealistically lowup tables (named as 'high 8 table ' and ' low 8 table ') . Each42 value) in order to reduce the simulation time required to reach

REFERENCES

[1] M. Martar, M. Adbel-Rahman, and A.-M. Soliman, "FPGA-based real­time digital simulation," in Int. Conj. Power Syst. Transients, Montreal,Canada, Jun. 2005.

[2] P. Le-Huy, S. Guerette, L. A. Dessaint, and H. Le-Huy, "Real-timesimulation of power electronics in power systems using an FPGA," inCanadian Conj. Electr. Compo Eng., May 2006, pp. 873-877.

[3] --, "Dual-step real-time simulation of power electronic convertersusing an FPGA," in IEEE Int. Symp. Ind. Electron., Montreal, Canada,Jul. 2006, pp. 1548-1553.

[4] J. C. G. Pimentel and H. Le-Huy, "Hardware emulation for real-timepower system simulation," in IEEE Int. Symp. Ind. Electron., Montreal,Canada, Jul. 2006, pp. 1560-1565.

[5] J. C. G. Pimentel, "Implementation of simulation algorithms in FPGAfor real time simulation of electrical networks with power electronicsdevices," in IEEE Int. Conj. Recorifig. Compo & FPGA's, Sep. 2006, pp.1-8.

[6] G. G. Parma and V. Dinavahi, "Real-time digital hardware simulation ofpower electronics and drives," IEEE Trans. Power Del., vol. 22, no. 2,pp. 1235-1246, Apr. 2007.

[7] T. Maguire and J. Giesbrecht, "Small time-step « 2J-LSec) VSC modelfor the real time digital simulator," in Int. Conj. Power Syst. Transients,Montreal, Canada, Jun. 2005.

[8] C. Dufour, J. Belanger, S. Abourida, and V. Lapointe, "FPGA-basedreal-time simulation of finite-element analysis permanent magnet syn­chronous machine drives," in IEEE Power Electron. Spec. Conj., Jun.2007, pp. 909-915.

[9] P. C. Krause, O. Wasynczuk, and S. D. Sudhoff, Analysis of ElectricMachinery and Drive Systems, 2nd ed. IEEE Press, 2002.S. Heier, Grid Integration of Wind Energy Conversion Systems, 2nd ed.Chichester, England; Hoboken, NJ: Wiley, 2006.M. Yamamoto and o. Motoyoshi, "Active and reactive power controlfor doubly-fed wound rotor induction generator," IEEE Trans. PowerElectron., vol. 6, no. 4, pp. 624-629, Oct. 1991.R. Pena, J. C. Clare, and G. M. Asher, "Doubly fed induction generatorusing back-to-back PWM converters and its application to variable-speedwind-energy generation," lEE Proc. Elec. Power Appl., vol. 143, no. 3,pp. 231-241, May 1996.A. D. Hansen, P. Sorensen, F. lov, and F. Blaabjerg, "Control ofvariable speed wind turbines with doubly-fed induction generators,"Wind Energy, vol. 28, no. 4, pp. 411-434, Jun. 2004.R. Fadaeinedjad, M. Moallem, and G. Moschopoulos, "Simulation ofa wind turbine with doubly fed induction generator by FAST andSimulink," IEEE Trans. Energy Convers., vol. 23, no. 2, pp. 690-700,Jun. 2008.A. Petersson, L. Harnefors, and T. Thiringer, "Comparison betweenstator-flux and grid-flux-oriented rotor current control of doubly-fedinduction generators," in IEEE 35th Annual Power Electr. Spec. Conj.,vol. 1, 20-25 Jun. 2004, pp. 482-486.W. Gautschi, Numerical Analysis: An Introduction. Boston: Birkhauser,1997.

[11]

[10]

[12]

the performance advantage of FPGAs compared to PC-basedsimulations.

FPGAs represent an interesting possibility for simulatingmore complex electrical power and power electronics-basedsystems because of their flexibility, high processing rates andpossibility to parallelize numerical integration computations.In principle, FGPAs could be coupled with other simulationplatforms to perform multi-rate co-simulation of complexsystems. To accelerate the dynamic simulations, FPGAs wouldsimulate faster subsystems that require smaller integration timesteps. However, it has been observed that the data exchangerate with an FPGA can be a critical bottleneck for developingsuch co-simulation applications, especially when it is requiredto achieve real-time simulation speeds. On the other hand, apipeline VHDL design [19], [20] of a DFIG wind energy con­version system can potentially enable the dynamic simulationof entire wind farms (containing hundreds of turbines) on asingle FPGA board.

II Used I Available I Utilization I

V. CONCLUSION

Logic Utilization

Number of 86288 207360 41%Slice Registers

Number of Slice LUTs 80997 207360 39%(Look Up Tables)

Number of LUT-FF 91913 207360 44%(Flip Flop) pairs

TABLE IXILINXVIRTEX-5 XC5VLX330 RESOURCES USAGE SUMMARY

This paper presented the FPGA implementation of a DFIG [13]

wind turbine system dynamic simulation, using the RK4numerical integration algorithm. The entire system has been [14]

developed using VHDL, synthesized using the Xilinx ISE, andwill be implemented on an FPGA board. An optimal VHDLdesign should be sought for the purpose of economizing [15]

FPGA hardware resources, especially when the model hashigh complexity. A comparison between the simulation resultsfrom FPGA and Simulink demonstrates the validity of this [16]

implementation. The 40x simulation speed gain demonstrates 43

a steady-state operating condition. An average-value model isused to represent the rotor-side and grid-side converters shownin Fig. 1. The ModelSim clock frequency was (arbitrarily) setto 200 MHz, a value less than the maximum clock frequency(221.533 MHz) in the post-place and route report of the XilinxISE. The simulation time-step h was 10-4 s.

The exact same DFIG wind turbine system was also im­plemented in Matlab/Simulink. The verification of the resultscoming from ModelSim was performed versus a Simulinksimulation using the ODE23tb solver with a maximum timestep of 10-5 s. Fig. 4 shows the machine stator and rotor qd­axes currents in the synchronous reference frame (i~s' ids' i~er'

and i~er)' the stator-side active and reactive power (P; and Qs),the rotor angular electrical speed W r , and the DC-link voltageVdc. The wind speed V w was stepped down from 7 mls to 5 mlsat t == 1 s, and the reactive power reference Q; was steppedup from 10 kVAR to 50 kVAR at t == 3 s. Note that in theper unit system, the value of i~s is equal to that of P; and thevalue of ids is equal to that of Qs. The ModelSim waveformsare superimposed on the Simulink waveforms, but they are soclose that differences cannot be distinguished.

To compare simulation speed, we ran the simulation usingthe ODE45 and ODE23 integration algorithms of Simulinkwith maximum step size of 10-4 s (typically the two "sim­plest" available solvers), because they are implementations ofthe explicit Runge-Kutta algorithm, albeit of a variable-stepnature. The simulation speed was further increased by usingthe "Accelerator" mode of Simulink, which replaces normalinterpreted code with compiled code. The simulation times onan Intel Core2 Duo 2.2 GHz computer were 6.7 s for ODE45and 4.7 s for ODE23. The FPGA simulation time predictedby ModelSim was 0.166 s, which represents a 40x speed gain.The simulation time will be further decreased if the clockfrequency can be set to a higher value, if the simulation timestep h is increased, or if a lower-order integration algorithm(e.g., the trapezoidal algorithm) is used.

TABLE IISIM ULA TIO N PARA M ET ERS [14]

Rs 1.4 x 10 3 Il P 4 (3 0° TT e 0.0158 Kv,/r 0.577 3

R' 9.92 X 10- 4 Il W e 27r60 rad/s C 4000 JLF K Q , 0.00 24 TVd c 0.02r

Ls 1.616 mH J 2 kg-m/ R 0.1 Il TQ " 0.01 58

L' 1.608 mH Prated 2MW L 1.75 mH K q,Kd 0.0474r

Lm 1.526 mH Rw 35 m «: 700 V Tq , Td 0.01 35

VS 690V2/ 3 V G 120 ' e * OA K qg ,Kdg 1.3~d

B 0.01 N·m·s p 1.25 kg/rn'' KTe 0.4 488 Tqg ,Tdg 0.0023

44

[17] II. Chen, S. Sun, D. C. Aliprantis, and J. Zambreno, "Dynamic simual­tion of electric machines on FPGA boards," in IEEE Int. Electr. Mach.and Drives Coif" May 2009, pp. 1842- 1847.

[18] E. Jamro and K. Wiatr, "FPGA implementation of 64-bit exponentialfuncIion for HPC," in IEEE Int. Con! Field Programmable Logic andApplications, Aug. 2007, pp. 718-721.

[19] P. P. Chu, RTL Hardware Design Using VHDL: Coding f or Efficiency,Portability, and Scalability. Hoboken, New Jersey: Wiley-Intersc ience,2006.

[20] J. Cavanagh, Verilog HDL: Digital Design and Modeling. Boca Raton,Florida: CRC Press, 2007.

lI ao C hen received the RE. and M.S. degree in Electr ical Engineering fromXi'a n Jiaotong University, China, in 2002 and 2005. He is currently workingtoward the Ph.D. degree at the Department of Electrical and Computer Engi­neering, Iowa State University, Ames, lA, USA. His research interests includepower elecIronics, electr ic machine drives, and wind energy conversion.

Song Sun is currently working toward the Ph.D. degree at the Departmentof ElecIrical and CompuIer Engineering, Iowa State UniversiIy, Ames, lA,USA. His research interests include designing efficient hardware architecturefor data mining applications.

Dionysios C. Aliprantis (SM '09) received the Diploma in Electrical andComputer Engineering from the National Technical University of Athens ,Greece, in 1999, and the Ph.D. from Purdue University, West Lafayette, IN,in 2003. He is currently a Litton Industries assistant professor of Electricaland Computer Engineering at Iowa State UniversiIy, Ames , lA, USA. Hisinterests include the modeling and simulation of electric machines and powersystems, power electronics and controls, and renewable energy applications.

•Joseph Zamhreno is an assistant professor of Electr ical and ComputerEngineering at Iowa State University. His research inIerests include computerarchitecture and compilers, the use of reconfigurable computing as a generalenabling technology, and the use of design automation to address variousaspecIs of securiIy and trust. He has a BS, MS, and PhD in electrical andcomputer engineering from Northwestern University.