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Dual Active Bridge Converter
Amit Jain
Peregrine Power LLC
now with
Intel Corporation
2 © Amit Jain
Lecture 1: Operating Principles
Vdc2 vp
S3s
–
S2s
S1s
–
+
L
iL
+
vs Vdc1
+
–
S1
S2
S3
S4 Np : Ns –
+
S4s
HB1 HB2
Implementation with
H-Bridges
Lagging current results
in ZVS for all switches
L
VVP
sin21
o
11 0VV 22 VV
High Frequency Square
wave (phase-shifted
fundamentals)
Sinusoidal
Voltages
Bi-directional transfer
Lagging current
Ljo
11 0VV 22 VV
00
basePmP
1
Lecture 2: Design
Key parameter is inductance
Application based trade-off
Magnetizing inductance for
increasing ZVS range
Integrated magnetics realization
3 © Amit Jain
0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.250
5
10
15
20
25
min1
[deg]
min2
[deg]
0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.250
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
Po,m
in [
pu]
Vdc2 [pu]
Inductance [ H] 40
60
80
100
120
ZVS Boundary
Increasing L ZVS range (sw loss) decreases with L
Inductor size increases with L
Currents (conduction loss) increases with L
Capacitance size increases with L
Transformer size increases with L
+ vp –
Φp Φs ΦL
+ vs –
40 50 60 70 80 90 100 110 12014
16
18
20
Variation with L, Po = 10kW Vdc2
= Vdc2,nom
controlled to obtain Po
ip,peak
[A]
ip,rms
[A]
is,rms
[A]
40 50 60 70 80 90 100 110 1200
20
40
60
Qc[ C]
40 50 60 70 80 90 100 110 1201
2
3
4
Minimum Creqd
[ F]
40 50 60 70 80 90 100 110 1204
6
8
10
12
L [ H]
Ico,rms
[A]
40 50 60 70 80 90 100 110 12014
16
18
20
Variation with L, Po = 10kW Vdc2
= Vdc2,nom
controlled to obtain Po
ip,peak
[A]
ip,rms
[A]
is,rms
[A]
40 50 60 70 80 90 100 110 1200
20
40
60
Qc[ C]
40 50 60 70 80 90 100 110 1201
2
3
4
Minimum Creqd
[ F]
40 50 60 70 80 90 100 110 1204
6
8
10
12
L [ H]
Ico,rms
[A]
40 50 60 70 80 90 100 110 12014
16
18
20
Variation with L, Po = 10kW Vdc2
= Vdc2,nom
controlled to obtain Po
ip,peak
[A]
ip,rms
[A]
is,rms
[A]
40 50 60 70 80 90 100 110 1200
20
40
60
Qc[ C]
40 50 60 70 80 90 100 110 1201
2
3
4
Minimum Creqd
[ F]
40 50 60 70 80 90 100 110 1204
6
8
10
12
L [ H]
Ico,rms
[A]
4 © Amit Jain
93
94
95
96
97
98
99
0 5 10 15 20 25Po [kW]
Eff
icie
ncy
[%
]
0
200
400
600
800
1000
1200
1400
1600
Lo
ss [
W]SiC
Si IGBT
Example Prototype: 25kW DC-DC Bi-directional
HB2
HB1
HF
Transformer
Ctrl
Board
Ch1: vp (500V/div); Ch2: vs (400V/div)
Ch3: ip (50A/div) ; Ch4: is (25A/div)
Lecture 3: Advanced Topics
5 © Amit Jain
Lj
1V 2V
02
cos22 1
pdcV
f
sdcV
2cos
22 2
HB1
111 VV222 VV
3-port
TransformerHB2
HB3
333 VV
12L
31L 23L
12
212112
)sin(
L
VVP
PWM Control: Quasi-square wave operation
ZVS to no load; lower rms currents & core loss
Multiport DAB
S2s
S1s +
L
Vdc1
+
–
S1
S2
S3
S4
Vdc2
–
Full Bridge Half-Bridge
C
C
H- & Half-Bridge Combination
Dual Active Bridge Converter
Amit Jain
Peregrine Power LLC
now with
Intel Corporation
7 © Amit Jain
Outline
Operating Principles
Converter Design
Advanced Topics: PWM Control, H-Bridge & Half-bridge
combination, and Multi-Port DAB
8 © Amit Jain
Operating Principles
9 © Amit Jain
Motivations
DC–DC converter with
Soft-switching without auxiliary components
Bi-directional power flow
Galvanic isolation and/or high conversion ratio
10 © Amit Jain
Soft Switching in Bridge Converters
Bridge output current lags the bridge output voltage
Lagging current discharges parasitic capacitance prior to
switch turn on
ZVS turn-on
Lossless snubber capacitors across switches to which
current transfers during turn-off
ZVS turn-off
11 © Amit Jain
Power Flow Between Two AC Buses
Power flow magnitude and direction controlled by phase
angle difference
Current is lagging
Ljo
11 0VV
L
VVP
sin21
22 VV
0
0
12 © Amit Jain
Topology From AC Power Flow
Lj
o
11 0VV 22 VV
o
11 0VV 22 VV
Sinusoidal
voltages
High Frequency
Square wave
(phase-shifted
fundamentals)
Vdc2 vp
S3s
–
S2s
S1s
–
+
L
iL
+
vs Vdc1
+
–
S1
S2
S3
S4 Np : Ns –
+
S4s
HB1 HB2
Implementation
with
Bridges
13 © Amit Jain
Basic Operation
–
S2s
S1s
vp
–
+
L
iL
+vs
Vdc1
+
–
S1
S2
S3
S4
Np : Ns
Vdc2
–
+
S3s
S4s
HB1 HB2
–
S2s
S1s
vp
–
+
L
iL
+vs
Vdc1
+
–
S1
S2
S3
S4
Np : Ns
Vdc2
–
+
S3s
S4s
HB1 HB2
All switches operate with 50% duty ratio
Diagonal switches in each H-bridge turn-on & turn-off together so that output of each bridge is a square wave
Bridge outputs are phase shifted
Difference of the bridge output voltages appears across the inductor L and determines the instantaneous current
iL
vp vs’
t
t
S1
S4
S1s
S4s
iL1
iL0
S2
S3
S2s
S3s
14 © Amit Jain
Soft Switching
Lagging current of both bridges discharges output capacitance of switches and intra-winding capacitance of transformer Zero Voltage Switching (ZVS) for all devices
Lossless capacitive snubbers can be used to minimize turn-off loss
–
S2s
S1s
vp
–
+
L
iL
+vs
Vdc1
+
–
S1
S2
S3
S4
Np : Ns
Vdc2
–
+
S3s
S4s
HB1 HB2
–
S2s
S1s
vp
–
+
L
iL
+vs
Vdc1
+
–
S1
S2
S3
S4
Np : Ns
Vdc2
–
+
S3s
S4s
HB1 HB2
iL
vp vs’
t
t
S1
S4
S1s
S4s
iL1
iL0
S2
S3
S2s
S3s
S1
S4 Time
930.00us 931.00us 932.00us929.02us
i(S8) i(D8) i(C10)-i(C9) i(L1) i(L2)
0A
20A
-19A
SEL>>
1 VdsS7 2 v(G1) v(G1_bar)
-1.0KV
0V
1.0KV1
0V
0.5V
1.0V2
>>
Li
1,SDSv
2,SGSv
1,SGSv
2,SDSi1Di
Ci
ZVS of S1
15 © Amit Jain
Current Expressions
Current vertices can be
derived assuming steady state
iL
vp vs’
t
t
S1
S4
S1s
S4s
iL1
iL0
S2
S3
S2s
S3s
1
2
1
1
0
2
122
1
122
1
dc
dc
s
p
swL
L
dcbase
baseL
baseL
V
V
N
Nm
LfX
X
VI
Imi
Immi
16 © Amit Jain
Magnitude and direction controlled
by phase angle ϕ
Similar to power transfer
considering only fundamental
components of the square waves
across inductance L
Power Transfer
L
dcbase
base
base
sw
X
VP
PmP
PmP
TAAV
2
1
max
21dc1
2at
4
1
2/ Transfer Power
base
sw
dcdc
s
pPm
Lf
VV
N
NP
sin
8
2
sin82
21
21
LfX swL 2
iL
vp vs’
t
t
S1
S4
S1s
S4s
iL1
iL0
S2
S3
S2s
S3s
A1
A2
-200 -100 0 100 200-1
-0.5
0
0.5
1
[deg]
P/(
mP
ba
se)
Exact
Fundamental Approx
17 © Amit Jain
Obvious choice is to
utilize leakage inductance
of transformer.
However, in a well
designed transformer the
leakage inductance is
usually not large enough
Realize inductance and
transformer in one
structure to save on
losses and size/weight :
Magnetic integration
Implementing L
+
vp
–
Φp Φs ΦL
+
vs
–
Note: the type of integrated structure
chosen impacts performance
18 © Amit Jain
Summary: Key Features of DAB
Active H-bridges: Bi-directional, symmetrical structure
No inductive filtering
Power transfer controlled by phase shift between bridges
(similar to two ac buses)
Zero voltage switching (ZVS)
Single cycle response in power transfer
19 © Amit Jain
Converter Design
20 © Amit Jain
Design Considerations
Transformer turns ratio: To maximize ZVS range at
nominal conditions choose
Switching frequency considerations
Power/voltage level determine switch type (IGBT/MOSFETs) &
Magnetic material. Trade-off is primarily between heat sink and
transformer size/weight with the given thermal solution and
efficiency target.
Switching loss at light load
Control bandwidth and implementation
Inductance value is the most important design parameter
Magnetizing inductance
Capacitor size
nomdc
nomdc
s
p
V
V
N
N
,2
,1
21 © Amit Jain
Design Equations
Max Power Transfer
RMS Currents
Transformer magnetizing Volt-Sec
Capacitor charge and ripple current
s
p
L
dcdc
N
N
X
VVP 21
max4
2
3)21(
,,switches1
,,
10
2
1
2
0
2
,
RMSPRMSHB
RMSP
s
p
RMSS
•LLLLRMSP
II
IN
NI
iiiiI
22 © Amit Jain
0.5 1 1.5 20
0.5
1
1.5ZVS Boundary
P/P
base [
pu
]
m
HB1 and HB2
Soft Switching
HB1
Hard SW HB2
Hard SW
Soft Switching Range
If m≠1, below some power level either HB1 or HB2 has leading output current & therefore hard switching. Conditions for lagging current in the two bridges are:
HB1
HB2
In practice, the total capacitance at the switching node has to be discharged by iL0 or iL1 in a maximum allowable dead time [2]. See Appendix for equations.
For low loads, the dead time could be varied in accordance with the current as done in the phase shift modulated full bridge converter.
2
11
0122
10
m
Immi baseL
2
1
0122
11
m
Imi baseL
iL
vp vs’
t
t
S1
S4
S1s
S4s
iL1
iL0
S2
S3
S2s
S3s
23 © Amit Jain
Inductance Value Considerations
The most important design parameter.
Lower inductance value leads to higher power transfer capability and therefore smaller range of the phase shift for a given max power.
Maximum inductance value that will allow the required maximum power transfer is given by
Minimum value of inductance can be calculated using the minimum phase shift, a specified minimum load, and a specified maximum output voltage.
Lower inductance reduces size and allows integration with the transformer.
Lower inductance leads to smaller capacitance requirement, lower rms capacitor current, and lower rms currents in the transformer and the switches.
Higher inductance enables ZVS range to a lower power level
Higher inductance increases Vdc1/Vdc2 range for ZVS operation
Starting point for optimization: XL = 0.25 – 0.5 p.u.
maxmax
max
min,21
max 12
'
osw
dcdc
Pf
VVL
minmin
min
max,21
min 12
'
osw
dcdc
Pf
VVL
A numerical trade off is required between the following:
24 © Amit Jain
0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.250
5
10
15
20
25
min1
[deg]
min2
[deg]
0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.250
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
Po,m
in [
pu]
Vdc2 [pu]
Inductance [ H] 40
60
80
100
120
ZVS Boundary
Increasing L
Inductance Value Optimization
ZVS range (sw loss) decreases with L
Inductor size increases with L
Currents (conduction loss) increases with L
Capacitance size increases with L
Transformer size increases with L
Example of L optimization for a 10kW 700V-700V DC-DC converter
40 50 60 70 80 90 100 110 12010
20
30
40
50
Variation with L, Po = 10kW Vdc2
= Vdc2,nom
controlled to obtain Po
[deg]
40 50 60 70 80 90 100 110 12014
16
18
20
[A]
-i(to)
i(t1)
40 50 60 70 80 90 100 110 120
10
10
[kW
]
Po
40 50 60 70 80 90 100 110 1206
8
10
12
14
[A]
L [ H]
IFETavg
IFETrms
40 50 60 70 80 90 100 110 12010
20
30
40
50
Variation with L, Po = 10kW Vdc2
= Vdc2,nom
controlled to obtain Po
[deg]
40 50 60 70 80 90 100 110 12014
16
18
20
[A]
-i(to)
i(t1)
40 50 60 70 80 90 100 110 120
10
10
[kW
]
Po
40 50 60 70 80 90 100 110 1206
8
10
12
14
[A]
L [ H]
IFETavg
IFETrms
40 50 60 70 80 90 100 110 12014
16
18
20
Variation with L, Po = 10kW Vdc2
= Vdc2,nom
controlled to obtain Po
ip,peak
[A]
ip,rms
[A]
is,rms
[A]
40 50 60 70 80 90 100 110 1200
20
40
60
Qc[ C]
40 50 60 70 80 90 100 110 1201
2
3
4
Minimum Creqd
[ F]
40 50 60 70 80 90 100 110 1204
6
8
10
12
L [ H]
Ico,rms
[A]
25 © Amit Jain
Magnetizing Inductance
Leakage inductance is not sufficient to ensure soft-switching at light load.
Increasing soft-switching range to lighter loads by increasing L increases
rms currents.
Typically L may be chosen to get soft-switching down to 1/2‒1/3 of the rated
load. For lighter loads a finite magnetizing inductance is more effective for
ensuring soft-switching.
The magnetizing current is higher at small phase shifts (low loads) and
lower at higher phase shifts (high loads) and therefore acts in complement
with the leakage inductance to extend the ZVS range. [2]
Reducing magnetizing inductance Lm reduces the maximum power transfer
capability of the converter.
This is not a real problem from a design point of view since the rated power
is usually less than the maximum power transfer capability.
A starting point for the magnetizing inductance is Lm=10xL. Equations
including Lm are given in Appendix.
12 baseo PkP
L
Lk
kk m
;
25.01
12
26 © Amit Jain
Transformer and Capacitor Design
Transformer design with magnetic integration: Compute worst case rms currents in the windings
Compute worst case flux in each path of the magnetic structure
Choose core areas starting with an assumption for the operating flux density (e.g., 0.15 Tesla for 3F3 type Ferrite, 0.25 Tesla for nano-crystalline)
Compute total loss in windings and magnetic material, considering the flux in each part of the structure
Check if loss meets target efficiency and thermal constraints
Compute worst case capacitor ripple current for input and output from the inductor current waveforms assuming Lm is very large. Determine capacitance required to meet ripple specification.
Simulate to verify efficiency and ripple at different load, input and output voltages
27 © Amit Jain
Averaged Dynamic Model
loadHBdc ii
dt
vdC 2
2
R
vi
X
Vi
X
Vi
dcload
L
dcHB
L
dcHB
2
12
12
21
~~1
S2s
S1s +
L
iHB1
Vdc1
+
–
S1
S2
S3
S4
Vdc2
–
S3s
S4s
HB1 HB2
iHB2 iload
R
C
GC (s) _
+
ref
dcv 2
Current
Gain
2HBi
loadi
_ +
sC
1
R1
2dcv
28 © Amit Jain
93
94
95
96
97
98
99
0 5 10 15 20 25Po [kW]
Eff
icie
ncy
[%
]
0
200
400
600
800
1000
1200
1400
1600
Lo
ss [
W]SiC
Si IGBT
25kW DC-DC Bi-directional Converter Example
DC-DC Converter Prototype
HB2
HB1
HF
Transformer
Ctrl
Board
Ch1: vp (500V/div); Ch2: vs (400V/div)
Ch3: ip (50A/div) ; Ch4: is (25A/div)
29 © Amit Jain
Further DAB Topics
30 © Amit Jain
Extensions
PWM Control [8]: If Vdc1, Vdc2, or both vary significantly
ZVS load range is limited
High RMS currents at low load
Transformer core loss remains high at low loads
Multi-port DAB
31 © Amit Jain
PWM Control of DAB: Operation
PWM of bridge output Quasi square wave bridge output
50% duty ratio for each leg
Phase shift between legs of the same H-bridge in addition to phase shift between bridge outputs
S4
iL
vp vs
iL0
iL2
-iL1
t
t
φαp
S1 S1s
S4sS4
iL
vp vs
iL0
iL2
-iL1
t
t
φαp
S1 S1s
S4s
S1s
S4s
–
S2s
S1s
vp
–
+
L
iL
+vs
Vdc1
+
–
S1
S2
S3
S4
Np : Ns
Vdc2
–
+
S3s
S4s
HB1 HB2
–
S2s
S1s
vp
–
+
L
iL
+vs
Vdc1
+
–
S1
S2
S3
S4
Np : Ns
Vdc2
–
+
S3s
S4s
HB1 HB2
S1s
αs
iL
vpvs
iL0
iL2
–iL1
t
t
φ
S1
S4
S4s
S1s
αs
iL
vpvs
iL0
iL2
–iL1
t
t
φ
S1
S4
S1
S4
S4sS4s
0,1 :PWM HB2 m
32 © Amit Jain
0 20 40 60 800
0.1
0.2
0.3
0.4
0.5
P [
p.u
.]
f [deg]
m = 0.5
Regular DAB (=0)
HB1 PWM(p = (1-m)
PWM Control of DAB: Power Transfer
Power Transfer:
Depends on and α
Maximum P reduced
– control variable
α – feed forward variable/disturbance
Can approximate by fundamental
component
f
Lj
1V 2V
02
cos22 1
pdcV
f
sdcV
2cos
22 2
33 © Amit Jain
0.5 1 1.5 20
0.5
1
1.5
m
P [
pu]
p =0
s = (1-1/ m)
p =(1- m)
s = 0
PWM Control
Regular
PWM Control of DAB: ZVS Range
HB1 leading leg
(S1, S2)
HB1 lagging leg
(S3, S4)
HB2
(S1s–S4s)
fpm
m
1
2
mmp 2)1(
2)1( mp
ZVS conditions )0(
Possible Scheme: Equate volt-seconds
across primary and secondary of transformer
HB2 lagging leg
(S3s, S4s)
HB2 leading leg
(S1s, S2s)
HB1
(S1–S2)
fsm
1
2
mm
s
211
21
1
ms
HB1 PWM, m<1 HB2 PWM, m>1
34 © Amit Jain
RMS Currents
Can optimize α for minimum rms currents with fundamental component approximation (minimize I1,rms at constant P)
f
p
m
P
sin
2cos
82
1
1,100,40,600
:for ResultsComputed
1 psswdc NHLkHzfVV
0
2
4
6
8
Irm
s (f=
0)
[A]
p,minI
p,opt
p,minI1
p,minI13
0.5 0.6 0.7 0.8 0.9 10
50
100
150
P [
deg
]
m
)1( mp
RMS Current at No Load
1min,p
)1( mp
1min,p
Lj
1V 2V
02
cos22 1
pdcV
fdcV
222
35 © Amit Jain
Transformer Size
Transformer Size: k [max(Volt-Sec-Product)] x Irms
For 0.5:2 variation in m, core area requirement is
reduced by 33%.
sw
dc
sw
dcp
f
Vm
f
VSECVOLT
22
)1(
2:][ 1max1
Without PWM
1for
)/11(;0
m
msp )0( sp With PWM
36 © Amit Jain
Simultaneous Dual PWM
Five possible operating modes depending on angles Only Mode III & IV are useful during low load operation.
Power transfer can be approximated by the fundamental component
),,( fsp
spspf ;2)(Mode IA:
S4
iL
vp vs
t
t
αp
S1
αs
S1s
S4s
–ia –id
ib ic
sp
sp
f ;22
Mode IB:
S1
αs
αp
S4s
iL
vp
vs
t
t
S1s
S4
vp
vs
ic=id
–ib=ia
2,
2min
2
|| spsp
f
sp
Mode II:
vp
αs
αp
S4
iL
vs
t
t
S1
S1s S4s
id –ib=ia
–ic
m
P
37 © Amit Jain
Mode IV Operation
vp
S1
S1s
αs
αp
S4
iL
vs
t
t
S4s
id
ib=ic
-ia
iL
t
ib=ic
-ia
id
Current vertices
For low load operation
ensures: ZVS (lagging current) down to zero
load
Minimum rms currents
Minimum core loss
38 © Amit Jain
Composite Scheme
Transition from
Dual PWM to
Single HB PWM
and finally to only
phase shift control
39 © Amit Jain
Low Load Efficiency with PWM Control
10kW DAB with Vdc1=600V; Vdc2=300V (left), 450V (right)
40 © Amit Jain
Three Port DAB [4]
Choose phase shifts to enable required power transfer
while minimizing circulating power
HB1
111 VV222 VV
3-port
Transformer HB2
HB3
333 VV
12L
31L 23L
12
212112
)sin(
L
VVP
41 © Amit Jain
Half and Full Bridge Combination
S2s
S1s +
L
Vdc1
+
–
S1
S2
S3
S4
Vdc2
–
Full Bridge Half-Bridge
C
C
Similar to load resonant converters
Reduced switch count at expense of capacitors
Secondary side cannot produce quasi-square wave
42 © Amit Jain
References
[1] R.W. A. A. De Doncker, D. M. Divan, and M. H. Kheraluwala, “A threephase soft-switched high-power-density dc/dc converter for high-power applications,” IEEE Trans. Ind. Appl., vol. 27, no. 1, pp. 63–73, Jan./Feb. 1991.
[2] M. H. Kheraluwala, R. W. Gascoigne, D. M. Divan, and E. D. Baumann, “Performance characterization of a high-power dual active bridge dc-to dc converter,” IEEE Trans. Ind. Appl., vol. 28, no. 6, pp. 1294–1301,Nov./Dec. 1992.
[3] R. Steigerwald, R. De Doncker, and M. H. Kheraluwala, “A comparison of high power dc to dc soft switched converter topologies,” IEEE Trans. Ind. Appl., vol. 32, no. 6, pp. 1139–1145, Sep./Oct. 1996.
[4] C. Zhao and J. W. Kolar, “A novel three-phase three-port ups employing a single high-frequency isolation transformer,” in Proc. 35th IEEE Power Electron. Spec. Conf. (PESC2004), Aachen, Germany, Jun. 2004, vol. 6, pp. 4135–4141.
[5] F. Krismer, S. Round, and J. Kolar, “Performance optimization of a high current dual active bridge with a wide operating voltage range,” in Proc. 37th IEEE Power Electron. Spec. Conf. (PESC2006), Jeju, Korea, Jun., pp. 1–7.
[6] D. Aggeler, J. Biela, and J. Kolar, “A compact, high voltage 25 kw, 50 khz dc-dc converter based on sic jfets,” in Proc. 23rd IEEE Appl. Power Electron. Conf. Expo. (APEC2008), Dallas, TX, Feb., pp. 801–807.
[7] F. Krismer and J. Kolar, “Accurate small-signal model for the digital control of an automotive bidirectional dual active bridge,” IEEE Trans. Power Electron., vol. 24, no. 12, pp. 2756–2768, Dec. 2009.
[8] A.K. Jain and R. Ayyanar, “PWM Control of Dual Active Bridge: Comprehensive Analysis and Experimental Verification,” IEEE Trans. Power Electron., vol. 26, no. 4, pp. 1215-1227, April 2011.
[9] A.K. Jain, D. McIntosh, M. Jones, B. Ratliff, “Performance of a 25kW 700V Galvanically Isolated Bidirectional DC-DC Converter Using 1.2kV Silicon Carbide MOSFETs and Schottky Diodes,” 2011 International Conference on Silicon Carbide and Related Materials (ICSCRM 2011), September 11–16, 2011.
43 © Amit Jain
Appendix
44 © Amit Jain
45 © Amit Jain
46 © Amit Jain
Effect of Snubber and Transformer Capacitance
47 © Amit Jain
Effect of Snubber and Transformer Capacitance
2
1
0122
10
m
Imi baseL
