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DSP Challenges in Future DSP Challenges in Future Wireless SystemsWireless Systems
http://infopad.eecs.berkeley.edu/
Acknowledgements: Profs. Randy Katz and Paul Gray as well as many UCB students
R.W. BrodersenDept. of EECS
University of CaliforniaBerkeley, CA
OutlineOutline
Past, Present and Future Wireless Applications
VLSI Technology Trends Wireless System Design
Wireless Technologies Wireless Technologies
1890’s - First radio transmission 1940’s - Pre-cellular - Analog (MTS & IMTS) 1970’s - First Generation cellular - Analog
Voice, Digital control (AMPS) 1985-1990’s Second Generation - Digital
Voice and Control (GSM, N-AMPS, CDMA) 2000 - Third Generation - Multimedia Data
(UMTS, Wideband CDMA)
Third Generation Telecommunication Third Generation Telecommunication ArchitecturesArchitectures
High-tier
Low-tier
Satellite
High Mobility Low MobilityWide Area
Regional Area
Local Area
UMTS» Universal multimedia information access with mobility spanning residences,
businesses, public/pedestrian, mobile/vehicular, and global regions» Data rates to 2 Mbits/sec per user indoor, 384kbit/sec outdoor - standards
being developed now
Cellular Subscriber Growth in Cellular Subscriber Growth in USUS
85 87 89 91 93 950
10000
20000
30000
40000
50000
44 million
Source: CTIA Web Page
Cellular telephonyremains the hottest andfastest growing sector of the telecomm market
Nordic Countries: 10 mobilephones being added for
each wireline phone!
Voice vs. Data?Voice vs. Data?
Previous telecommunication systems have been optimized for voice
however More than 50% of telecomm traffic in
Bay Area is now data, not voice» Internet FIND/SVP Survey
– 25% of Internet users make fewer long distance calls
– 32% watch less television
Exponential growth of Internet Exponential growth of Internet traffictraffic
(Source: GILDER Technology Report, Nov. 1996)
Tera
by t
e s P
er M
on
th400
300
200
100
0
1992
1993
1994
1995
1996
• Growing at the rate off 20% per month• Earlier this year increased 2x in 100 days!
Wireless Internet AccessWireless Internet Access
Voice communications » Has been the only driver for personal wireless
access » Will evolve to be just one of many services.
The ideal access device would allow multimedia internet access from any location (like a cellphone does for voice)
The access device should have the mobility and battery life of a PDA, with the multimedia capability of a PC
The progression towards a Wireless The progression towards a Wireless Personal Internet Access DevicePersonal Internet Access Device
Improving support for data But so far
» Low bandwidth - optimized for audio and outdoor mobile links
» Low user capacity» Wrong form factor and poor multimedia support
?
What is Needed (the home What is Needed (the home model)model)
Set-top box doubles as basestation Set-top box doubles as basestation and gateway from WANand gateway from WAN
Allows family Allows family andand personal use personal use
of set-top box accessof set-top box access
Internal Architecture Internal Architecture
DataFlow
Low Power Bus
RadioModem
Embedded Processor
AudioCodec
VideoDecomp
VideoAudio
Decomp Fifo
Graphics
Pen
Sched ECC Pact Interface
SRAM
DSPBlocks
OutlineOutline
Past, Present and Future Wireless Applications
VLSI Technology Trends Wireless System Design
Wireless Technology HistoryWireless Technology History
Precellular - Vacuum tubes, Crystals, cat whiskers, horse hair
First generation - Bipolar and GaAs Second generation - Analog bipolar radios
with digital CMOS control Third generation - Analog and Digital CMOS
for the baseband and bipolar for the RF Future - All CMOS
1GHz
75 77 79 81 83 85 87 89 91 93
3u
2u
1.5u
1u 0.8u
0.6u
GaAs
Bipolar
CMOS
ft
Year95 97 98
0.5u0.35u
3GHz
Hemts,HBTs
Why it will be all CMOS?Why it will be all CMOS?
10GHz
30GHz 0.25u
100GHz
Characteristics of State-of-the-art Characteristics of State-of-the-art CMOSCMOS
Dimensions» .25 Micron gate length (significantly shorter than
the wavelength of visible light)» oxide thickness of 25 atomic layers» 10’s to 100’s of millions of transistors
Delay through a logic gate» ~20 picoseconds without loading (time it takes for
light to go less than a cm)» Near gigahertz clocks
The problem is not area or performance but is energy consumption for wireless systems
Reduce number of operations» Shutdown modules that aren’t being used» Perform processing in network servers - an
I/O device not a computer Reduce energy/operation (CV2)
» Advanced fabrication technology» Reduce C through logic and circuit style and
transistor sizing
How to Minimize Energy How to Minimize Energy ConsumptionConsumption
More on Energy ReductionMore on Energy Reduction Clock rate reduction doesn’t help
» Number of operations = Nops
» Energy/operation = CV2
» Total Energy = CV2 * Nops
» Energy consumption is independent of clock rate!
Reducing the clock rate only degrades speed, but no savings in battery life - unless the voltage is changed
Architectural optimization
Dependence of Energy Consumption Dependence of Energy Consumption on Architectureon Architecture
Conventional General Purpose processors » Clock rate is everything … somehow we’ll get the
power into it and back out..» 10-100 Watts, 100-1000 Mips = 100 mW/Mip
Energy Optimized but General Purpose» Keep the generality, but reduce the energy as
much as possible - e.g. StrongArm» .5 Watts, 160 Mips = 3 mw/Mip
Energy Optimized and Dedicated» < .01 mW/Mop
Energy improvements due to Energy improvements due to technologytechnology
10X each 2.5 years
(Ref. Walt Davis. Motorola)
mW
MIP
Dedicated Arch.
< .01mW/MIP
Energy Reduction for Signal Energy Reduction for Signal Processing ComputationProcessing Computation
Requires a fixed number of operations per sample period (real-time constraint)
Reduce the energy/operation (CV2) by reducing the voltage, but the delays increase
Processing speed can be retained by parallelism
2
init
final
initV
VE
initEfclk
In
Out
fclk fclk fclk
Out
In
3 3 3
CDMA Digital Baseband CDMA Digital Baseband ArchitectureArchitecture
Phase Control
Com
para
tor
CorrelatorDelay
WalshDecode
Correlator
ClockMux
LoopGain
P/N
De
scra
mbl
er
256 MHzClk
Timing Recovery
Data Recovery
RAKE Combiner
Correlator(x3)
Ana
log
RF
Se
ctio
n
Dat
aM
ux
Digital Clocks
Correlator(x3)
Channel Estimator
CorrelatorAdjacent Cell Scan
(Bits Out)
(Delay Locked Loop)
128 MHz 64 MHz
1 MHz
Power = 27 mW @1.5 V. (.8 process)
Potential to do much more complex algorithms
(S. Sheng et. al., 1996 ISSCC)
OutlineOutline
Past, Present and Future Wireless Applications
VLSI Technology Trends Wireless System Design
The GoalThe Goal
Conventional cellular phone solution
Single-chip multi-modal smart radio using scaled CMOS technology
DECT receiver, ISSCC 1997
DECT baseband
GSM baseband
CDMA Wideband
CMOS density now allows complete CMOS density now allows complete System-on-a-chip SolutionsSystem-on-a-chip Solutions
ViterbiEqual.
Demodandsync
phone
bookkeypad
intfc
protocolcontrol
de-intl&
decoder
RPE-LTPspeechdecoder
speechquality
enhancement
voicerecognition
phonebookDMA
S/P
DSP core
P core
RAM & ROM
Dedicated logic
A
D
digitaldownconv
Analog
P core» protocol» user interface
Dedicated logic» DSP
acceleration» bit level
manipulation Programmable
DSP core Analog
» A/D» RF, baseband
The Challenge of Exploiting The Challenge of Exploiting Technology ScalingTechnology Scaling
Effectively have arbitrary amounts of DSP available - how to use it?
Even though digital processing improves with technology scaling - the analog processing becomes more difficult.
The design of a system-on-a-chip involves a complete integration with software, hardware, analog and digital components
Lets see what this really means
Conventional Radio Conventional Radio ArchitectureArchitecture
90
DAC
DAC
VCOVCO
I
Q
I
Q
ADC
ADC
Transmitter
VCO
RF LNA/Mixer IF AGC
IF Mixer
Modulator
90
Receiver60 mW65 mW
40 mW
50 mW
45 mW
250 mW per ADC
165 mW40 mW
20 mW per DAC
The Future?The Future?
Direct conversion - mix to baseband without intermediate frequency filtering - minimize the analog
More appropriate for wideband (spread spectrum) systems
LNA and AGC
Digital Signal
Processing
A/D
X A/D
X
frf
90
Direct conversion problems...Direct conversion problems...
The rf oscillator is picked up by the antenna and reappears as a DC signal in the baseband processing
Can we use baseband DSP to reject this DC signal?
LNA and AGC
Digital Signal
Processing
A/D
X A/D
X
frf
90
Direct Sequence Spread Spectrum Direct Sequence Spread Spectrum modulation (e.g. UMTS)modulation (e.g. UMTS)
Xtbit
tchip
Spreading code
Data Input Spread output data
Transmit signal is expanded by tbit/tchip
Receiver (in gaussian noise) is a simple correlator - multiply with code and sum the products
+1
-1 -1
Design of the DS Spread Spectrum Design of the DS Spread Spectrum ReceiverReceiver
Design requires joint optimization of» Communication algorithms
» Analog circuit performance
» DSP architecture (e.g. dedicated vs. programmable)
Reducing A/D requirements are critical for implementation at low power levels
But the real problem is the user interference - can we do something about that???
10 30 50
Number of Users
1e-06
.0001
.01
1
Bit
Err
or R
ate
2 bit
3 bit
Unquantized
4 bit
Communications theory to the Communications theory to the rescue - Multiuser Detectionrescue - Multiuser Detection
0 5 10 15
Number of Active Users
10-6
1B
it E
rror
Rat
e (B
ER
)
Single User Correlator
MMSE Multiuser Detector
Multiple order of magnitude improvements in BER
.01
.0001
10-8
10-10
Multiuser Detection Multiuser Detection ImplementationImplementation
Baseband Signal
Despreading
X
Adaptive
ErrorSignal
Optimal MUD algorithm is exponential in the number of users, but …..
Adaptive algorithms using common error metrics and standard algorithms (LMS, RLS) approach optimal results
Dedicated accelerators make low power implementation possible (estim. 25 mW, 10 mm2)
Receiver adaption removes effect Receiver adaption removes effect of interference from other usersof interference from other users
0 100 200 300 400 500Symbol Periods
0
5
10
15
Sig
nal t
o In
terf
eren
ce R
atio
(S
IR)
12 users; equal transmit powers; (Eb/N0)=15 dB
Can adaption be used to reduce or compensate for performance of analog circuits and A/D ???
What happens to the A/D What happens to the A/D
requirements?requirements?
Higher resolution A/D converters are required to capturethe gains made possible by multiuser detection
Implies increased energy consumption
A/D converter technology ultimately limits performance
3 4
5 6 78 Unquantized
Number of bits in A/D
-10
0
20
40
10
30
100 200 300 400 5000 600
Symbol Periods
Ave
rag
e S
IR (
dB
)
To summarize - multiple disciplines To summarize - multiple disciplines are required for wireless systemsare required for wireless systems
Analog and RFCircuit Design Protocols and
Standards
Communications and DSP Theory Low Energy
Architectures
Multimedia Applications
ConclusionsConclusions
The capabilities of CMOS technology have now reached a threshold which allow completely new types of wireless systems
The future levels of CMOS integration will force an integration of multiple disciplines
Multiple areas of SPS are working on various aspects of wireless - we should work together!
Wireless system design is an exciting new opportunity