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Discussion 1 TA: Kareem Kamel

Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

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Page 1: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Discussion 1TA: Kareem Kamel

Page 2: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Outline- The big picture- Number system- nMOS and pMOS- NAND/NOR- Boolean Expressions- Minterms/Maxterms

Page 3: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 4: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 5: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Application Software

Operating System+

Hardware

Page 6: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Let’s zoom in

Page 7: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Let’s zoom in further...

Page 8: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Zoom in more...

Page 9: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Transistors, capacitors, sources, and wires

Page 10: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Silicon...

Page 11: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Physics...

Page 12: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 13: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 14: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Binary to DecimalConvert 1001001011 to Decimal

Page 15: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Binary to HexConvert 10110 to hexadecimal representation

Page 16: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 17: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 18: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 19: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

The case for NAND and NORCMOS technology is the most widely used.

1. As we know CMOS NAND/NOR require 4 MOSFETS and 1 layer of transistors.

2. Where as AND/OR use 6 MOSFETS with 2 layers, thus increasing the delay and reducing packing density of the chip.

So in layman terms by using NAND and NOR gates we save space and reduce the gate delay.

Page 20: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Bubble pushing (DeMorgan’s theorem)

Page 21: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 22: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 23: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 24: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 25: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 26: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 27: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

Null element.

Page 28: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 29: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 30: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

?

Page 31: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 32: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 33: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 34: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate
Page 35: Discussion 1 - University of California, San DiegoIdempotency Involution Complements 0 o B B B 1 O B 1 0 1=1 o O Dual B B 1 1 O 1 eorem -B 0 B o NAND / NOR Universal gates; any gate

o.) · b.:>b.:>80MOJ0.:>8

o.) · b.:>b.:>80MOJ0.:>8

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