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ADA8282CP-EBZ User Guide UG-846
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the ADA8282 Radar Receive Path AFE
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 16
FEATURES Ready SPI interface for setup and control Easy connection to test equipment
EVALUATION KIT CONTENTS ADA8282CP-EBZ evaluation board 6 V, 2 A switching power source
EQUIPMENT NEEDED PC running Windows® USB 2.0 port SDP-B
SOFTWARE NEEDED Analysis control evaluation (ACE) software
GENERAL DESCRIPTION The ADA8282CP-EBZ is designed to aid in the evaluation of the ADA8282 radar receive path analog front-end (AFE). The board connects to the system demonstration platform (SDP) for easy configuration of registers through a serial peripheral interface (SPI) using the ACE evaluation software. The board provides headers to allow configuration using other platforms. It also includes on-board options to provide manual reset capability to the part.
This user guide provides quick start instructions for working with the board.
Full specifications for the ADA8282 are available in the product data sheet, which should be consulted in conjunction with this user guide when using the evaluation board.
DIGITAL PICTURE OF THE BOARD
Figure 1.
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TABLE OF CONTENTS Features .............................................................................................. 1 Evaluation Kit Contents ................................................................... 1 Equipment Needed ........................................................................... 1 Software Needed ............................................................................... 1 General Description ......................................................................... 1 Digital Picture of the Board ............................................................ 1 Revision History ............................................................................... 2 Evaluation Board Hardware ............................................................ 3
Power Supply ................................................................................. 3 Analog Inputs ................................................................................ 3 Analog Outputs............................................................................. 3 Reset Logic Input .......................................................................... 3 Digital Lines .................................................................................. 3
Jumper Configurations .................................................................3 Evaluation Board Software Quick Start Procedures .....................4
Evaluation Board Software ...........................................................4 Quick Start Procedures .................................................................4 Configuring the ADA8282 through ACE ..................................5 Using the Register Debugger .......................................................5 Using the ACE Software Chip View ...........................................5 Using the ACE Memory Map ......................................................6 ADA8282 Register Summary ......................................................7
Evaluation Board Schematics and Artwork ...................................8 Ordering Information .................................................................... 15
Bill of Materials ........................................................................... 15
REVISION HISTORY 7/15—Revision 0: Initial Version
ADA8282CP-EBZ User Guide UG-846
Rev. 0 | Page 3 of 16
EVALUATION BOARD HARDWARE POWER SUPPLY The ADA8282CP-EBZ comes with a wall-mountable switching power supply that provides a 6 V, 2 A maximum output. The supply may be connected to the rated 100 V ac to 240 V ac to provide power to the board.
The ADA8282 requires 3.3 V for both analog (AVDD) and digital (VIO) power. The evaluation board has an on-board ADP7118 (U3) regulator for this purpose. U3 directly supplies the power for AVDD. The user may opt to use U3 to provide power to VIO by placing a header at VIO_3V3.
The SDP requires a 5 V supply to properly control the board. This supply is derived from the on-board ADP7105 (U2). The 5V_EN header allows the user to enable or disable this supply. Positions for the shunt to enable or disable are indicated on the board. U2 may be disabled if a different external controller is used.
ANALOG INPUTS Each input is configured with SMA ports, +JINx and –JINx (where x stands for Channel A, Channel B, Channel C, or Channel D), and terminated with 50 Ω for easy interfacing to source equipment. The inputs are ac-coupled through 0.1 µF capacitors to the ADA8282. Use P1INx (where x stands for Channel A, Channel B, Channel C, or Channel D) to short any two differential lines together.
The inputs of the ADA8282 are intended to be driven by a differential signal source. The output signal swing is reduced by a factor of 2 when driven by a single-ended source.
ANALOG OUTPUTS Each output is configured with SMA ports, +JOUTx and −JOUTx (where x stands for Channel A, Channel B, Channel C, or Channel D), which allows easy interfacing to equipment. Components are included for high-pass filtering at the output.
RESET LOGIC INPUT A switch to control the RESET pin of the ADA8282 is available on the board. The switch position to reset the board is indicated on the evaluation board.
DIGITAL LINES The SDP-B is used to provide digital signals to configure the ADA8282. Short the SPI headers to use the SDP. If an external controller is used to generate the digital signals, the signals can be ported through the SPI header.
JUMPER CONFIGURATIONS The jumper settings/link options on the evaluation board for the required operating modes are described in Table 1. Figure 2 shows the default jumper settings.
Table 1. Jumper Descriptions Jumper Description SPI SPI lines. Short all jumpers to configure the registers via the SDP. VIO_3V3 Digital supply pin, VIO. Short the jumper to supply the VIO pin of the ADA8282 with the on-board regulator supply of 3.3 V. 5V_ENBL 5 V supply enable. Place a shunt at Position 1 to enable the 5 V on-board regulator. Place the shunt at Position 3 to disable the 5 V
on-board regulator. Correct positions are indicated on the board. RESET This switch provides the required logic level to reset the device through hardware. To reset, follow the indicated position on the board.
Figure 2. Default Evaluation Board Configuration
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EVALUATION BOARD SOFTWARE QUICK START PROCEDURES This section provides quick start procedures and software information for using the ADA8282CP-EBZ board.
EVALUATION BOARD SOFTWARE To use the board with the SDP-B, make sure that the ACE software is available on your computer. The software installer and a comprehensive user guide for the tool are available on the ACE Wiki.
QUICK START PROCEDURES Figure 6 shows the typical evaluation board setup for the ADA8282CP-EBZ. Complete the following steps to enable functionality testing of the part:
1. Configure the jumpers as shown in Figure 2. 2. Connect the SDP connector on the ADA8282CP-EBZ
to Connector A of the SDP-B. 3. Connect the 6 V power supply to the board at P2 and
connect to a power source. 4. Plug the USB cable into the USB port. 5. Run the ACE software. 6. Upon running the software, the hardware should
automatically be detected (see Figure 3).
Figure 3. ACE Executable
7. Double-click the ADA8282 evaluation board plug-in to navigate to the ACE board view (see Figure 4).
Figure 4. ADA8282 ACE Board View
8. Double-click the ADA8282 component on the board to navigate to the chip view (see Figure 5). Click the tabs to select a previous or different view.
Figure 5. ADA8282 ACE Chip View
9. Write a data byte of 0x0F to Register 0x17 to enable all channels of the device, using any of the configuration methods discussed in the Configuring the ADA8282 through ACE section.
10. Power up the signal generator and check the waveform through the oscilloscope. The default gain is 18 dB for all channels.
Figure 6. Typical Evaluation Setup
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COMPUTERRUNNING
ACESDP-B
OSCILLOSCOPE
SIGNALGENERATOR
+JINxP2
TO ACPOWER SOURCE
–JINx
+JOUTx
ADA8282CP-EBZEVALUATION BOARD
–JOUTx
TOUSB
ADA8282CP-EBZ User Guide UG-846
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CONFIGURING THE ADA8282 THROUGH ACE The ACE software provides several views or interfaces for configuring the ADA8282 via the SDP-B. Raw SPI writes and reads may be done through the register debugger. The chip view provides a more graphical approach to configuring the ADA8282, while the memory map provides users with the option to change register settings bit by bit.
USING THE REGISTER DEBUGGER Raw SPI data writes and reads may be performed on the device using the register debugger.
To write to the device, complete the following steps:
1. Select the address from the Address drop-down menu on the register debugger (see Figure 7).
Figure 7. Register Debugger Drop-Down Menu
2. Enter the data to be written to the device in the Data text box and click Write (see Figure 8).
Figure 8. Writing Data to the ADA8282
To read from the device, complete the following steps:
1. Select the address from the Address drop-down menu, 2. Click Read (see Figure 9).
Figure 9. Reading Data from the ADA8282
USING THE ACE SOFTWARE CHIP VIEW The ACE software provides a chip view for the ADA8282. This allows the user to configure the part graphically. Enabling or disabling channels, along with gain manipulation, can be accomplished using the chip view.
To enable or disable a channel, click the channel of interest. An enabled channel is highlighted in blue, while a disabled channel is grayed out. In Figure 10, Channel A is enabled, while the rest of the channels are disabled.
Figure 10. Enabled and Disabled Channels
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To manipulate the gain of a channel, type in the desired gain on the corresponding channel that should be changed in the PGA section. Note that only the gain of enabled channels may be changed (see Figure 11).
Figure 11. Manipulating Gain
To write the preferred settings to the registers of the device, click Apply Changes on the toolbar (see Figure 12).
Figure 12. Chip View Toolbar
USING THE ACE MEMORY MAP The memory map for the ADA8282 can be accessed by clicking the Proceed to Memory Map found on the lower right portion of the chip view (see Figure 5). The memory map view can show either the register fields or the bit fields of the device.
The register view allows the user to manipulate the bits one by one. Each register may be expanded to show its corresponding bit fields for easier configuration.
Clicking a bit toggles its value (see Figure 13).
Figure 13. Register Field View
The bit field view allows the user to configure the ADA8282 by modifying its control values. The hexadecimal data is displayed in the Data (Hex) column.
Figure 14. Bit Field View
As with the chip view, the desired setting of the registers is only written to the ADA8282 when Apply Changes is clicked.
For more detailed information on using the ACE software, see the ACE Wiki.
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ADA8282 REGISTER SUMMARY The register settings for the ADA8282 are given in the register section of the ADA8282 data sheet. An abbreviated register summary is shown in Table 2.
Table 2. ADA8282 Register Summary Register Address Register Name 0x00 INTF_CONFA 0x01 SOFT_RESET 0x04 CHIP_ID1 0x05 CHIP_ID2 0x06 Revision 0x10 LNA_OFFSET0 0x11 LNA_OFFSET1 0x12 LNA_OFFSET2 0x13 LNA_OFFSET3 0x14 BIAS_SEL 0x15 PGA_GAIN 0x17 EN_CHAN 0x18 EN_BIAS_GEN 0x1D SPAREWR0 0x1E SPARERD0
UG-846 ADA8282CP-EBZ User Guide
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EVALUATION BOARD SCHEMATICS AND ARTWORK
Figure 15. Input Schematic
0.1µF
0.1µF
49.9
Ω 0.1µF
0.1µF
49.9
Ω49
.9Ω
49.9
Ω
0.1µF
0.1µF
0.1µF
0.1µF
49.9
Ω49
.9Ω
49.9
Ω49
.9Ω
P1INA
–JIND
+JIND
R2I
ND
R1I
ND
P1IND
C1IND
–JINC
+JINC
R2I
NC
R1I
NC
C2INC
C1INC
P1INC
C2IND
–JINB
R2I
NB
C2INB
+JINBR
1IN
BC1INB
P1INB
C1INA
R1I
NA
–JINA
C2INA
+JINA
R2I
NA
–INC
–INB
+INA
+INB
–INA
+INC
–IND
+IND
21
21
21
21
1
23
45
1
23
45
1
23
45
1
23
45
1
23
45
1
23
45
1
23
45
1
23
45
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
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ADA8282CP-EBZ User Guide UG-846
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Figure 16. Output Schematic
0
0.1µF
5kΩ
5PF
5PF
0.1µF
0.1µF5k
Ω
5PF
0 0.1µF
0.1µF
0
5PF
5kΩ
0.1µF
0.1µF
0
5kΩ
0
5kΩ
0
5kΩ
0
0.1µF
0
5kΩ
5kΩ
R1OUTD
C1O
UTD
C3OUTD
C2OUTD
P2OUTD
R3O
UTD
–JOUTD
R4O
UTD
+JOUTD
R2OUTC
P1OUTC
R1OUTC
C1O
UTC
C3OUTC
C2OUTC
R3O
UTC
P2OUTC
–JOUTC
R4O
UTC
+JOUTC
R2OUTD
P1OUTD
R2OUTB C1O
UTB
C3OUTB
R3O
UTB
–JOUTB
R4O
UTB
P1OUTB
R1OUTB C2OUTB +JOUTB
P2OUTB
–JOUTA
R3O
UTA
C2OUTA +JOUTA
R4O
UTA
P2OUTA
C3OUTA
R1OUTA
C1O
UTA
R2OUTA
P1OUTA
–OUTA
–OUTC
+OUTD
–OUTD
+OUTC
–OUTB
+OUTA
+OUTB
21
1
1
21
21
1
1
21
1
21
1
21
1
1
21
21
AGND AGND
AGND AGND AGND AGND
AGND AGND AGNDAGND
AGND AGND AGNDAGND
AGND AGND 1326
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UG-846 ADA8282CP-EBZ User Guide
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Figure 17. DUT Schematic
0.1µ
F
0.1µF
0.1µF
0.1µF
ADA8282WBCPZ
0.1µ
F
C5
C6
C4
C3
C2
U5
OUTD
RES
ET
3V3A
–INA+INB
–INC+INC
+OUTA
3V3A
3V3A
SDO
SDI
CSB
SCLK VIO
OUTA+OUTBOUTB+OUTCOUTC+OUTD
3V3A
–IND+IND
–INB
+INA
2631 30 28 27151413121110
PAD
2932 25169
17
19
21
23
8
6
4
2
18
20
22
24
7
5
3
1
AGND AGND AGND
AGND
GN
DA
VDD
SDO
SDI
CSB
SCLK
PDW
NVI
OA
VDD
+OUTA–OUTA+OUTB–OUTB+OUTC–OUTC+OUTD–OUTD
AVD
DN
ICN
ICN
ICN
ICN
ICN
ICA
VDD
–IND+IND–INC+INC–INB+INB–INA+INA
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ADA8282CP-EBZ User Guide UG-846
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Figure 18. Power Section Schematic
AD
P71
05A
RD
Z-5
.0
SM
L-L
X06
03G
W-T
R
1kΩ
10µF
TS
W-1
02-0
8-G
-S
DN
I
AD
P71
18A
RD
Z-3
.3
DN
I
5001
DN
I
10µF
0Ω
SM
L-L
X06
03G
W-T
R
5001
DN
I
330O
HM
5001
5001
5001
5001
DN
ID
NI
5001
DN
ID
NI
DN
I
5001
165Ω
5001
DN
I
DN
I
5001
0Ω
1µF
1µF
1µF
16V
4A
SA
MT
EC
TS
W10
608G
S3P
IN
1µF
SM
BJ5
342B
-TP
6.8V
0.50
A
PJ-
002A
-SM
T
DS
2
R4
5V_E
N
VIO
_3V
3T
P_V
IO
E1C
R1
F1
TP
1T
P2
5V
R7
C9
C8
U2
P2
3V3
R5
R6 D
S1
C14
C13
C12
GN
D2
GN
D1
U3
GN
D6
GN
D5
GN
D4
GN
D3
C7
RE
SE
T
C1
AV
DD
VIO
3V3A
RE
SE
TV
IO
3V3A
5V1
3P
AD
4
C
1
31
21
AC
21
11
1
A
321
8
2 7
6
5
3 21
1
A C
1
1G
2G
11
2187 63
4D
AP
5
2
11
11
NP1
2
NP
1
AG
ND
AG
ND
AG
ND
AG
ND
AG
ND
DG
ND
AG
ND
AG
ND
AG
ND
AG
ND
AG
ND
AG
ND
AG
ND
PA
D
VIN
PG
EN
/UV
LO
SS
GN
DSE
NS
E/A
DJ
VO
UT
AG
ND
OU
T 3
IN
AG
ND
AG
ND
AG
ND
AG
ND
VO
UT
VIN
PA
D
VIN
SS
EN
GN
D
SE
NS
E/A
DJ
VO
UT
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Figure 19. SDP Schematic
SPI_SEL1/SPI_SS MUST BE ONLY USEDWITH EXTERNAL SPI FLASH
BMODE1: PULL UP WITH A 10kΩ RESISTORTO SET SDP TO BOOT FROM A SPI FLASHON THE DAUGHTER BOARD
12C BUS 1 IS COMMON ACROSS BOTHCONNECTORS ON SDP - PULL UP RESISTORS
REQUIRED (CONNECTED TO BLACKFINGPIO - USE 12C_0 FIRST)
VIO: USE TO SET IO VOLTAGE MAX DRAW 20MA: USE ONLY TO POWER THE EEPROM (3MA MAX DRAW)
THE SDP REQUIRES 5V 300MA
VIN: USE THIS PIN TO POWER
THE SDP CONNECTOR IMPLEMENTS THE E13 CONNECTOR SPECIFICATIONS STANDARD. THIS IS A STANDARD FOR USE ACROSS ADI AND CANNOT BE MODIFIED
BOARD ID EEPROM (24LC32)MUST BE ON I2C BUS 0
MAIN 12C BUS (CONNECTED TO BLACKFIN TWI -PULL UP RESISTORS NOT REQUIRED)
WHEN USING SPI INTERFACE, BE AWARE OF ADDING A PULL UPON THE SPI_SEL_A/B/C LINES THAT ARE ACTIVE LOW ENABLEDSINCE SPI IS A SHARED BUS, ENSURE THAT ANY SPI DEVICE ON DAUGHTER BOARDIS NOT ACTIVELY DRIVING THE MISO DATA LINE UNLESS PROPERLY ADDRESSED WITHAN ACTIVE LOW CHIP SELECT. ENSURE ALSO THAT THE SPI CLK LINE IS NOT HELDHIGH OR LOW BY YOUR BOARD AT POWER UP. FAILURE TO MEET THISRESULT TO A NON-FUNCTIONAL SYSTEM.
R0603
R0603
R0603
74HC1G125GW
33Ω
33Ω
R0603
33Ω
R0603TOL=1
100kΩ
100kΩR0603TOL=1
DNI
100kΩR0603
0.1µF
10µF 0.1µF
TSSOP824LC32A-I/ST
49.9kΩ
FX8-120S-SV(21)
TSW-104-08-G-D
SPI
C10
R71
U4
C39 C40
R63
R62
R61
R60
R1
R3
R2U1
SDP
SDP_CSB
SCLK
SDP_SCLK
SDP_SDI
3.3V
3.3V
3.3V
3.3V
5V
SDP_SCLK
CSB
SDI
SDP_SDO
SDP_SDO
SDO
SDP_SDI
SDP_CSB
5
2
3
876
43
1
4
5
1
3
2
N
P
7
4
8
56
21
65
116
1
5
6259
72497348
87
89
3029 92
9032
88
3191
3837
85
39
8483
3433
82
64
35
41 8042 79
57
60
1002199
26 9527
7 1148 1139 112
10 111110
1213 10814 10715 10616 105
18 10319 10220 101
22
94
24 9725 96
120119
70
68676655
5453
5150
2
7447
764577447843
118117
115
109
104
98
93
86
81
75
69
6358
52
46
40
36
28
23
17
11
6
43
56
71
61
DGND
DGND
DGND
DGND
DGND
OE_NGND
VCCY A
VSS
VCC
WP
A2A1A0
SCLSDA
DGND
DGND
DGND
SPI_SEL_A
CLKOUT
NCNC
GNDGND
VIO(+3.3V)GND
PAR_D22PAR_D20PAR_D18PAR_D16PAR_D15
GNDPAR_D12PAR_D10PAR_D8PAR_D6
GNDPAR_D4PAR_D2PAR_D0
PAR_WR_NPAR_INT
GNDPAR_A2PAR_A0
PAR_FS2PAR_CLK
GNDSPORT_RSCLK
SPORT_DR0SPORT_RFSSPORT_TFSSPORT_DT0
SPORT_TSCLKGND
SPI_MOSISPI_MISO
SPI_CLKGND
SDA_0SCL_0GPIO1GPIO3GPIO5
GNDGPIO7
TMR_BTMR_D
NCGND
NCNCNC
WAKE_NSLEEP_N
GNDUART_TXBMODE1RESET_IN_N
UART_RXGNDRESET_OUT_NEEPROM_A0NCNCNCGNDNCNCTMR_CTMR_AGPIO6GNDGPIO4GPIO2GPIO0SCL_1SDA_1GNDSPI_SEL1/SPI_SS_NSPI_SEL_C_NSPI_SEL_B_NGNDSERIAL_INTSPI_D3SPI_D2SPORT_DT1SPORT_DR1SPORT_TDV1SPORT_TDV0GNDPAR_FS1PAR_FS3PAR_A1PAR_A3GNDPAR_CS_NPAR_RD_NPAR_D1PAR_D3PAR_D5GNDPAR_D7PAR_D9PAR_D11PAR_D13PAR_D14GNDPAR_D17PAR_D19PAR_D21PAR_D23GNDUSB_VBUSGNDGNDNCVIN
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Figure 20. Evaluation Board Layout, Layer 1
Figure 21. Evaluation Board Layout, Layer 2
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Figure 22. Evaluation Board Layout, Layer 3
Figure 23. Evaluation Board Layout, Layer 4
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ORDERING INFORMATION BILL OF MATERIALS
Table 3. Item Qty Reference Designator Description Manufacturer Part Number 1 1 U1 IC 32 kB serial EEPROM Microchip Technology 24LC32A-I/ST 2 1 U2 500 mA, low noise regulator Analog Devices, Inc. ADP7105ARDZ-5.0 3 1 U3 Low noise linear regulator Analog Devices, Inc. ADP7118ARDZ-3.3 4 1 U4 IC-TTL bus buffer NXP Semiconductors 74HC1G125GW 5 1 U5 4-channel LNA and PGA Analog Devices, Inc. ADA8282WBCPZ 6 8 +JINA, +JINB, +JINC, +JIND,
−JINA, −JINB, −JINC, −JIND End launch SMA Johnson 142-0701-801
7 8 +JOUTA, +JOUTB, +JOUTC, +JOUTD, −JOUTA, −JOUTB, −JOUTC, −JOUTD
Straight SMA Johnson 142-0701-201
8 1 5V_EN 3-pin header Samtec TSW-103-08-G-S 9 2 C1, C7 10 µF, 100 V tantalum
capacitor Kemet T491D106K025AT
10 14 C2 to C6, C10, C1INA, C1INB, C1INC, C1IND, C2INA, C2INB, C2INC, C2IND
0.1 µF, X7R, 50 V, 0805 capacitor
Kemet C0805C104J5RACTU
11 1 C12 1 µF, 25 V, 0805 capacitor Murata NFM21PC105B1C3B 12 4 C8, C9, C13, C14 1 µF, X5R, 6.8 V, 0603
capacitor Murata GRM188R61E105KA12D
13 4 C1OUTA, C1OUTB, C1OUTC, C1OUTD 5 pF, C0G, 2.2 V, 0805 capacitor
Murata GQM2195C2A5R0CB01D
14 8 C2OUTA, C2OUTB, C2OUTC, C2OUTD, C3OUTA, C3OUTB, C3OUTC, C3OUTD
1 µF, X7R, 0805 capacitor AVX 08051C104JAT2A
15 1 C39 10 µF, 13.2 V tantalum capacitor
AVX TAJA106K010RNJ
16 1 C40 1 µF, X8R, 0603 capacitor TDK C1608X8R1E104K 17 1 CR1 Zener Micro Commercial
Components SMBJ5342B-TP
18 2 DS1, DS2 LED Lumex SML-LX0603GW-TR 19 1 E1 Ferrite bead, 330 Ω, 0805 Murata BLM21PG331SN1D 20 1 F1 Fuse, 50 V Littelfuse 1210L050YR 21 12 P1INA, P1INB, P1INC, P1IND, P1OUTA,
P1OUTB, P1OUTC, P1OUTD, P2OUTA, P2OUTB, P2OUTC, P2OUTD
2-pin header Berg 69157-102
22 1 P2 Power jack CUI Inc. PJ-002A-SMT 23 8 R1INA, R1INB, R1INC, R1IND, R2INA,
R2INB, R2INC, R2IND SM, 49.9 Ω, 1%, 1/10 W, 0805 resistor
Panasonic ERJ-6ENF49R9V
24 10 R5, R7, R1OUTA, R1OUTB, R1OUTC, R1OUTD, R2OUTA, R2OUTB, R2OUTC, R2OUTD
SM, 0 Ω, 1%, 1/16 W, 0805 resistor
Panasonic ERJ-6GEY0R00V
25 2 R2, R3 SM, 100 kΩ, 1%, 1/10 W, 0603 resistor
Panasonic ERJ-3EKF1003V
26 8 R3OUTA, R3OUTB, R3OUTC, R3OUTD, R4OUTA, R4OUTB, R4OUTC, R4OUTD
SM, 5 kΩ, 0805 resistor Vishay PNM0805E5001BST5
27 1 R4 SM, 1 kΩ, 0603 resistor Panasonic ERJ-3EKF1001V 28 1 R6 SM, 165 Ω, 0603 resistor Panasonic ERJ-3EKF1650V 29 4 R60 to R63 SM, 33 Ω, 0603 resistor Multicomp MC 0.063W 0603 1% 33R 30 1 R71 SM, 49.9 kΩ, 0603 resistor Panasonic ERJ-3EKF4992V 31 1 RESET Slide switch Secma 09-03-201-02 32 1 SDP SDP connector Hirose FX8-120S-SV(21) 33 1 SPI 8-pin header Samtec TSW-104-08-G-D 34 1 TP_VIO Test point Vector K24A 35 1 VIO_3V3 2-pin header Samtec TSW-102-08-G-S
UG-846 ADA8282CP-EBZ User Guide
Rev. 0 | Page 16 of 16
NOTES
ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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