Digital Logic and Design 11 - sanlp.org Logic and Design 11.pdf · yIntroduction to design circuits with MSI and LSI ... yA decoder is a combinational circuit that convertsA decoder

Digital Logic and Design (EEE-241)Lecture

Dr. M. G. Abbas Malikabbas malik@ciitlahore edu [email protected]

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Previous lecturePrevious lectureIntroduction to design circuits with MSI and LSIBinary AdderBCD to Excess-3 BCD ConverterBCD AdderHowe work:

M it d C tMagnitude Comparator

Dr. M. G. Abbas Malik – COMSATS Lahore2

DecoderDecoderDiscrete quantities of information are represented in a digital system with binary codes.A binary code of n-bits is capable of representing up to 2n distinct elements of the codedup to 2n distinct elements of the coded information.A decoder is a combinational circuit that convertsA decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2n unique output lines.The decoder are called n-to-m line decoders where m ≤ 2n


DecoderDecoder2-to-4 Line Decoder

D3 = xy

x y D0 D1 D2 D3

0 0 1 0 0 00 1 0 1 0 0

D2 = xy’x1 0 0 0 1 01 1 0 0 0 1

D1 = x’yy Each output line Di

corresponds to a minterm

D0 = x’y’minterm.Thus a decoder generates the 2n


minterms of n input variables.

Decoder It can be used to build aDecoder3-to-8 Line Decoder

It can be used to build a binary to octal conversion circuit.

3 to 8 line decoder can be3-to-8 line decoder can be used in general to for decoding any 3-bit code to


provide eight possible outputs, one for each code.

DecoderDecoderBCD-to-Decimal Decoder

It is 4-to-10 decoder because BCD code contain 4 binary digits to code a decimal digit and there are 10 decimal digitare 10 decimal digit.With 4-bit inputs we can represent 16 different codes, so the 6 combinations are Don’t Carecodes, so the 6 combinations are Don t Care conditions during the design procedure.



Map of simplification

wx\yz 00 01 11 1000 D0 D1 D3 D2

01 D4 D5 D7 D6

11 X X X X

D ’ ’ D

11 X X X X10 D8 D9 X X

D2 = x’yz’ D9 = wz




DecoderDecoderCombinational Logic Implementation

A decoder provides the 2n minterms of n inputs.Any Boolean function can be expressed in sum of

i t ( i l f )minterms (canonical form), one can use a decoder to generate the minterms and an external OR gate(s) to form the sum.external OR gate(s) to form the sum.A combinational circuit with n inputs and m outputs can be implemented with an n-to-2n

decoder and m OR gates.


DecoderDecoderCombinational Logic ImplementationExample: Full-Adder

S(x, y, z) = Σ(1, 2, 4, 7)C(x, y, z) = Σ(3, 5, 6, 7)

0x

y

22

21

0123

S

z 204567

C


7

Decoder with enableDecoder with enableSome IC decoders are constructed with NAND gates.Since NAND gate produces the AND operation with an inverted output it becomes morewith an inverted output, it becomes more economical to generate the decoder minterms in their complemented form.pMost, if not all, IC decoders include one or more enable inputs to control the circuit operation.


Decoder with enableDecoder with enableCircuit diagram and Truth Table

E x y D0 D1 D2 D3

1 X X 1 1 1 10 0 0 0 1 1 10 0 0 0 1 1 10 0 1 1 0 1 10 1 0 1 1 0 10 1 1 1 1 1 00 1 1 1 1 1 0


Decoder with enableDecoder with enableBlock diagram


DecoderDecoderDemultiplexer

A demultiplexer is a circuit that receives information on a single line and transmits this information on one of 2n possible output linesinformation on one of 2n possible output lines.A decoder with an enable input can function as a demultiplexer.demultiplexer.The selection of specific output line is controlled by the bit values of n selection lines.


DecoderDecoderDemultiplexer

E is taken as a data input lineLines A and B areLines A and B are taken as the selection linesE i DExercise: Draw the circuit diagram for this 1-to-4 demultiplexer.


DecoderDecoder1-to-4 Demultiplexer: Circuit Diagram

D3 = xy

A decoder with an enable input is referred as a

D2 = xy’x

referred as a decoder/demultiplexerIt is the enable input th t k th i it

D1 = x’yy

that makes the circuit a demultiplexerThe decoder itself can

D0 = x’y’E

use AND, OR, NAND or NOR gates.


DecoderDecoderDecoder circuits can be connected together to form a larger decoder circuit.4-to-16 Decoderd i d ithdesigned with2 3-to-8 decoders


EncoderEncoderAn encoder is a digital function that produces a reverse operation from that of a decoder.An encoder has 2n (or m ≤ 2n) input lines and n output linesoutput lines.The output lines generate the binary code for the 2n input variables.2 input variables.

22012

21

20

3456

8-to-3 encoder


67

EncoderEncoder8-to-3 Encoder

2201 2

21

234

8-to-3 encoder

20567


EncoderEncoder8-to-3 Encoder – Truth Table

Inputs OutputsD0 D1 D2 D3 D4 D5 D6 D7 x y z1 0 0 0 0 0 0 0 0 0 00 1 0 0 0 0 0 0 0 0 10 0 1 0 0 0 0 0 0 1 00 0 1 0 0 0 0 0 0 1 00 0 0 1 0 0 0 0 0 1 10 0 0 0 1 0 0 0 1 0 00 0 0 0 0 1 0 0 1 0 10 0 0 0 0 0 1 0 1 1 00 0 0 0 0 0 0 1 1 1 1


MultiplexerMultiplexerMultiplexing means transmitting a large number of information nits o er a smaller n mber ofinformation units over a smaller number of channels or lines.A digital multiplexer is a combinational circuit that g pselects binary information from one of many input lines and directs it to a single output line.The selection of a particular input line isThe selection of a particular input line is controlled by a set of selection lines.Normally, there are 2n input lines and n y, pselection lines whose bit combinations determine which input is selected.


MultiplexerMultiplexer4-to-1 Multiplexer

00123

4-to-1 Multiplexer

Input lines Output

lines

Select lines


MultiplexerMultiplexer8-to-1 Multiplexer

011234

8-to-1 Multiplexer

Input lines

Output lines4

567

Select lines


MultiplexerMultiplexerSelf Study

How we can implement Boolean function using encoders and multiplexers?Ch t 5 D d E d d M lti lChapter 5: Decoder, Encoders and Multiplexers


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Digital Logic and Design 11 - sanlp.org Logic and Design 11.pdf · yIntroduction to design circuits with MSI and LSI ... yA decoder is a combinational circuit that convertsA decoder