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Proceedings of ITC-CSCC ¯97 Okinawa, Japan Design of A Vita -bi Decoder with Sequence- Processing CapabHity Jot- -M oon Choi, Jung-n Han, W oo-Young Choi, Borg ¤ yul U rn Dept. of Electronic Engineering, Yonsei University 134, ShHU M ID or- , Sudae m on- Ku, Seoul 120 %9, Korea E- md : humph@semicord a- rIsa ac-kr Fa : +a z a l- -a Abstract : In this paN r, we proposed a Vherbi decoder for practical implementation of For ward E- or Correction- EC). The design was ma nly f- used on real- time prÄ essing by using the memory organization m d its control method with cons- a nt length 7, coding rate 1/ 2. M anagement of memory contents in a Vita -u decoder is a major design problem for both hardware and software realization. In this design, we solved that problem with sequence processing. 1. Introduction h ma y d gital comfy-lullcanon systems, etTor com- don circuitry is widely used in order to reduce the bit erTOr- rate of u ansmit- d data [2,5]. Convolutional coding with Vita -bi decoding is a powerful method for forward error correction [ 1- 5] . In present commercial applications, V ita -u decoder s with R(coding rate)=1/2 a d K(constraint length)=7 are widely used. A very simple v an ation of the Vitemi algorithm permits t he u se of soft-da ls on demodulated data in which signal values a - quantized into multiple levels a d digitized [2,5]. The advantage of soft decision demodulation 1S mat the signal values not only indicate whether they represent one or zero, but also indicate £ e magnitude of the con-t»ption of the signal by noise at the instant of quanna tion- A significant processing ga n can be achieved by using soft da ismn data, typical- about 2 dB for 3- bit dat a. We designed a Vherbi decoder mat has R=1/2, K=7 m d 3- bit soft decision. Our design has a trace- back a clutc h- e ad achieves Va ir- , uM ating a d stou r- of the real- time sequences within a single clx k cycle. 2 . V h er bi A 1g o¢ £ m T he Vita -M algorh hm @Horn½S the maximum likelihood decoding [ 1- ð T he adv¤ ttage of Vitemi decoding is mat the complexity of the decoder is not a function of the number of symbols in the codew or d sequence [2]. T he algor1thm determines a measure of similarhy between received signals, at time ti, a d d l the trellis paths entering each state at time ti. Then, it removes V eHi s paths m at cm not be a ca didate for the maximum likenhÄ d choice. When two paths enter the sa ne state, me one having the smallest meM c is chosen. T his path is caned the survivor path. The M ecum of survivor path is * rformed for all the states. T he da Oder- continues in this way a d makes decisions by eliminating the least likely paths [2- 5]. T he early M a nort of the unlikely paths reduces the da Oding complexity [2]. Vita- i da Oder has three major pa ts. The first pa t calculates bra ch meM cs. The branch men-c is the likelihood meM c of ra eived cd es, and is calculated based on the comparison betw een the M lHs a d received convolutional codes [2- 5] . T he second pa t is ±A dd- Compare- Select (ACS)± pa t . In A CS, path ma rtcs are updated by adding bra ch me- -Cs associated with each possible state Vm o tion [6]. T he number of states N S of a convolutional encoder which generates n encoded bits is a function of the cons- a nt length K a d input bits b [1,2]. N . = 2b(KO (1) R = b/ n (2) T he £ ó d pa t per forms pat h seIa Oon and memery manager- nt. The smaller path metric is the path meM c for the state and me resultmg - 701

Design of A Vita -bi Decoder with Sequence-Processing ...tera.yonsei.ac.kr/publication/pdf/conf_1997_jmchoi_ITCCSCC.pdf · A very simple van ation of the Vitem i algorithm permits

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  • Proceedings of ITC-CSCC ¯97 Okinawa, Japan

    Design of A V i ta -bi Decoder

    w it h Sequence- Pr ocessing CapabHi ty

    Jo t- - M oon C h o i , Ju n g - n H an , W oo - Y ou ng C h o i , B o rg ¤ y u l U rn

    Dept . of Elect ronic Engineering, Yonsei Universit y134, ShHU M ID or- , Sudae m on- K u, Seoul 120 % 9, Korea

    E- md : humph@semicord a- rIsa ac-kr

    Fa : +a z a l - - a

    A bst r act : In this paN r , we proposed a V herbidecoder for practical implement ation of For w ardE- or Cor rection- EC). T he design w as ma nlyf- used on real- ti me prÄ essing by using thememory organization m d it s control method w ithcons- a nt length 7, coding r ate 1/ 2. M anagementof memory contents in a V ita -u decoder i s a

    major design problem for both hardw are andsoftware realization. In t hi s design, w e solvedthat problem w ith sequence processing.

    1. Introduct ion

    h ma y d git al comfy-lu llcanon sy stems, etTorcom- don circuitry i s w idely used in order toreduce the bit erTOr- rate of u ansmit - d data[2,5] . Convolutional coding w it h V ita -bi decodingis a pow er ful method for for w ard err orcorrect ion [ 1- 5] . In present commercialapplications, V ita -u decoder s with R(codi ngrate)=1/ 2 a d K (constraint length)=7 are w idelyused.

    A very simple van ation of the V item ialgorithm permit s the use of soft - da ls ondemodulated data in w hich signal values a -quantized into mul tiple levels a d digit ized [2,5] .The advantage of soft decision demodulat ion 1Smat t he signal values not only indicate w hetherthey represent one or zero, but also indicate £ emagnitude of the con -t»pt ion of t he signal bynoise at t he instant of quanna t ion- A significantprocessing ga n can be achieved by using softda ismn data, typical- about 2 dB for 3- bit

    dat a.We designed a V herbi decoder mat has R=1/ 2,

    K=7 m d 3- bit soft decision. Our design has atrace- back a clutc h- e a d achieves V a ir- ,uM at ing a d stou r- of the real- t ime sequenceswithin a single clx k cycle.

    2 . V h er b i A 1g o ¢ £ m

    T he V ita -M algorh hm @Horn½S the max imumlikelihood decoding [1- ð T he adv¤ ttage ofV item i decoding is m at the complexity of thedecoder is not a function of the number ofsymbols in the codew ord sequence [2] . T healgor1thm determines a measure of similarh ybet w een received signals, at t ime ti, a d d l thet rel l is paths enter ing each state at t ime ti. T hen,it removes V eHi s paths m at cm not be aca didate for the max imum likenhÄ d choice.W hen tw o paths enter the sa ne state, me onehav ing t he smallest meM c is chosen. T his pathis caned the surv ivor path. T he M ecum ofsurv ivor path is * rform ed for all the states.T he da Oder- cont inues in this w ay a d makesdecisions by eliminating the least l ikely pat hs[2- 5] . T he ear ly M a nort of t he unlikely pathsreduces t he da Oding complexi ty [2] .

    V ita - i da Oder has thr ee maj or pa ts. T hefi rst pa t calculates bra ch meM cs. T he branchmen- c i s the likelihood meM c of ra eived cd es,and is calculated based on the compari sonbetw een the M lHs a d r eceived convolut ionalcodes [2- 5] . T he second pa t is±A dd- Compare- Select (A CS)± pa t . In A CS, path

    ma rtcs ar e updated by adding bra ch me- -Csassociated w i th each possib le state Vm o tion [6] .T he number of states N S of a convolut ionalencoder w hich generates n encoded bits is afunction of the cons- a nt length K a d inputbit s b [ 1,2] .

    N . = 2b(KO (1)R = b/ n (2)

    T he £ ó d pa t per forms path seIa Oon andmemery manager- nt . T he smaller path metr ic isthe path meM c for the st ate and me resultmg

    - 701

  • Proceedings of ITC-CSCC 9̄7 Oki nawa, Japan

    the memory contents- The operation of ourdesign was confirmed with VHDL simulation,and the actual circuit was synthesized a dlad- out.

    Fig . 2 Blm k diagram of trace- back logic

    F ig . 3 BlÄ k diagra m of tr- back

    7 0 3