Design and Development of a generic DVB-RCS terminal architecture based on the LEON

CPU core – DELOS

byNikos Mouratidis, Spyros Tombros(Keletron Ltd), Michael

Kokkinos(Siemens Hellas), Michael Theologou(NTUA), Ferdinand Schlapansky(Siemens PSE)

Design and Development of a generic DVBDesign and Development of a generic DVB--RCS terminal architectureRCS terminal architecture based on the LEON based on the LEON

CPU coreCPU core –– DELOSDELOS

bybyNikos MouratidisNikos Mouratidis, , Spyros TombrosSpyros Tombros((Keletron Keletron LtdLtd), Michael ), Michael

Kokkinos(Kokkinos(Siemens HellasSiemens Hellas), Michael ), Michael TheologouTheologou((NTUANTUA), ), Ferdinand Ferdinand SchlapanskySchlapansky((Siemens PSESiemens PSE))

Paper presentation at the 9Paper presentation at the 9thth International Workshop on Signal Processing International Workshop on Signal Processing for Space Communications for Space Communications ––SPSC 2006SPSC 2006

NordwijkNordwijk, ESTEC, 11, ESTEC, 11--13/09/200613/09/2006

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Presentation TopicsPresentation TopicsPresentation Topics

? Objectives of the paper

? Introduction to DELOS IP-core

? Requirements dictating its development

? IP-core’s architecture

? Features

? Exploitation Aspects

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ObjectivesObjectivesObjectives

? Present the architecture of an embedded system that realizes the protocol stack of DVB-RCS terminals.

? Outline its provided functions and explain how they should be complemented by external logic when building DVB-RCS terminals.

? Present the building blocks of the system architecture.

? Outline their functionality and contribution to DVB-RCS logic.

? Give integration possibilities

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Introduction to DELOS IP-core (1)Introduction to DELOS IPIntroduction to DELOS IP--core (1)core (1)

? Physical Positioning

Digital &AnalogSignal

ProcessingFunctions

Forward &ReturnChannelProtocol

Processor

UserInterface

Logic

IDUODU

RXUnit

(LNB)

TX Unit(BUC)

IFL

Network Interface Unit

DELOS IP-core

? Exploited interfaces:? User Interface Unit (UIU)? Analog front-end interface (AFI)? Control Interface

UIUAFI

Control

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Introduction to DELOS IP-core (2)Introduction to DELOS IPIntroduction to DELOS IP--core (2)core (2)

? Physical dimensioning:? HW/SW IP-core? Mappable on FPGAs or ASICs

? Internal Structure:? Implements both C and U-planes? Generic interfaces towards external units? Fully Satlabs compliant protocol operation

? Generic architecture covering:? User traffic policing? Full IP compatibility? Generic SW interfaces to User terminals? Interfaces for remote management

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Requirements (1)Requirements (1)Requirements (1)

? Low level user requirements (Terminal Manufacturers)? A single entity implementing the DVB-RCS protocol stacks in SW.? Re-programmability and upgradeability to incorporate future Satlabs

recommendations.? Generic interfaces for control, data and signaling.? Versatility in implementation so as to be re-usable in any terminal design types

(ASIC, FPGA, pure Software).? Ability for internal algorithms alteration.? Standard interfaces for remote control.? Hardware and software reprogramming.? Low-price.? Re-usability.? Configurable downlink and uplink rates.

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Requirements (2)Requirements (2)Requirements (2)

? High level user requirements (Users)? Configurable rates & flexible traffic policing schemes.? Full IP compatibility.? Open architecture to new standards.? Low price.? Flexible and easy-to-use.? No need for bulky and complex configurations.

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Requirements (3)Requirements (3)Requirements (3)

? Requirements for DVB-RCS functionality? Compliance to current and future Satlabs recommendations.? Shall be able of communicating using 54Mbps forward and 4Mbps return links? Shall allow simultaneous execution of more than two user applications.? All variable DVB-RCS communication parameters should be accessible to user software via

special registers.? To ensure low end prices the HW and SW of the core should be developed using license-

free development and real time environment platforms.? Its control interface must support SNMP protocol.? Shall be able of handling user traffic (in MPEG2-TS or ATM formats) + Signalling.? Shall be able of decoding signaling messages sent by the network and associate their

meaning with the user traffic.? Shall support all mandatory user signaling operations (login, link synchronization, logout).? Shall be responsible for monitoring clock fluctuations and perform necessary actions for

adjusting the clock frequency of the front-end interface.

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Architecture – General (1)Architecture Architecture –– General (1)General (1)

? Building Blocks:? Protocol Accelerator? MAC functions? Protocol Stacks

? Interfaces to external logic:? PCI to terminal hosts? Control logic for logic configuration& programming.? Front-End to Analog Circuitry (FIFO Type).

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Architecture – General (2)Architecture Architecture –– General (2)General (2)

? DVB-RCS Protocol Stacks: Implements the Finite State Machine (FSM) for the control (signalling) and user plane operations in accordance with the DVB-RCS protocol requirements set by ETSI and Satlabs variations.

? MAC Functions: realises procedures relating to incoming data streams recognition, error control, distinction between data and control information, disassembly and classification into the memory queue. On the outgoing direction, it performs user and control traffic assembly and multiplexing in MPEG2-TS or ATM streams.

? Protocol Accelerator: Hosts traffic shaping schemes for handling the outgoing user traffic according to the rate requirements of his application.

? H/W Logical Interfaces: Implement standard buses towards the host terminal, the user application and the front-end analog circuitry.

? S/W Logical Interfaces: Implement SW APIs towards the host terminal to be used by potential applications and system derivers for exchanging data traffic and control information with the IP-core.

? The LEON-2 CPU core offers the runtime environment for hosting both the software and hardware logic of the IP-core.

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Architecture – Hardware PartArchitecture Architecture –– Hardware PartHardware Part

UIU Interfaces

LEON CPU Core

InstructionCache

DataCache

BusArbitration

DMA Controller

MACController

MIIInterface

Standard 32 bitbus (for PCI)Front-End

Interface

SDRAM/SRAMController

Sys

tem

Bus

(AM

BA

AH

B)

(Data &Management)

Flash

SDRAM/SRAM

ExpansionBus

UIU

DSP andAnalog

Functions

Management, Configuration and Monitoring

Data and Signaling Traffic

ProtocolAccelerator

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Architecture-Software Part (1)ArchitectureArchitecture--Software Part (1)Software Part (1)

? Based on Linux runtimeEnvironment

? Communication with theH/W is implemented viaLinux Drivers

Front-End Interface UIU Interfaces

DVB-RCS Driver UIU Driver

Linux OS

Linux Kernel

DVB-RCSProtocol

StackLibrary

Call Control

User Applications

ManagementFunctions

IP-core hardware

IP-c

ore

softw

are

part

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Architecture-Software Part (2)ArchitectureArchitecture--Software Part (2)Software Part (2)

MPEG2-TS

Private Sections

TIM SPT SCT FCT TCT TBTP PCR

Forward Link

Prefix DULMSAC

MPEG2-TS or ATM TRFs

Minislot

Return Link

MAC MessagesCMT

Interfaces to Terminal Environment

MAC Functions

Protocol Execution Engine

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Architecture-Software Part (3)ArchitectureArchitecture--Software Part (3)Software Part (3)

Packet Recogniser &Disassembler

MemoryClassifier

DVB-S & ATM PacketAssembler

Multiplexer(Time-slot Assigner)

HW Interface

ProtocolAccelerator

SignallingStack Execution

Engine

SW Interface

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Architecture-Software Part (4)ArchitectureArchitecture--Software Part (4)Software Part (4)

IP PacketsClassifier

TrafficScheduler/

Policer

MACFunctions(Packets

formatting)Traffic Memories

Bank

SWInterface

HWInterfaces

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Features – Supported ProtocolsFeatures Features –– Supported ProtocolsSupported Protocols

? ENH-Type A Forward Link

? ENH-Type A Return Link

MPEVCMUX/AAL5

MPEG-TS

Private Sections

BearerControl

ConnectionControl Fault Config Accounting Performance Security

DVB-S

Control Management

ATM

MPEG2-TS

IP

DVB-S

MPE

MPEG2-TS ATM

VCMUX/AAL5

IP

Prefix MPAFDULM

MAC Messages

SAC

Special Bursts (ETSI EN 301 709)

Minislot Protocols Stack for Signalling

Protocols Stack for user trafficOptional Part

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Features-Generic Protocols SpecificationFeaturesFeatures--Generic Protocols SpecificationGeneric Protocols Specification

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Features-Signaling Protocols SpecificationFeaturesFeatures--Signaling Protocols SpecificationSignaling Protocols Specification

? Forward link

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Features-Signaling Protocols SpecificationFeaturesFeatures--Signaling Protocols SpecificationSignaling Protocols Specification

? Return link

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Exploitation AspectsExploitation AspectsExploitation Aspects

IP Backbone

Digital &AnalogSignal

ProcessingFunctions

Forward &ReturnChannelProtocol

Processor

MACController

&EthernetChipset

IDUODU

DVB-RCS IP or LANE Gateway

RXUnit

(LNB)

TX Unit(BUC)

IFL

Network Interface Unit

MII or MAC interface

External uP Data/Control Bus

Ethernet 10/100/1000

Digital &AnalogSignal

ProcessingFunctions

Forward &ReturnChannelProtocol

Processor

PCI/USBSystem bus

IDUODU

DVB-RCS Consumer Terminal

RXUnit

(LNB)

TX Unit(BUC)

IFL

Network Interface Unit

External uP Data/Control Bus

Standard PCI, USBbus

User Terminal

Corporate, ProsumerEthernet Network

(all IP)

DELOS IP-core

User Devices

RxTxRxTx

Telecoms Earth Network(Voice, Data)

End of Presentation

Thank You!

End of PresentationEnd of Presentation

Thank You!Thank You!