Delta Modulation and Demodulation Trainer

8/22/2019 Delta Modulation and Demodulation Trainer

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ST2155

Delta Modulation & Demodulation Trainer

(Delta, Adaptive Delta & Sigma Delta)

ST2155

1. Safety Instructions2. Introduction3. Features4. Technical Specifications5. Theory

I.Delta ModulationII.Delta Demodulation

III.Adaptive delta modulationIV.Delta Sigma Modulation

6. Experiments Experiment 1

Study of Delta Modulation Demodulation

Experiment 2Study of Adaptive Delta Modulation and Demodulation

Experiment 3Study of Delta Sigma Modulation and Demodulation

7. Frequently Asked Questions

INDIAN INSTITUTE OF TECHNOLOGY BHUBANESWAR

SCHOOL OF ELECTRICAL SCIENCES

COMMUNICATION SYSTEMS LABORATORY Page 1


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Safety Instructions

Read the following safety instructions carefully before operating the instrument. To

avoid any personal injury or damage to the instrument or any product connected to it.

Do not operate the instrument if suspect any damage to it.

The instrument should be serviced by qualified personnel only.

For your safety:

Use proper Mains cord : Use only the mains cord designed for this instrument.

Ensure that the mains cord is suitable for your

country.

Ground the Instrument : This instrument is grounded through the protective

earth conductor of the mains cord. To avoid electric

shock the grounding conductor must be connected to

the earth ground. Before making connections to the

input terminals, ensure that the instrument is properly

grounded.

Observe Terminal Ratings : To avoid fire or shock hazards, observe all ratings and

marks on the instrument.

Use only the proper Fuse : Use the fuse type and rating specified for this

instrument.

Use in proper Atmosphere : Please refer to operating conditions given in the

manual.

1. Do not operate in wet / damp conditions.2. Do not operate in an explosive atmosphere.3. Keep the product dust free, clean and dry.





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Introduction

The ST2155 Delta Modulation & Demodulation Trainer demonstrates the delta,

adaptive delta and sigma delta modulation and demodulation schemes. It covers the

concepts of delta modulation demodulation, slope overloading, adaptive deltamodulation demodulation, sigma delta modulation demodulation and amplitude

overloading.

Know your ST2155 trainer better :

The trainer requires 12V and 5V (200mA) dc signal which can be obtained from

ScientechPower Supply ModelAD-01

Synchronized & Adjustable Amplitude Sine Wave Generators of 1, 2, 3 & 4 KHz and

separate adjustable D.C. level are provided on board. Various test points on the trainer

make user understand, the complete process that takes place for the Delta modulation

and demodulation process.

Six sampling clock frequencies of 50, 100, 200 and 400 KHz are provided on board.

These frequencies can be observed at test points 6, 7, 8 and 9 respectively.

Transmitter and receiver clocks are switch selectable and can also be observed at testpoints 10 and 11 respectively.

Integrators in transmitter and receiver blocks are provided with manual and automaticgain control. Manual gain control in both transmitter and receiver is done by switches

labeled A & B. Automatic gain adjustment is done by control circuit. A switch is

provided for the selection of manual or automatic gain control.





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Technical Specifications

Crystal Frequency : 6.400 MHz

Sampling Clock Frequency : 50, 100, 200 & 400 KHz (Switch selectable)

On Board Generator : Synchronized & Adjustable Amplitude SineWave Generator of 1, 2, 3 & 4 KHz

Separate Adjustable D.C. level

Integrator : Four integrator gain settings

Normal, X 2, X 4, X 8

Low Pass Filter : Fourth order Butterworth

(Cut Off Frequency- 4.8 KHz)

Test Points : 43Interconnections : 2 mm socket

Power Supply : 5V, 12V DC, 200mA

Dimensions (mm) : W 325, H 90, D 255

Weight : 1.1 Kgs (approx.)





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Theory of Delta Modulation

Delta modulation (DM or-modulation) is an analog-to-digital and digital-to-analog

signal conversion technique used for transmission of voice information where quality

is not of primary importance. DM is the simplest form of differential pulse-codemodulation (DPCM) where the difference between successive samples is encoded into

n-bit data streams. In delta modulation, the transmitted data is reduced to a 1-bit data

stream.

Its main features are:1. The analog signal is approximated with a series of segments2. Each segment of the approximated signal is compared to the original analog

Wave to determine the increase or decrease in relative amplitude.

3. The decision process for establishing the state of successive bits is determinedby this comparison

4. Only the change of information is sent, that is, only an increase or decrease ofthe signal amplitude from the previous sample is sent whereas a no-changecondition causes the modulated signal to remain at the same 0 or 1 state of the

previous sample.

To achieve high signal-to-noise ratio, delta modulation must use over sampling

techniques, that is, the analog signal is sampled at a rate several times higher than theNyquists rate.

Delta modulation is a system of digital modulation developed after pulse code

modulation. In this system, at each sampling time, say the Kth sampling time, the

difference between the sample value at sampling time K and the sample value at the

previous sampling time (K-1) is encoded into just a single bit. i.e. at each samplingtime we ask simple question.

Has the signal amplitude increased or decreased since the last sample was taken?

If signal amplitude has increased, then modulator's output is at logic level 1.

If the signal amplitude has decreased, the modulator output is at logic level 0.

Thus, the output from the modulator is a series of zeros and ones to indicate rise and

fall of the waveform Figure 1 shows the block diagram of delta modulator.





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Delta modulator

Figure 1

The Delta Modulator works as follows:

The analog signal which is to be encoded into digital data is applied to the +ve input

of the voltage comparator which compares it with the signal applied to its -ve input

from the integrator output.

The comparator's output is logic '0' or '1' depending on whether the input signal at +ve

terminal is lower or greater then the -ve terminals input signal.

The comparator's output is then latched into a D-flip-flop which is clocked by the

transmitter clock. Thus, the output of D-flip-Flop is a latched 'l' or '0' & synchronized

with the transmitter clock edge.

This binary data stream is transmitted to receiver and is also fed to the unipolar to

bipolar converter. This block converts logic '0' to voltage level of + 4V and logic 'l' to

voltage level - 4V.

The Bipolar output is applied to the integrator whose output is as follows:

a. Rising linear ramp signal when - 4V is applied to it, (corresponding to binary 1)b. Falling linear ramp signal when + 4V is applied to it (corresponding to binary 0).The integrator output is then connected to the -ve terminal of voltage comparator, thus

completing the modulator circuit.

Let us understand the working of modulator circuit with the analog input waveform

applied as below:





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Technique of Delta Modulation

Figure 2

Suppose at some time-instance t = 0, the integrator output voltage is lower than the

analog input. This causes the voltage comparator voltage to go high i.e. logic '1'. This

data is latched in the D- Flip- Flop at the rising edge of transmitter clock., The latched

'1' output of D- flip is translated to - 4V by the unipolar to bipolar converter block.

The integrator then ramps up to catch analog signal.

At the next clock cycle t = 1, the integrator output becomes more than the analoginput, so a '0' is latched into D-Flip-Flop. The integrator now ramps downward as

+4V voltage signal from unipolar to bipolar converter appears at its input. Thus, the

ramp signal again tries to catch the fallen analog signal.

As we can observe, after several clock cycles the integrator output is approximation ofthe analog input which tries to catch up the analog input at each sample time. The data

stream from D-flip-flop is the delta modulators output.

The delta demodulator consists of a D-Flip-Flop a unipolar to bipolar converter

followed by an integrator and a low pass filter. Figure 3 shows the block diagram ofdelta demodulator.

Delta De Modulator

Figure 3





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Delta Demodulation

The delta demodulator works as follows:

The delta demodulator receives the data from D-Flip-Flop of delta modulator. It

latches this data at every rising edge ofreceiver clock, which is delayed by half clockperiod with respect to transmitter clock. This has been done so that the data from

transmitter may settle down before being latched into the receiver Flip-Flop.

The unipolar to bipolar converter changes the output from D-Flip-Flop to either - 4V

or + 4V for logic '1' and '0' respectively.

In case of modulator when the output from unipolar to bipolar converter is applied to

integrator, its output tries to follow the analog signal in ramp fashion and hence is a

good approximation of the signal itself. The integrator's output contains sharp edges,

which are 'smoothened out' by the low - pass filter, whose cut-off frequency is just

above the audio band.

Delta modulation offers many advantages as listed below:

Simple circuitry Cheap Single bit encoding allows us to transmit more information at some sampling

rate for given system bandwidth.

Unfortunately, the practical use of delta modulation is limited due to the following

several drawbacks.

a. NoiseNoise is defined as any unwanted unpredictable random waveform accompanyingthe information signal. Whenever the signal is received at the receiver, it is always

accompanied by noise.

b. DistortionDistortion means that the receiver's output is not the true copy of the analog input

signal at the transmitter.

Distortion in delta modulation occurs due to following causes:

When the analog signal is greater then the integrator output, the integrator ramps

up to meet the analog signal. The ramping rate of integrator is constant. Therefore,if the rate of change of analog input is faster than the ramping rate, the modulator

is unable to catch up with the information signal. This causes a large disparity

between the information signal and its quantized approximation. This

phenomenon is known as slope - overloading and causes the loss of rapidly

changing the information.





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Information Loss due to Rapid input Changes

Figure 4The problem of slope overloading can be solved by increasing the ramping rate

of the integrator. But as the effect of the large step-size added large sharp edges

at the integrator's output and hence it adds to noise problem faced at receiver.

Increasing sampling rate cannot be the solution to the slope - overloading

problem as it determines how fast the samples are taken and not the ramping

rate of the integrator.

Effect of Sampling Rate on Quantization Noise & Step-Size

Figure 5

c. Another problem with delta modulation is that it can not pass DC information.This is not a serious limitation of speech communication but for the systems like

video (picture) transmission DC level does not provide information aboutbrightness level of the picture .

The above stated limitations of the delta modulation may be traded for

acceptable price in speech application but is totally unsatisfactory for music or

video signals.





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Adaptive Delta Modulation

Delta modulation system is unable to chase the rapidly changing information of the

analog signal, which gives rise to distortion & hence poor quality reception. This is

known as slope overloading phenomenon. The problem can be overcome byincreasing the integrator gain (i.e. step-size). But using high step-size integrator would

lead to a high quantization noise.

Quantization Noise:

It is defined as error introduced between the original signal, & the quantized signal

due to the fixed step size in which the signal (quantized) is incremented. As the error

is random in nature & hence unpredictable, it can be treated as noise. High

quantization noise may play on small amplitude signals. The solution to this problem

is to increase the integrator gain for fast-changing input & to use normal gain forsmall amplitude signals.

The basic idea is to increase the integrator's gain when slope overload occurs. If still itis unable to catch up with the signal, the integrator gain is doubled again. The

integrator on board has four available gains standard, standard X2, standard X4, and

standard X8. The integrator thus adopts it self to the gain where its lowest value canjust overcome the slope overloading effect. See figure 8.

Principal of Adaptive Delta Modulation

Figure 8





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Control Word Integrator Gain

00 Standard

01 Standard X210 Standard X4

11 Standard X8

Table 1The input to the control circuit is the latched data from the D Flip-Flop. The counter is

reset whenever 'high' appears at the output of the control circuit. Both the counter &

the control circuit are clocked by the same TX clock. The input to the integrator from

the counter is a two-bit control word, which controls the gain of the integrator. Whenthe output of counter is '00' the gain is lowest (standard) where as it is highest

(standard X8) for counters output '11'.

Adaptive Delta Modulator

Figure 9

The adaptive delta modulator works as Follows:

The control circuit compares the preset data bit from D flip-flop with the previous two

data bits. Its output to the counter is high when the three bits are identical, the control

circuits output goes low, thus letting the counter advance with every clock cycle. This

advancement continues till the output from the control circuit does not go 'high'. Each

time the counter is incremented from 00 integrator gain is doubled till the counter





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reached '11' where it remains in that state until it is reset by the counter. Similarly, theadaptive delta demodulator is a like delta demodulator except for two blocks namely,

the control circuit & the counter. They function in the same way as in modulator part,except for the fact that they are clocked by the receiver clock. Consider the adaptive

delta modulator in operation. In normal case, when slope overloading is not occurring,the integrator output always hunt above & below the analog input even after it has

caught up with it. The output from the D-Flip-Flop is a constantly changing from ' l' to

'0' at each TX clock edge. Even when the analog input is changing at a slightly higher

rate, the integrator ramp output is able to catch it in two clock cycles. Thus, the output

of the D-Flip-Flop is never a three or more consecutive '0' or 1s.

The changing input to the control circuit ensures that its output to the counter is high

& hence the counter is reset at every clock cycle. Thus the control word from counter

is always '00' forcing the integrator gain at its lowest value, thereby reducing

quantization noise. Here the adaptive delta modulator is behaving just as a delta

modulator.

Suppose, now a fast changing analog signal appears at the input of the modulator suchthat the slope overloading occur. The integrator output no longer follows the analog

signal but it spends its time trying to catch up the analog signal (either it ramps downor up continuously). As a result of continuous ramping in one direction, the D-Flip-

Flops output is either '0' or '1' for three or more consecutive time. As soon as the third

continuous 1/0 is sensed by the control circuit its output goes low. The counter now

advances to 01 doubling the integrator gain. This increases the ramping rate of the

integrator & it is able to catch the analog signal faster. In the next clock cycle if the

same situation continues the counter advances to 10' thus forcing the integrator gain

to quadruple its standard value. This situation continues till the counter advances to

'11' where it remains locked until the control logic does not detect a change in the bitlevel at its input

As soon as the control circuit detects a change in the bit level, its output goes high,

thus resting the counter & thus normalizing the integrator gain.





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Delta Adaptive Demodulator

Figure 10

The Demodulator work as follows:

The adaptive delta demodulator control circuit receives the same bit stream as the

transmitted one except for the fact that it is received after a half clock cycle delay.

The functioning of the receiver's control circuit & counter is same as that of the

transmitter's block. Therefore, the demodulator output which itself is a goodapproximation of the analog input signal accepts for the inhere spikes. The outputfrom integrator is passed to a low pass filter to 'smooth out 'the waveform. Thus,

adaptive delta modulation system is thus able to reduce slope-over load error at an

expense of small increase in quantization error. It turns out that in matter of speech

transmission the reduced slope error provides a net advantage in spite of slight

increase in quantization error & that the adaptive delta.

Modulator can operate at the bit rate of 32 KB/S with performance comparable to that

obtained using PCM at 64 KB/S.





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Delta Sigma Modulation

The delta modulation & adaptive delta modulation suffers from two serious

limitations, namely, they are not able to pass DC level information, which is a must in

video systems. The signal - to - noise ratio decreases as the signal frequencyincreases.

Both these serious limitations can be overcome by delta sigma modulation.

The delta modulator on-board can pass DC level information if the integrators are

zeroed before hand (by level adjust presets) & the gains of integrator at two ends (TX& RX) are exactly equal. This is possible on ST2105 board but not in real life

operation where TX & RX are separated by hundreds of kms & they are expected towork over a long period without additional setting up.

The inherent short coming of the delta modulator to pass DC level information is due

to the fact that it passes the information about the change in the voltage level & not

the actual voltage level itself e.g. encodes the change from -2V to -1V same as itwould encode a change from +2V to +3V.

In delta sigma modulation the integrator is added in front of the delta sigma

modulator. This simple arrangement makes a big change in the circuit behavior. It

now responds to actual voltage levels rather than the change in the voltage level.

The effect of the addition of integrator before the delta modulator can be done away

by adding a differentiator at the end of the receiver. The System looks as shown in

figure 12.

Delta Sigma Modulator

Figure 12The system shown in the figure 12 & 13 can be simplified further. Since the voltage

comparator is highly non-linear device cannot transfer the two integrations at its input

to integration at its output.The voltage comparator functionally can be thought of as a unity gain differentialamplifier followed by a zero-crossing detector.

If the voltage comparator is replaced by this circuit, the no. of integrators can be

reduced to one (at the output of unit-gain differential amplifier).Similarly, since the

low pass filter is a linear circuit element the effect of integrator at the input of LPF is

nullified by the differentiator present at its output. Therefore, these two blocks are

redundant in the receiver. The resulting circuit looks as in figure 14 & 15.





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Figure 13


Figure 14





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Figure 15To see how the circuit functions, suppose that initially the TX data is at logic '1' & the

input remains constant at +2V.

Since logic 1 is present at the input of unipolar - tobipolar converter, its output is -4V, which appear at -ve terminal of unity gain differential amplifier. Its output soon

switches to +6V. This +6V appears at the input of integrator which ramps down at a

fast rate. As soon as it crosses zero level, the zero-crossing detectors output goes zerowhich is latched in the coming clock cycle. Thus the D-Flip-Flops output goes low &

a zero is transmitted.

The zero's appearance at input of unipolar to bipolar converter makes it switch its

output to +4V. With +4V input to the unity gain differential amplifier, its output goes

to -2V level. Since -2V signal is present at input of integrator; it ramps up slowly, as

the rate of ramping depends on the input applied to it. The ramp will not be able to

cross-up zero at this slow rate, so again a zero is latched at the next clock cycle. Thus,the inference that can be drawn is that smaller the signal at integrator input, slower itwill ramp up or down thus latching the same data bits for more clock periods.

Thus the mark to space ratio conveys the information about the mean level of the

signal & the signal & the modulator's output depends on the actual signal amplitude

itself & not only on its change.

The demodulator's work here is to extract the mean level information from the mark-

to space ratio transmitted to it.

The received data is latched into D-Flip-Flop by the receiver clock, which has been

before being latched. The level changer provides the +ve & -ve voltages needed to

reconstruct the input analog signal. It also inverts the signal & compensate for theinversion at transmitter automatically. The work of the low pass filter is to remove the

spikes introduced by switching action of unipolar to bipolar converter.





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Advantage offered by Delta Sigma Modulation:

1. The first & the foremost advantage of delta sigma modulation is its ability totransmitDC Level information.

2. Receiver Simplicity, since there is no integrator in the demodulator circuit. Withno integrator in the receiver, we do not have the problem of its quantizationnoise or ramping rate limitation, which leads to slope overload at high frequency

signals.

3. With absence of integrator in receiver, the errors due to noise disturbancesduring transmission are no cumulative.

4. The signal - to - Noise ratio is independent of frequency of analog signal unlikein delta modulation where it decreases as the frequency of information signalincreases.





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Experiment 1

Objective:Study of Delta Modulation Demodulation

Equipments Required:

1. ST2155trainer with power supply cord2. Oscilloscope with connecting probe3. Connecting cordsConnection Diagram:

Figure 1.1





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Procedure:

Initial setup of ST2155:

Clock frequency selector switches : A = 0 and B = 0 position.

Integrator (1) blocks switches position:

Gain control switch position : Left-hand side.

Switches position : A=0 and B=0 position.


Gain control switch position :Right-hand side

Switches position : A = 0 and B = 0 position.

1. Connect the mains supply cord to the Trainer.2.

Make connection on the board as shown in the figure 1.1.

3. Switch 'ON' the trainer power supply and oscilloscope.4. In order to ensure for correct operation of the system, we first take the input to

0V. So connect the '+' input of the delta modulator's voltage comparator to 0V

and monitor on an oscilloscope the output of integrator 1 (TP13) and the outputof the transmitter's unipolar to bipolar converter (TP 29)

If the transmitter's unipolar to bipolar converter output has equal positive and

negative output levels, integrators output will be a triangular wave centered

around '0' Volts, as shown in figure 1.2 (Case A). However, if the unipolar tobipolar converters negative level is greater than the positive level, the

integrator's output will appear as shown in figure 1.2 (Case B). Should theunipolar to bipolar converters positive output level be the greater of the two

levels, the integrator's output will resemble that shown in figure 1.2 (Case C).

5. The relative amplitudes of the unipolar to bipolar converters positive andnegative output levels can be varied by adjusting the level adjust preset in theunipolar to bipolar converter circuit 1 block. When it is turned anticlockwise,

the negative level increases relative to the positive level, when turned

clockwise, the positive level increases relative to the negative level.

Prove that you can obtain all the three waveforms shown in figure 1.2 byturning the potentiometer from one extreme to another. Try explaining the

reason behind it.





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Case A:Bipolar output: Positive level = Negative level

Case B:Bipolar output: Positive level < Negative level

Case C: Bipolar output: Positive level > Negative level

Figure 1.2

6. Adjust the transmitter's level changer preset until the output of integrator 1 (TP13) is a triangular wave centered around 0 Volts, as shown in figure 1.2 (Case

A). The peak-to-peak amplitude of the triangle wave at the integrator's output

should be 1.8V (approx), this amplitude is known as the integrator step size.

The output from the transmitter's bistable circuit (TP 19) will now be a stream

of alternate '1' and '0', s' this is also the output of the delta modulator it self.

The delta modulator is now said to be 'balanced' for correct operation.

7. Examine the signal at the output of integrator 2 (TP 41) at the receiver. Thisshould be a triangular wave, with step size equal to that of integrator 1, and

ideally centre around 0 Volts. If there is any DC bias at the output of integrator2, remove it by adjusting the receiver's level adjust preset (in the unipolar to

bipolar converter circuit 2 block). This preset adjusts the relative amplitudes, of

the positive and negative output levels from the receiver's unipolar to bipolar

converter circuit. Only when these levels are balanced will there be no offset at

the output of integrator2.

8.





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Outputs at TP 13 and TP 41 respectively

Volts/Div: 1V Clock Frequency: 50 KHz

Time/Div: 20 usec Input Signal : 0V

The receiver's low pass filter (whose cut off frequency is 4.2 KHz.) then filters

out the higher - frequency triangular wave, to leave a DC level at the output of

filter (TP 43). If the receiver's level adjust preset has been adjusted correctly,

this DC level will be '0' volt. The delta demodulator also is now balanced for

correct operation.

9. Disconnect the voltage comparators '+' input from 0V, and reconnect it to the~1 KHz output from the function generator block; the modulator's analog input

signal is now a 1 KHz sine wave.

Monitor this analog signal at the voltage comparator's '+' input (TP 15) together

with the output of, integrator 1 (TP 13).Trigger the scope on the same analog

signal which is applied to the voltage comparator's '+' input (TP 15). Note how

the output of the transmitter integrator follows the analog input, as was

illustrated in figure 1.

Note :- It may be necessary to readjust slightly the transmitter's level adjust

preset (in the unipolar to bipolar converter circuit 1 block) in order to obtain a

stable, repeatable trace of the integrator's output signal.

10. Display the data of the transmitter's bistable (at TP 19), together with the analoginput at TP 15 (again trigger on this signal), and note that the 1 KHz sine wave

has effectively been encoded into a stream of data bits at the bistable's output,

ready for transmission to the receiver.





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11. For a full understanding of how the delta modulator works, examine the outputof the voltage comparator (TP 16), the bistable's clock input (TP 19), and the

unipolar to bipolar output (TP 29)

12. Display the output of integrator 1 (TP 13) and that of integrator 2 (TP 41) on thescope. Note that the two signals are very similar in appearance, showing that thedemodulator is working as expected.

Outputs at TP 13 and TP 41 respectively

Volts/Div: 5V Clock Frequency: 50 KHzTime/Div: 500usec Input Signal : 1 KHz, 10Vpp

13. Display the output of integrator 2 (TP 41) together with the output of thereceiver's low pass filter block (TP43). Note that although the integrators

output has been smoothed out somewhat by the low pass filter, some unwanted

'ripple' still remains at filter's output This 'ripple' is due to the 'quantizationnoise' at the integrator's output, which is caused by the relatively large integrator

step size. This step size can be reduced by increasing the rate at which the

system is clocked (i.e. the sampling frequency).This reduces the sampling

period, and hence the time available between samples for the integrators to

ramp up and down.

14. The current system clock frequency is 50 KHz. This is set by the A, B switchesin the clock frequency selector block, which are currently in the A= 0, B= 0positions. While monitoring the same signals, increase the system clock

frequency to 100 KHz, by putting the switches in the A = 0, B = 1 positions.

Note :- If the integrator's output (TP41) no longer gives a stable trace after

changing the clock frequency, make a slight adjustment to the transmitter's level

adjust preset (in the unipolar to bipolar converter circuit 1 block), until the trace

is once again stable.





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Notice that, at the integrator's (TP41), the frequency of the triangular errorsignal doubles, and the peak-to-peak amplitude of that error signal (i.e. the step

size) is halved. Examine the ripple at the low-pass filter's output (TP43). Notethat this is now less than it was before.

15. By changing the system clock frequency to first 200 KHz (clock frequencyselector switches in A=l, B=0 positions), and then to 400 KHz (switches in A=l,B=1 positions), note the improvement in the low - pass filter's output signal

(TP43).

Once again, it may be necessary to adjust slightly the transmitter's level adjust

preset, in order to obtain a stable oscilloscope trace.

16. Using a system clock frequency of 400 KHz compare the low pass filter's output(TP43) with the original analog input (TP15). There should now be no

noticeable difference between them, other than a slight delay.

Output waveforms at TP13 and TP43 respectively


Time/Div: 500usec Input Signal frequency: 1 KHz, 10Vpp

17. While continuing to monitor the transmitter's analog input (TP15) and thereceiver's low-pass filter output (TP43), disconnect the comparator's + input

from the 1 KHz sine wave output, and reconnect it to 2 KHz, 3 KHz and 4 KHzoutputs in turn and using system clock frequency of 50 KHz . Note that, as thefrequency of the analog signal increases, the low pass filter's output becomes

more distorted and reduced in amplitude.

18. In order to understand what has caused this distortion, leave the comparator's +input connected to the 4 KHz sine wave output of the function generator, and

examine the output of integrator 2 (TP41). Note that the integrator's output no

longer approximates the analog input signal, but is triangular.





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Compare this with the output of integrator 1 (TP13), and note that the twosignals are exactly the same; the problem obviously starts in the delta modulator

circuitOutput waveforms at TP13 and TP43 respectively



Slope Overloading

19. Compare the 4 KHz analog input signal (TP15) with the output of integrator 1(TP13) it should now become clear what has happened.The analog signal is now changing so quickly that the integrator's output cannot

ramp fast enough to 'catch up' with it, and the result is known as 'slopeoverloading.'

20. Although the system clock frequency i.e. the sampling frequency determineshow often the integrator's output direction can change (up or down), it does notaffect how quickly the integrator's output can ramp up and down. Consequently,

changing the system clock frequency will not help the slope overload problem.Prove this by changing the clock frequency selector switches, and noting that

the problem is still present.

Return the switches to the A= 1, B=1 (400 KHz clock frequency) positionbefore continuing.

21. If slope overloading is to be avoided in a practical delta modulation system, thetransmitter integrator must be able to ramp up or down at a rate which is at least

as great as the maximum rate of change at the transmitter's analog input. If the

incoming analog signal is a sine wave, its maximum rate of change occurs at the

zero crossing point, and is proportional to both the frequency and the amplitude

of the sine wave.





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Hence, the likelihood of slope overloading can be reduced by either reducingthe maximum input frequency, or by reducing the maximum input amplitude to

the delta modulator. We have already seen how slope overloading can beavoided by reducing the frequency of the analog input signal since there was no

problem with the ~1 KHz analog input. Now check that the problem can also beavoided if the amplitude of the input signal is reduced. Do this by slowly

turning the ~4 KHz preset anticlockwise.

Note that there comes a time when the integrator's output can once again follow

the analog input signal.

22. Another possible way of overcoming slope overloading is to increase the gain ofthe integrators so that they can ramp up and down faster, and so can follow even

those analog input waveforms those change very quickly. To illustrate this, first

return the ~4 KHz preset to its clockwise (maximum amplitude) position, so

that slope overloading can once again be seen on the scope.

In each of the two integrator blocks, there are two switches labeled A and B.The 2bit binary code produced by these switches selects one of four integrator

gains, the lowest gain selected when the switches are in the A=0, B=0 positions.

For each increasing step, in the switch code, A=0, B=0 to A=1, B=1, the

integrator gain is doubled.




Manual gain setting of Tx. & Rx. Integrators: A=0, B=1

Change the codes produced by the switches (in both integrator 1 and integrator

2 blocks) from A=0, B=0 to A = 1, B=1, to double the gain of the two

integrators; note that slope overloading still occurs.





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Then change both sets of switches to the A=1, B=0 position, and finally to theA=1, B= 1, position, to show that slope overloading can be eliminated if the

integrator gain is large enough. Once again, it may be necessary to make a slightadjustment to the transmitter's level adjust preset, in order to obtain a stable

trace on oscilloscope.

Note that, although it is the gain of integrator 1 alone which determines whether

or not slope overloading will occur, integrator 2 must have the same gain if theamplitude of the demodulator's analog output is to be equal in amplitude to the

modulator's analog input.




Manual gain setting of Tx. & Rx. Integrators: A=1, B=1

23. We have observed slope over loading can be overcome by changing anyone ofthe three following options:

a. Reducing the maximum input frequency to the delta modulator.b. Reducing the maximum input amplitude, orc. Increasing the integrator gain.In a practical delta modulation communication system, the signal at the

modulator's analog input would normally be in the audio band, so that the

maximum input frequency could not be reduced below about 3.4 KHz without

losing information. This rules out solution (a) above.

The problems with reducing the amplitude of input signal i.e. solution (b) is thatsmaller input signals then are lost in the quantization noise. They become

smaller in amplitude than the integrator's step size.





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Finally, if the integrator gain is increased i.e. solution (c), much of the sameproblem results as for solution (b), since the larger step size increases the

quantization noise and once again 'drowns out' the smaller signals. Inexperiment 2, we will investigate another solution to the problem of slope over

loading which allows us to use high integrator gains for fast-changing analoginput signals, and low integrator gains for those smaller signals which would

otherwise be 'Drowned out'.

Observation Table:

Clock Frequency Applied for TX & Rx:

Applied Input Output

S. No. I/P frequency I/P Voltage O/P Voltage

1 0KHz

2 1KHz

3 2KHz

4 3KHz

5 4 KHz

Conclusion:

Questions:

1. What is delta modulation?2. What is the slope overloading?3. How over slope overloading can be reduced?4. What is the function of unipolar to bipolar circuit?5. What is the function of integrator?





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Experiment 2

Objective:Study of Adaptive Delta Modulation and Demodulation


1. ST2155 trainer with power supply cord2. Oscilloscope with connecting probe3. Connecting cordsConnection Diagram:

Figure 2.1





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Procedure:

Initial setup of ST 2155:








Function Generators potentiometers position:

1 KHz to 4 KHz Pots position : fully clockwise position1. Connect the main supply cord to the trainer.2. Connect the board as per figure 2.1.3. Switch ON the supply of trainer and oscilloscope.4. As the gain control switch is towards A & B switches, the gain setting is still

manual, connect the voltage comparator's +ve input to 0V & check whether the

modulator & demodulator are balanced for correct operation as in delta

modulation experimentation.

Change the clock frequency selector switches to the A=1, B=1, positions

(400 KHz Clock Frequency) before continuing.

5. Disconnect the voltage comparators '+' input from 0V and reconnect it to the4 KHz output from the function generator block.

6. Monitor the 4 KHz analog input at TP14 and the output of integrator 1 at TP13.Note that slope overloading is still occurring, as indicated by the fact that the

integrator's output is not an approximation of the analog input signal.

7. At the transmitter, move the slider of the gain control switch in the integrator 1block to the right-hand position (towards the sockets labeled A, B). At the

receiver, move the slider of the gain control switch in the integrator 2 block to

the left-hand position (again towards the sockets labeled A, B). The gain of eachintegrator is now controlled by the outputs of the counter connected to it.

Functionally, the transmitter and receiver are now configured as shown in the

figure 9 & 10 i.e. as adaptive delta modulator and demodulator respectively.

8. Once again examine the 4 KHz analog input at TP14 and the output of integrator1 at TP13, noting that the" slope overloading problem has been eliminated, and

that the integrator's output once again follows the analog input signal. Again, it

may be necessary to adjust slightly the transmitter's level adjust preset, in order

to obtain a stable trace of the integrator's output signal.





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9. Compare the output of integrator 1 (TP13) with that of integrator 2 (TP41);noting that, both are identical in appearance as expected.


Volts/Div: 5V Clock Frequency: 400 KHzTime/Div: 200usec Input Signal frequency: 4 KHz, 10Vpp

Automatic gain control of Tx. & Rx. Integrators

10. Examine the output of the low pass filter (TP42) and the output of integrator 2(TP41). The filter has removed the high-frequency components from the

integrator's output signal, to leave good, clean 4 KHz sine wave.

11. Compare the original 4 KHz analog input signal (at TP15) with the outputsignal from the receiver's low pass filter at TP43).

Note that the demodulator's output signal is identical to the modulator's input

signal, but is delayed somewhat.

12. Disconnect the voltage comparators '+' input from the 4 KHz functiongenerator output, and reconnected it in turn to the 3 KHz, 2 KHz and 1 KHz

outputs, noting in each case that the demodulators output signal is identical to

the modulator's input signal, but delayed in time.





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Automatic gain control of Tx. & Rx. Integrators

13. The adaptive delta modulator/demodulator system has therefore eliminatedslope-overloading problems. To examine in details how it does this, reconnectthe voltage comparator's '+' input to the function generator's 4 KHz output, then

reduce the system clock (i.e. sampling) frequency to 50 KHz, by putting the

clock frequency selector switches in the A=0, B=0 positions.

Although a 50 KHz sampling frequency is too low to ensure that an undistorted

output is obtained from the demodulator's low pass filter, it does increase thestep size to a level, which makes it easier to understand how the system is

operating.

14. Monitor the 4 KHz analog input signal at TP14 and at the output of integrator 1(TP13). It should now become a little clearer as to how the adaptive delta

modulator is operating. It will be noted that the slope of the integrator's output

signal is no longer constant, but increases in a series of discrete steps, in order

to 'catch up' with the fast-changing analog input signal.

If the integrator output does not 'catch up' with the analog input within two

clock periods of its direction changing, the slope of the integrator's output

signal. (i.e. the integrator gain) is doubled. If it has still not caught up with theanalog input signal by the end of the third clock period, the integrator gain will

double once again. If the integrator output still lags behind at the end of thefourth clock period, the integrator's gain is doubled once again, to its maximum

value. It then remains at this value until the integrator output 'catches up' withthe analog input signal. Once the integrators output 'overtakes' the analog input

signal, its direction changes, and its rate of change reverts to the minimum

value.





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15. Examine also the test points in the adaptive control circuit 1 block (TP22-25), tohave an understanding of how the adaptive delta modulator is operating.

16. While monitoring the outputs of the modulator's binary counter (TP22 and 23),slowly turn the 4 KHz preset anticlockwise, in order to reduce the amplitude of

the 4 KHz analog input signal. Notice that once the analog input signal becomes

small enough, both the counter's outputs becomes permanently low, causing the

integrator to have minimum gain. This happens because the input signal is nowso small that the integrator can always follow it, even with minimum gain.

The result is that small-amplitude input signals can be transmitted with

minimum integrator gain, thereby keeping quantization noise to a minimum at

the demodulators output.

Observation Table:

Clock frequency applied for Tx And Rx:

Applied Input Output

S.No I/P frequency I/P Voltage O/P Voltage

1 0KHz

2 1KHz

3 2KHz

4 3KHz

5 4KHz

Conclusion:

Questions:

1. What is adaptive delta modulation?2. What is the drawback of delta modulation?3. What is the effect of frequency on adaptive delta modulation?4. What is advantage of adaptive delta modulation?5. Why integrator is required for adaptive modulation?





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Experiment 3

Objective: Study of Sigma Delta Modulation and Demodulation


1. ST2155 trainer with power supply cord2. Oscilloscope with connecting probe3. Connecting cordsConnection Diagram:

Figure 3.1





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Procedure:

Initial setup of ST 2155:








Function Generators potentiometers position:

1 KHz to 4 KHz Pots position : fully clockwise position1. Connect the main supply cord to the trainer.2. Connect the board as per figure 3.1.3. Switch ON the supply of trainer and oscilloscope.10. The delta sigma system is currently being clocked at 400 KHz, as indicated by

the current positions of the clock frequency selector switches (A=1, B=1).

Reduce the clock frequency to 200 KHz (switch positions A= 1, B=0), then

100 KHz (A=0, B=1), and finally to 50 KHz (A=0, B=0), while monitoring the

output of the demodulator at TP43.

Note : That as the clock frequency is reduced, the analog output signal becomesless 'smooth', indicating that clocking frequency affects the quality of the

demodulator's output signal. Leave the system clock frequency at 50 KHz, since

it is easiest to analyze the operation of the delta sigma system when the clock

frequency is minimum.

11. In order to understand exactly how the delta-sigma modulator works examinethe following signals: analog input (TP27), differential amplifier output (TP26),

integrator output (TP13), Voltage comparator output (TP16) and unipolar to

bipolar converter output (TP29).

Note : In the case of signals at test points 13, 26, 16 and 29, trigger the scope on

the analog input signal (TP27), and if necessary adjust the transmitter's leveladjust preset (in the unipolar to bipolar converter circuit 1 block) in order toobtain a stable, repeatable waveform.

12. At the demodulator, examine the bistable's data output (TP32), the unipolar tobipolar converter's output (TP33), and the output of the low pass filter (TP43, to

understand how the transmitted data stream is demodulated.

13. Return the system clock frequency to 400 KHz (clock frequency selectorswitches in A=1, B=1 positions), so that the demodulator's output once again

becomes a good, clean sine wave.





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14. While examining the modulators analog input TP27 and the receiver's low passfilter output; increase the amplitude of the analog input signal to its maximum

value, by turning the function generators ~1 KHz pot. fully clockwise.

Note: The peaks of the demodulator's output signal become flat if peak-to-peak

amplitude exceeds that of the transmitter's level changer output, causing the

modulator to 'saturate'. The result is a signal at the modulator's output whichcontains long periods when a continuous stream of' 1s or '0's is transmitted.

These long streams of the same digit are responsible for the flattening of peaks

at the demodulator output.





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Amplitude Overloading

This amplitude overloading in delta-sigma modulation is equivalent to delta

modulation's 'slope over loading', and it occurs whenever the amplitude of theanalog input signal exceeds that of the transmitter's level changer output.

Examine the signals at the delta-sigma modulator and demodulator, in order tounderstand exactly how amplitude over loading occurs.

15. Return the amplitude of the analog input signal to 5 volts P-P by adjusting the~1 KHz pot. in the function generator block.

While monitoring the output of the receiver's low pass filter output (TP43),

reduce the gain of the integrator 1 by putting the integrator's A, B switches in

the A=0, B=0 position.

Note : The demodulator's output becomes distorted, which implies that a

minimum integrator gain is necessary in the modulator circuit, in order to

guarantee correct operation of the delta modulator system.

Reduce the amplitude of the 1 KHz analog input signal (by turning the ~1 KHzpreset anticlockwise), and notice that the distortion can be minimized by using

an analog input signal of lower amplitude.

Return A, B switches of integrator block 1 to the A=1, B=1 positions beforecontinuing.

16. Remove the differential amplifier's '+' input from the function generator's ~1KHz output, and reconnect it in turn to the ~2 KHz, ~3 KHz and ~4 KHz

outputs. In each case, adjust the amplitude adjustment potentiometer for a sine

wave of 5 volts P-P (to avoid amplitude overloading), and monitor the signal at

the demodulator's output (TP43).





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Note: The output is in each case is a good sine wave, and that there is nodistortion as the frequency of the analog input signal is increased.


Volts/Div: 5V Clock Frequency: 400 KHzTime/Div: 200usec Input Signal frequency: 2 KHz, 5Vpp








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17. Finally, connect the differential amplifier's '+' input to the function generatorsD.C. output. Monitor the input (TP27) and the demodulated output (TP43),

while turning the D.C. pot. from its fully anticlockwise position to its fully

clockwise position. Note that the demodulator's output changes accordingly,

indicating that the delta- sigma system can handle D.C. levels.


Volts/Div: 5V Clock Frequency: 400 KHzTime/Div: 200usec Input Signal: +5V D.C





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Volts/Div: 5V Clock Frequency: 400 KHzTime/Div: 200usec Input Signal: -5V D.C

Conclusion:

Questions:

1. What do you understand by delta sigma modulation?2. What are the advantages of delta sigma modulation?3. Why transmitter and receiver clock frequency should be same?4. What is the effect of frequency on the reconstructed signals?5. Why low pass filter is required while reconstructing the original signals?





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Frequently Asked Questions

1. What is delta modulation?Ans: Delta modulation (DM or -modulation) is an analog-to-digital and

digital-to-analog signal conversion technique used for transmission of voiceinformation where quality is not of primary importance. DM is the simplest

form of differential pulse-code modulation (DPCM) where the difference

between successive samples is encoded into n-bit data streams.

2. Write the main features of DM?Ans: Its main features are:

1. The analog signal is approximated with a series of segments2. Each segment of the approximated signal is compared to the original analog3. Wave to determine the increase or decrease in relative amplitude.4. The decision process for establishing the state of successive bits is

determined by this comparison

5. Only the change of information is sent, that is, only an increase or decreaseof the signal amplitude from the previous sample is sent whereas a no-

change condition causes the modulated signal to remain at the same 0 or 1

state of the previous sample.

3. What are the advantages of delta modulation?Ans:Delta modulation offers many advantages as listed below:

Simple circuitry Cheap Single bit encoding allows us to transmit more information at some sampling

rate for given system bandwidth.





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4. What are the drawbacks of delta modulation?Ans: The practical use of delta modulation is limited due to the following

several drawbacks.

a.

NoiseNoise is defined as any unwanted unpredictable random waveform

accompanying the information signal. Whenever the signal is received at the

receiver, it is always accompanied by noise.

b. DistortionDistortion means that the receiver's output is not the true copy of the analoginput signal at the transmitter.

c. Another problem with delta modulation is that it can not pass DCinformation. This is not a serious limitation of speech communication but for

the systems like video (picture) transmission DC level does not provide

information about brightness level of the picture.

5. What is slope overloading in delta modulation?Ans: When the analog signal is greater then the integrator output, the integrator

ramps up to meet the analog signal. The ramping rate of integrator is constant.

Therefore, if the rate of change of analog input is faster than the ramping rate,

the modulator is unable to catch up with the information signal. This causes a

large disparity between the information signal and its quantized approximation.

This phenomenon is known as slope - overloading and causes the loss of rapidly

changing the information.

6.

How the slope overloading can be minimized?Ans:Problem of slope overloading can be solved by increasing the ramping rateof the integrator. But as the effect of the large step-size added large sharp edges

at the integrator's output and hence it adds to noise problem faced at receiver.

7. How the problem of slope overloading can be overcome?Ans:By using adaptive delta modulation

8. What is the drawback of delta modulation and adaptive delta modulation?Ans: The delta modulation & adaptive delta modulation suffers from twoserious limitations, namely, they are not able to pass DC level information,

which is a must in video systems. The signal - to - noise ratio decreases as the

signal frequency increases.

9. By which technique the problem of delta modulation and adaptive deltamodulation can be overcome?

Ans: By using delta sigma modulation.





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10. What are the advantages of delta sigma modulation?Ans: Advantage offered by Delta Sigma Modulation are as follows:

1. The first & the foremost advantage of delta sigma modulation is its ability totransmitDC Level information.

2. Receiver Simplicity, since there is no integrator in the demodulator circuit.With no integrator in the receiver, we do not have the problem of its

quantization noise or ramping rate limitation, which leads to slope overload

at high frequency signals.

3. With absence of integrator in receiver, the errors due to noise disturbancesduring transmission are no cumulative.

4. The signal - to - Noise ratio is independent of frequency of analog signalunlike in delta modulation where it decreases as the frequency of

information signal increases.

11. What is Decimation?Ans: Decimation is a technique for reducing the number of samples in a

discrete-time signal. The frequency of a recorded sound can be raised an octave

(in other words, doubled in frequency) by eliminating every other sample

without changing the sampling rate. This will result in aliasing if the soundcontains overtones whose (doubled) frequency will exceed half the sampling

rate. Decimation aliasing can be avoided by eliminating those overtones.

12. Why to use analog to digital converter for PCM coding?A digital signal is superior to an analog signal because it is more robust to noise

and can easily be recovered, corrected and amplified. For this reason, the

tendency today is to change an analog signal to digital data.



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Delta Modulation and Demodulation Trainer