Upload
akhila-purushothaman
View
275
Download
19
Embed Size (px)
Citation preview
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
1/40
1
DDR3-800-2133DDR3-800-2133
Derating Theory & ApplicationDerating Theory & Application
WW14 ’10 UpdateWW14 ’10 Update
June 20th, 2011
Brian Moran
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
2/40
2
Table o !ontent"Table o !ontent"
• Section 1: Setup and Hold Specifcations …………….….…Page
• Section 2: !erating and !erating "a#les ………………...…Page 11
• Section : $ppl%ing !erating …………………………...…...Page 1
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
3/40
3
#ection 1$#ection 1$#et%p & old #peci'cation"#et%p & old #peci'cation"
(t)#*t) and tD#*tD+(t)#*t) and tD#*tD+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
4/40
4
,a"eline t)# & t) #peci'cation",a"eline t)# & t) #peci'cation"
• "he ta#les on the &ollo'ing pages defne the#aseline t(S ) t(H specifcations, prior to derating, &or
#oth *re& and $+!+ -easure-ent -ethodologies.• (n !! ti-ing anal%sis, the t(S/ac ) t(H/dc
specifcations are to #e used. "he specifcations at*re& are proided &or re&erence onl%.
• "he t(S/ac and t(H/dc specifcations hae #een preco-pensated &ro- the #aseline specs at *re&, #%su#tracting the a-ount o& 3ight ti-e pushout or pullin'hich occurs 'ith a 1*ns re&erence 'ae&or-, s the 3ightti-e at *re&.
• "his preco-pensation is nor-ali4ed &or sle' rates other
than 1*ns through the derating process.
• "he $+!+ thresholds associated 'ith each set o&#aseline specs -ust #e noted 'hen choosing 'hich
derating ta#le to utili4e.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
5/40
Alternate Thre"hold .enaltie"Alternate Thre"hold .enaltie"
• $s an option &or heail% loaded +M!$!confgurations, an alternate $+ threshold -a% #eutili4ed in e5change &or a ti-ing penalt%, as sho'nin the specifcation ta#les.
• "his alternate $+ threshold -a% produce #etteroerall ti-ing -argins in cases 'here sle' rate iser% slo'. Ho'eer, use o& the alternate threshold'ill usuall% re6uire a -ini-u- o& 27 +M!$!ti-ing, due to penalt%.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
6/40
/
t)#*t) ,a"eline A! #peci'cation"t)#*t) ,a"eline A! #peci'cation"
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
7/40
t)#*t) ,a"eline A! #peci'cation"t)#*t) ,a"eline A! #peci'cation"
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
8/40 8
,a"eline tD# & tD #peci'cation",a"eline tD# & tD #peci'cation"
• "he ta#les on the &ollo'ing pages defne the #aselinet!S ) t!H specifcations, prior to derating, &or #oth
*re& and $+!+ -easure-ent -ethodologies.• (n !! ti-ing anal%sis, the t!S/ac ) t!H/dc
specifcations are to #e used. "he specifcations at*re& are proided &or re&erence onl%.• "he t!S/ac and t!H/dc specifcations hae #een pre
co-pensated &ro- the #aseline specs at *re&, #% su#tractingthe a-ount o& 3ight ti-e pushout or pullin 'hich occurs'ith a 1*ns re&erence 'ae&or-.
• "his preco-pensation is nor-ali4ed &or sle' rates other than1*ns through the derating process.
• "he $+ threshold associated 'ith each set o& #aselinespecs -ust #e noted 'hen choosing 'hich deratingta#le to utili4e.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
9/40
tD#*tD ,a"eline A! #peci'cation"tD#*tD ,a"eline A! #peci'cation"
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
10/40 10
tD#*tD ,a"eline A! #peci'cation"tD#*tD ,a"eline A! #peci'cation"
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
11/40 11
#ection $#ection $
Derating and Derating Table"Derating and Derating Table"
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
12/40 12
re " A!*D! Relatie Tiingre " A!*D! Relatie Tiing
• $ 8e% concept to grasp is that S!$M setup and holdti-ing is defned frst at *re&, then translated to
$+!+ using a preco-pensation process, #ased ona de&ault 1*ns sle' rate assu-ption.
• "he pu#lished alues &or t(S/act(H/dc and
t!S/act!H/dc are alid onl% at the de&ault sle'rate o& 1*ns. "heir alue at all other sle' rates isnot defned until a&ter preco-pensation as #eennor-ali4ed, ia derating.
• Setup and hold ti-ing at *re& is use&ul incharacteri4ing S!$M ti-ing, in that it produces a&air calculation o& the S!$M9s percent o& .(.allocation, and is not su#;ect to o
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
13/40 13
De'nition & .%rpo"e o DeratingDe'nition & .%rpo"e o Derating
• "he original purpose o& derating, as frst defned in!!2, 'as to proide a -echanis- to ad;ust S!$M
setup and hold ti-es, #ased on the sle' rate o& theincident 'ae&or-, or associated cloc8 or stro#e, toaccount &or degradation in ti-ing 'hich occurs atsle' rates less than 1*ns.
• "his original derating applied onl% at sle' rates #elo' 1*ns, 'hich is the sle' rate o& the tester sti-ulus.
• "he derating &unction has since #een e5panded toalso include a threshold co-pensation or
nor-ali4ation &unction related to the i-ple-entationo& the $+!+ 3ight ti-e -easure-ent -ethodolog%.• "his threshold co-pensation &unction 'ill #e discussed in
-ore detail in a su#se6uent section.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
14/40 14
.riary " #econdary Derating.riary " #econdary Derating
• "he &ull J=!=+ derating ta#les are inde5ed on t'oa5is. "he ertical a5is is defned as pri-ar% derating,
'hile the hori4ontal a5is is defned as secondar%derating.
• Pri-ar% derating is #ased on the S o& the incidentsignal itsel&, 'hereas secondar% derating is #ased on
the S o& the associated +>? or !@S.• Pri-ar% derating is the -ore co-ple5, and is deried
as the su- o& -ultiple co-ponents, 'hich arediscussed in -ore detail on su#se6uent pages.
• Secondar% derating is independent o& pri-ar%derating, is e6ual to 4ero &or +>? and !@S S o&2*ns and higher, and increases as di
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
15/40 1
.riary Derating !oncept".riary Derating !oncept"
• "here are t'o co-ponents o& pri-ar% derating, 'hichareA receier derating at *re& and threshold
co-pensation, as sho'n on the &ollo'ing page.• Pri-ar% !erating eceier !erating C "hreshold +o-p.
• =5a-ple sho'n is &or $+1DE!+100.
• eceier derating at *re& accounts &or the tendenc% o&
receier ti-ing to degrade as incident S decreases.• "he receier derating ta#le is constant across all speed #ins.
• "hreshold co-pensation aries 'ith the thresholdleel and is defned alge#raicall% to nor-ali4e the pre
co-pensation applied to the $+ ti-ing specifcationsat $+ ) !+.• "hreshold +o-p "hreshold /-* F "hreshold /-*S /ns
• "he threshold co-pensation ta#le aries 'ith $+!+thresholds, and there&ore, aries 'ith speed #ins.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
16/40 1/
.riary Derating !oponent".riary Derating !oponent"
Receiver derating table is
constant for all speed bins.
Threshold compensation is
calculated based on
AC/DC thresholds.
AC175/DC100
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
17/40 1
Receier Derating at reReceier Derating at re
• "his co-ponent o& derating is the -ost straight&or'ard to understand and rationali4e.
• "he S!$M9s ti-ing is generall% characteri4ed on atester e-plo%ing a 1 *ns sle' rate, there&ore, all $+
ti-ing para-eters are guaranteed at 1*ns anda#oe.
• $s incident sle' rate drops #elo' 1 *ns, there is
ti-ing degradation 'ithin the receier circuits 'hich-ust #e accounted &or. "his degradation increasesas sle' rate decreases. "he derating cures &orsetup and hold hae #een deried and erifede-piricall%, as sho'n on the preious page.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
18/40 18
Thre"hold !open"ationThre"hold !open"ation
• "hreshold co-pensation is an outgro'th o& thetransition &ro- the *re& #ased ti-ing -ethodolog%
used originall% in !!2, to the $+!+ -ethodolog%.
• Measuring 3ight ti-es to $+!+ thresholds results inlonger -a5 3ights and shorter -in 3ights, relatie to3ights -easured at *re&.
• See diagra- on the &ollo'ing page.
• "o account &or this, the t(S/act(H/dc andt!S/act!H/dc specifcations are preco-pensated,#ased on a theoretical 1*ns linear 'ae&or-.
• These setup and hold specifcations are only valid at 1 V/ns.
• "he threshold co-pensation co-ponent o& deratingis calculated so as to nor-ali4e the preco-pensation, &or sle' rates other than 1*ns.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
19/40 1
re Tiing " A!*D! Tiingre Tiing " A!*D! Tiing
• Pre+o-pensation and =6uialenc% ule:• Margins -easured at *re& using t(S/re& ) t!H/re&, -ust
e6ual -argins -easured at $+!+ thresholds, using t(S/ac) t(H/dc, &or a 1*ns linear receier incident 'ae&or-.
ref
AC175
1/ns
175pst!"#ref$ % &'0 ps
t!"#ac$ % (5 ps
t%0
t)light#ref$
t)light#ac$
Rule* t)light#ref$ + t!"#ref$ % t)light#ac$ + t!"#ac$
"ame concept applies for tD"#ac$ , tD-#dc$
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
20/40 20
Thre"hold !open"ation (cont5+Thre"hold !open"ation (cont5+
• $n i-portant concept to ta8e a'a% is that thet(S/act(H/dc and t!S/act!H/dc specifcations in
the J=!=+ spec are onl% alid &or a 1 *ns incident'ae&or-, 'here the% hae #een correctl% preco-pensated.
• Gor all other sle' rates %ou -ust appl% derating, inorder to nor-ali4e the preco-pensation, #e&ore thespecs can #e used in ti-ing calculations.
• Seeral e5a-ples o& ho' these nor-ali4ation aluesare calculated are proided on the &ollo'ing page.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
21/40 21
Thre"hold !open"ation 67aple"Thre"hold !open"ation 67aple"
• >ets loo8 at t(S/ac at !!1, 'ith an $+1DEthreshold.• "he t(S/ac spec has #een preco-pensated #% 1DE ps,
#ased on a de&ault 1 *ns sle' rate.
t(S/ac t(S/re& F 1DE -*1*ns t(S/re& F 1DE ps
t(S/ac 20 ps F 1DE ps IE ps
• (& actual S *ns• "he t(S/ac has #een oerco-pensated. Should hae #een 1DE -**ns E ps
7eed to add 11D ps #ac8 to t(S/ac
"hreshold co-pensation at *ns 11D ps
• (& actual S 0.E*ns• "he t(S/ac has #een underco-pensated.
Should hae #een 1DE -*0.E*ns E0 ps
7eed to su#tract additional 1DE ps &ro- t(S/ac
"hreshold co-pensation at 0.E*ns 1DE ps
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
22/40
22
%ll 96D6! Derating Table"%ll 96D6! Derating Table"
• "'o t%pes o& J=!=+ derating ta#les are proided &or#oth t(St(H and t!St!H.
• !erating ta#le &or *re& -ethod /&or re&erence onl%.
• !erating ta#le &or $+!+ -ethod.
• "he *re& -ethod ta#les are proided &or re&erence, inorder to docu-ent the a-ount o& receier derating at
*re&.• "hese ta#les do not include threshold co-pensation, since #%
defnition the% appl% onl% 'hen -easuring 3ight ti-e to *re&.
• "he $+!+ -ethod derating ta#les should #e used &ordeter-ining co-posite derating alues used in this
B?M.• "hese ta#les include #oth receier derating and threshold
co-pensation.
• Khich $+!+ -ethod derating ta#le is used depends on the$+ threshold leel utili4ed in post processing 3ight ti-e.
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
23/40
23
Derating or t)# & t)Derating or t)# & t)
• "he ta#les on the &ollo'ing pages defne thederating alues &or the possi#le range o& S alues
o& the incident +">+M! signals, and &or +>?.• 7ote that +>? S sho'n is di
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
24/40
24
t)#*t) Derating Table (ret)#*t) Derating Table (re:ethod+:ethod+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
25/40
2
t)#*t) Derating Table (A!1*D!100+t)#*t) Derating Table (A!1*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
26/40
2/
t)#*t) Derating Table (A!10*D!100+t)#*t) Derating Table (A!10*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
27/40
2
t)#*t) Derating Table (A!13*D!100+t)#*t) Derating Table (A!13*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
28/40
28
t)#*t) Derating Table (A!12*D!100+t)#*t) Derating Table (A!12*D!100+
i D i D# & D
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
29/40
2
Derating or tD# & tDDerating or tD# & tD
• "he ta#les on the &ollo'ing pages defne thederating alues &or the possi#le range o& S alues
o& the incident !@ signal, and &or !@S stro#e.• 7ote that the !@S S sho'n is di
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
30/40
30
tD#*tD Derating Table (retD#*tD Derating Table (re:ethod+:ethod+
i bl ( +tD#*tD D ti T bl (A!1*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
31/40
31
tD#*tD Derating Table (A!1*D!100+tD#*tD Derating Table (A!1*D!100+
D#* D D i T bl (A!10*D!100+tD#*tD D ti T bl (A!10*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
32/40
32
tD#*tD Derating Table (A!10*D!100+tD#*tD Derating Table (A!10*D!100+
tD#*tD D ti T bl (A!13*D!100+tD#*tD D ti T bl (A!13*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
33/40
33
tD#*tD Derating Table (A!13*D!100+tD#*tD Derating Table (A!13*D!100+
tD#*tD D ti T bl (A!12*D!100+tD#*tD D ti T bl (A!12*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
34/40
34
tD#*tD Derating Table (A!12*D!100+tD#*tD Derating Table (A!12*D!100+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
35/40
3
#ection /$#ection /$
Applying DeratingApplying Derating
D ti b .Derating b .ro
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
36/40
3/
Derating by .ro7yDerating by .ro7y
• $lthough the derating alues in the ta#les appl% to
the t(St(H and t!St!H specifcations, thesespecifcations are o&ten assu-ed to #e a f5ed aluein traditional 3ight ti-e #ased $+ ti-ing anal%sis.
• "he i-pact o& derating on -argins can alternatiel%#e &actored into the anal%sis #% appl%ing thederating alues to the associated 3ight ti-es andors8e's. "his is re&erred to as derating #% pro5%.
• +are -ust #e ta8en to -aintain the correctrelationship #et'een the polarit% o& the deratingalue and the i-pact on 3ight ti-e andor s8e'.
A l i D ti ( ti d+Applying Derating (contin%ed+
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
37/40
3
Applying Derating (contin%ed+Applying Derating (contin%ed+
• $ good rule to re-e-#er is that positie derating
alues al'a%s 'or8 to reduce -argins.• B% defnition, the derating alues add to the setup and holdspecifcations at the S!$M input, there#% reducing -argin.
•Setup derating alues are added to -a5i-u- 3ightti-es prior to calculating setup -argin.• Setup Glight "i-e Ma5i-u- Glight C !erating *alue LS
• Hold derating alues are su#tracted &ro- -ini-u-3ight ti-es prior to calculating hold -argin.• Hold Glight "i-e Mini-u- Glight F !erating *alue LS
D t i i D ti #l R tDeterining Derating #le; Rate
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
38/40
38
Deterining Derating #le; RateDeterining Derating #le; Rate
• "he no-inal S, as defned preiousl%, is not
necessaril% the S used to inde5 the derating ta#les.• "he J=!=+ S!$M specifcation defnes an alternateS defnition, 'hich is the tangent line S, as sho'non the &ollo'ing page.
• "he derating ta#les should #e inde5ed using thesteeper o& the t'o S calculations, the no-inal S,as defned earlier, or the tangent line S.
• Post processing so&t'are -ust, there&ore, calculateS #% #oth -ethods, and utili4e the steeper o& thet'o 'hen inde5ing into the derating ta#les.
Derating #le; Rate !alc%lationDerating #le; Rate !alc%lation
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
39/40
3
Derating #le; Rate !alc%lationDerating #le; Rate !alc%lation(#et%p+(#et%p+
• se no-inal S,
e5cept 'here tangentline S is 'orst case.
• se tangent line S insetup case 'hereslope is steeper than
no-inal.
Derating #le; Rate !alc%lationDerating #le; Rate !alc%lation
8/21/2019 DDR3 800-2133 Derating Theory and Implementation 11ww24.5
40/40
Derating #le; Rate !alc%lationDerating #le; Rate !alc%lation(old+(old+
• se no-inal S,
e5cept 'here tangentline S is 'orst case.
• se tangent line S inhold case 'here slopeis steeper than
no-inal.