Datasheet - STL260N4LF7 - N-channel 40 V, 0.85 mΩ typ ... · N-channel 40 V, 0.85 mΩ typ., 120 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package STL260N4LF7 Datasheet DS11156

AM15540v2

5678

1 2 3 4

Top View

D(5, 6, 7, 8)

G(4)

S(1, 2, 3)

FeaturesOrder code VDS RDS(on ) max. ID

STL260N4LF7 40 V 1.1 mΩ 120 A

• Among the lowest RDS(on) on the market• Excellent FoM (figure of merit)• Low Crss/Ciss ratio for EMI immunity• High avalanche ruggedness

Applications• Switching applications

DescriptionThis N-channel Power MOSFET utilizes STripFET F7 technology with an enhancedtrench gate structure that results in very low on-state resistance, while also reducinginternal capacitance and gate charge for faster and more efficient switching.

Product status link

STL260N4LF7

Product summary

Order code STL260N4LF7

Marking 260N4LF7

Package PowerFLAT 5x6

Packing Tape and reel

N-channel 40 V, 0.85 mΩ typ., 120 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package

STL260N4LF7

Datasheet

DS11156 - Rev 5 - July 2019For further information contact your local STMicroelectronics sales office.

www.st.com

https://www.st.com/en/product/stl260n4lf7

1 Electrical ratings

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage 40 V

VGS Gate-source voltage 20 V

ID (1) Drain current (continuous) at TC = 25 °C 120 A

ID (1) Drain current (continuous) at TC = 100 °C 120 A

IDM (2) (1) Drain current (pulsed) 480 A

ID (3) Drain current (continuous) at Tpcb = 25 °C 50 A

ID (3) Drain current (continuous) at Tpcb = 100 °C 35 A

IDM (2) (3) Drain current (pulsed) 200 A

PTOT (1) Total power dissipation at TC = 25 °C 188 W

PTOT (3) Total power dissipation at Tpcb = 25 °C 4.8 W

Tstg Storage temperature range-55 to 175 °C

Tj Operating junction temperature range

1. This value is rated according to Rthj-case and limited by package

2. Pulse width limited by safe operating area3. This value is rated according to Rthj-pcb

Table 2. Thermal data

Symbol Parameter Value Unit

Rthj-case Thermal resistance junction-case 0.8 °C/W

Rthj-pcb (1) Thermal resistance junction-pcb 31.3 °C/W

1. When mounted on FR-4 board of 1 inch², 2 oz Cu

STL260N4LF7Electrical ratings

DS11156 - Rev 5 page 2/15

2 Electrical characteristics

TC = 25 °C unless otherwise specified

Table 3. On/off-state

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSSDrain-sourcebreakdown voltage VGS = 0 V, ID = 250 µA 40 V

IDSSZero gate voltagedrain current VGS = 0 V, VDS = 40 V 1 µA

IGSSGate body leakagecurrent VDS = 0 V, VGS= 20 V 100 nA

VGS(th)Gate thresholdvoltage VDS = VGS, ID = 250 µA 1.2 2.5 V

RDS(on)Static drain-sourceon-resistance

VGS = 10 V, ID = 25 A 0.85 1.1 mΩ

VGS = 4.5 V, ID = 25 A 1.2 1.4 mΩ

Table 4. Dynamic


Ciss Input capacitance

VDS = 25 V, f = 1 MHz, VGS = 0 V

- 6000 - pF

Coss Output capacitance - 1700 - pF

CrssReverse transfercapacitance - 170 - pF

Qg Total gate chargeVDD = 20 V, ID = 50 A, VGS= 0 to 4.5 V(see Figure 14. Test circuit for gate charge behavior)

- 42 - nC

Qgs Gate-source charge - 16 - nC

Qgd Gate-drain charge - 14 - nC

Table 5. Switching times


td(on) Turn-on delay time

VDD= 20 V, ID = 25 A, RG = 4.7 Ω, VGS = 10 V(see Figure 13. Test circuit for resistive load switching timesand Figure 18. Switching time waveform)

- 21 - ns

tr Rise time - 14 - ns

td(off) Turn-off delay time - 74 - ns

tf Fall time - 23 - ns

STL260N4LF7Electrical characteristics

DS11156 - Rev 5 page 3/15

Table 6. Source-drain diode


VSD (1) Forward on voltage ISD = 50 A, VGS = 0 V - 1 V

trrReverse recoverytime

(see Figure 15. Test circuit for inductive load switching anddiode recovery times)

ID = 50 A, di/dt = 100 A/µs, VDD = 32 V,

- 71 ns

QrrReverse recoverycharge - 100 nC

IRRMReverse recoverycurrent - 2.8 A

1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

STL260N4LF7Electrical characteristics

DS11156 - Rev 5 page 4/15

2.1 Electrical characteristics (curves)

Figure 1. Safe operating area

10-1 100 101 VDS (V)10-1

100

101

102

ID (A)

10ms

1ms

100µs

Tj ≤ 175 °CTc = 25 °Csingle pulse

Operation in this area islimited by max. RDS(on)

GIPD2005160L48LSOA

Figure 2. Thermal impedance

tp (s)

K

10-5 10-4 10-310-2

10-1

GIPD2005160L48LZTH

10-2 10-1

Figure 3. Output characteristics

0 2 4 6 V DS (V)0

40

80

120

I D (A)

V GS = 3 V

V GS = 4, 5, 6, 7, 8, 9, 10 VGIPD2005160L48LOCH

V GS = 2 V

V GS = 2.6 V

Figure 4. Transfer characteristics

0 1 2 3 40

100

200

300

400V DS = 6 V

I D(A)

V GS (V)

GIPD2005160L48LTCH

T J = 25 °C

T J = 175 °C T J = -55 °C

Figure 5. Gate charge vs gate-source voltage

GADG110620191139QVG

10

8

6

4

2

00 15 30 45 60 75

VGS (V)

Qg (nC)

ID = 50 A

VDS = 20 V

Figure 6. Static drain-source on-resistanceGADG100620191230RID

1.3

1.2

1.1

1.0

0.9

0.8

0.70 10 20 30 40 50

RDS(on) (mΩ)

ID (A)

VGS = 4.5V

VGS = 10V

STL260N4LF7Electrical characteristics (curves)

DS11156 - Rev 5 page 5/15

Figure 7. Capacitance variationsGADG110620191139CVR

104

103

102

101

10-1 100 101

C(pF)

VDS (V)

CISS

COSS

CRSS

Figure 8. Normalized on-resistance vs temperature

-75 -25 25 75 125 175 T j (ºC)0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

R DS(on)(norm.)

VGS = 10 V ID = 25 A

GIPD2005160L48LRON

Figure 9. Normalized V(BR)DSS vs temperature

GADG110620191141BDV

1.08

1.04

1.00

0.96

0.92-75 -25 25 75 125 175

V(BR)DSS (norm.)

Tj (°C)

ID = 2 mA

Figure 10. Normalized gate threshold voltage vstemperature

GADG110620191140VTH

1.2

1.0

0.8

0.6

0.4

0.2

0.0-75 -25 25 75 125 175

VGS(th) (norm.)

Tj (°C)

ID = 250 µA

Figure 11. Source-drain diode forward characteristics

GADG110620191141SDF

1.0

0.8

0.6

0.4

0.2

0 10 20 30 40 50

VSD (V)

ISD (A)

TJ = -55 °C

TJ = 25 °C

TJ = 175 °C

0.0

STL260N4LF7Electrical characteristics (curves)

DS11156 - Rev 5 page 6/15

3 Test circuits

Figure 12. Test circuit for resistive load switching times

AM01468v1

VD

RG

RL

D.U.T.

2200μF VDD

3.3μF+

pulse width

VGS

Figure 13. Test circuit for gate charge behavior

AM01469v1

47 kΩ1 kΩ

47 kΩ

2.7 kΩ

1 kΩ

12 V

IG= CONST100 Ω

100 nF

D.U.T.

+pulse width

VGS

2200μF

VG

VDD

Figure 14. Test circuit for inductive load switching anddiode recovery times

AM01470v1

AD

D.U.T.S

B

G

25 Ω

A A

B B

RG

GD

S

100 µH

µF3.3 1000

µF VDD

D.U.T.

+

_

+

fastdiode

Figure 15. Unclamped inductive load test circuit

AM01471v1

VD

ID

D.U.T.

L

VDD+

pulse width

Vi

3.3µF

2200µF

Figure 16. Unclamped inductive waveform

AM01472v1

V(BR)DSS

VDDVDD

VD

IDM

ID

Figure 17. Switching time waveform

AM01473v1

0

VGS 90%

VDS

90%

10%

90%

10%

10%

ton

td(on) tr

0

toff

td(off) tf

STL260N4LF7Test circuits

DS11156 - Rev 5 page 7/15

4 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,depending on their level of environmental compliance. ECOPACK specifications, grade definitions and productstatus are available at: www.st.com. ECOPACK is an ST trademark.

STL260N4LF7Package information

DS11156 - Rev 5 page 8/15

https://www.st.com/ecopack

http://www.st.com

4.1 PowerFLAT™ 5x6 type C package information

Figure 18. PowerFLAT™ 5x6 type C package outline

Bottom view

Side view

Top view

8231817_typeC_Rev18

STL260N4LF7PowerFLAT™ 5x6 type C package information

DS11156 - Rev 5 page 9/15

Table 7. PowerFLAT™ 5x6 type C package mechanical data

Dim.mm

Min. Typ. Max.

A 0.80 1.00

A1 0.02 0.05

A2 0.25

b 0.30 0.50

C 5.80 6.00 6.20

D 5.00 5.20 5.40

D2 4.15 4.45

D3 4.05 4.20 4.35

D4 4.80 5.00 5.20

D5 0.25 0.40 0.55

D6 0.15 0.30 0.45

e 1.27

E 5.95 6.15 6.35

E2 3.50 3.70

E3 2.35 2.55

E4 0.40 0.60

E5 0.08 0.28

E6 0.20 0.325 0.45

E7 0.75 0.90 1.05

K 1.05 1.35

L 0.725 1.025

L1 0.05 0.15 0.25

θ 0° 12°


DS11156 - Rev 5 page 10/15

Figure 19. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm)

8231817_FOOTPRINT_simp_Rev_18


DS11156 - Rev 5 page 11/15

4.2 PowerFLAT 5x6 packing information

Figure 20. PowerFLAT 5x6 tape (dimensions are in mm)

(I) Measured from centreline of sprocket hole to centreline of pocket.

(II) Cumulative tolerance of 10 sprocket holes is ±0.20.

(III) Measured from centreline of sprocket hole to centreline of pocket

Base and bulk quantity 3000 pcsAll dimensions are in millimeters

8234350_Tape_rev_C

Figure 21. PowerFLAT 5x6 package orientation in carrier tape

Pin 1 identification

STL260N4LF7PowerFLAT 5x6 packing information

DS11156 - Rev 5 page 12/15

Figure 22. PowerFLAT 5x6 reel

STL260N4LF7PowerFLAT 5x6 packing information

DS11156 - Rev 5 page 13/15

Revision history

Table 8. Document revision history

Date Revision Changes

25-Aug-2015 1 First release.

01-Oct-2015 2Updated section electrical characteristics.

Minor text changes.

08-Feb-2016 3

Updated title.

Updated Table 2: "Absolute maximum ratings", Table 5: "Dynamic" and Table 6: "Switching times".

Minor text changes.

13-May-2016 4

Modified: Table 4: "On/off-state", Table 5: "Dynamic", Table 6: "Switching times" and Table 7:"Source-drain diode"

Updated Section 4: "Package information"

Added: Section 2.1: "Electrical characteristics (curves)"

Minor text changes

04-Jul-2019 5

Removed maturity status indication from cover page. The document status is production data.

Updated Section 1 Electrical ratings, Section 2 Electrical characteristics and Section 2.1 Electrical characteristics (curves).

Minor text changes

STL260N4LF7

DS11156 - Rev 5 page 14/15

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© 2019 STMicroelectronics – All rights reserved

STL260N4LF7

DS11156 - Rev 5 page 15/15

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Documents

Datasheet - STL260N4LF7 - N-channel 40 V, 0.85 mΩ typ ... · N-channel 40 V, 0.85 mΩ typ., 120 A STripFET F7 Power MOSFET in a PowerFLAT 5x6 package STL260N4LF7 Datasheet DS11156