HDSP-253x SeriesEight Character 5 mm Smart Alphanumeric Display

Data Sheet

ESD WARNING: Normal CMOS handling precautions should be observed to avoid static discharge.

Device Selection GuideAlGaAs Red HER Orange Yellow GreenHDSP-2534 HDSP-2532 HDSP-2530 HDSP-2531 HDSP-2533

DescriptionTheHDSP-253xisidealforapplicationswheredisplayingeightormorecharactersofdotmatrixinformationinanaesthetically pleasing manner is required.These devicesare eight-digit, 5x7 dot matrix, alphanumeric displays.The5.0mm(0.2 inch)highcharactersarepack­aged ina0.300 inch (7.62mm)30pinDIP.Theon-boardCMOS IChastheabilitytodecode128ASCIIcharacters,whicharepermanentlystoredinROM.Inaddition,16programmablesymbolsmaybestoredinon-boardRAM.Sevenbrightnesslevelsprovideversatilityinadjustingthedisplayintensityandpowerconsumption.TheHDSP-253xisdesignedforstandardmicroprocessorinterfacetechniques.Thedisplayandspecialfeaturesareaccessedthroughabidirectionaleight-bitdatabus.

Features• XYstack­able

• 128characterASCIIdecoder

• Programmablefunctions

• 16userdefinablecharacters

• Multi-leveldimmingandblank­ing

• TTLcompatibleCMOSIC

• Wavesolderable

Applications• Avionics

• Computerperipherals

• Industrialinstrumentation

• Medicalequipment

• Portabledataentrydevices

• Telecommunications

• Testequipment

2

Package Dimensions

Absolute Maximum RatingsSupplyVoltage,VDDtoGround[1] -0.3Vto7.0V

OperatingVoltage,VDDtoGround[2] 5.5V

InputVoltage,AnyPintoGround -0.3VtoVDD+0.3V

FreeAirOperatingTemperatureRange,TA[3] -40°Cto+85°C

RelativeHumidity(Noncondensing) 85%

StorageTemperatureRange,TS -55°Cto100°C

SolderingTemperature[1.59mm(0.063in.)BelowBody] SolderDipping 260°Cfor5secs WaveSoldering 250°Cfor3secs

ESDProtection@1.5k­Ω,100pF 4k­V(eachpin)

Notes:1. MaximumvoltageiswithnoLEDsilluminated.2. 20dotsONinalllocationsatfullbrightness.3. See Thermal Considerations section for information about operation in high temperature

ambients.

Notes:1. Dimensionsareinmm(inches).2. Unlessotherwisespecified,toleranceondimensionsis±0.25mm(0.010inch).3. Foryellowandgreendisplaysonly.4. Mark­ingisonsideoppositepin1.

PIN # 15

SYM.

TYP.

DATE CODE (YEAR, WEEK)LUMINOUS INTENSITY CATEGORYCOLOR BIN (3)

3.81(0.150)

PIN # 16

1.52(0.060)

5.31(0.209)

2.29(0.090)

4.57(0.180)

[4]

4.01(0.158)SYM.5.08

(0.200)

10.16(0.400)

TYP.0.46 0.13(0.018 0.005)

TYP.

PIN #1

PART NUMBER

2.54 0.13(0.100 0.005)

(TOL. NON ACCUM.)

7.62(0.300)

REF.

0.25(0.010)

PIN # FUNCTION PIN # FUNCTION123456789

101112131415

RSTFLA0A1A2A3NO PINNO PINNO PINA4CLSCLKWRCEVDD

161718192021222324252627282930

GND (SUPPLY)THERMAL TESTGND (LOGIC)RDD0D1NO PINNO PINNO PIND2D3D4D5D6D7

PIN FUNCTION ASSIGNMENT TABLE

3 4 5 6 7

TYP.

SYM.

11.43(0.450)

MAX.TYP.

2.54(0.100)

SYM.2.68(0.105)

42.93 (1.690) MAX.

TYP.5.36(0.211)

PIN #15

PIN #1 IDENTIFIER

HDSP-253x X ZYYWW

210

3

ASCII Character Set

Optical Characteristics at 25°C[1]

VDD=5.0VatFullBrightness

Luminous Intensity Peak Dominant Character Average (#) Wavelength Wavelength[2] IV (mcd) lPEAK (nm) ld (nm) LED Color Part Number Min. Typ. Typ. Typ.AlGaAsRed HDSP-2534 5.1 25 645 637

HighEfficiencyRed HDSP-2532 2.5 7.5 635 626

Orange HDSP-2530 2.5 7.5 600 602

Yellow HDSP-2531 2.5 7.5 583 585

Green HDSP-2533 2.5 7.5 568 574

Notes:1. Referstotheinitialcasetemperatureofthedeviceimmediatelypriortomeasurement.2. Dominantwavelength, ld,isderivedfromtheCIEchromaticitydiagram,andrepresentsthesinglewavelengthwhichdefinesthecolorofthedevice.

D7D6

D5D4BITS D3 D0D2 D1

ROWCOLUMN

0000 0

0001 1

0010 2

0011 3

0100 4

0101 5

0110 6

0111 7

1000 8

1001 9

1010 A

1011 B

1100 C

1101 D

1110 E

1111 F

00

00

0

00

01

1

00

10

2

00

11

3

01

00

4

01

01

5

01

10

6

01

11

7

1X

XX

8–F

16

USER

DEFINED

CHARACTERS

4

Recommended Operating ConditionsParameter Symbol Minimum Nominal Maximum UnitsSupplyVoltage VDD 4.5 5.0 5.5 V

Electrical Characteristics over Operating Temperature Range4.5<VDD<5.5unlessotherwisespecified

25°C 25°C Parameter Symbol Min. Typ.[1] Max.[1] Max. Units Test ConditionsInputLeak­age II -1.0 1.0 mA VIN=0toVDD,PinsCLK,(InputwithoutPull-up) D0-D7,A0-A4

InputCurrent IIP -30 -11 -18 0 mA VIN=0toVDD,PinsCLS,(InputwithPull-up) RST,WR,RD,CE,FL

IDDBlank­ IDD(BL) 0.5 3.0 4.0 mA VIN=VDD

IDD8Digits12Dots/Char[2,3,4] IDD(V) 230 295 390 mA “V”OninAll8Locations(AlGaAs)

IDD8Digits20Dots/Char[2,3,4] IDD(#) 330 410 480 mA “#”OninAll8Locations(AlGaAs)

IDD8Digits12Dots/Char[2,3,4] IDD(V) 200 255 330 mA “V”OninAll8Locations(AllColorsExceptAlGaAs)

IDD8Digits20Dots/Char[2,3,4] IDD(#) 300 370 430 mA “#”OninAll8Locations(AllColorsExceptAlGaAs)

InputVoltageHigh VIH 2.0 VDD V +0.3V

InputVoltageLow VIL GND 0.8 V -0.3V

OutputVoltageHigh VOH 2.4 V VDD=4.5V,IOH=-40µA

OutputVoltageLowD0-D7 VOL 0.4 V VDD=4.5V,IOL=1.6mA

OutputVoltageLowCLK VOL 0.4 V VDD=4.5V,IOL=40µA

ThermalResistanceIC RqJ-PIN 16 °C/W MeasuredatPin17Junction-to-PIN

Notes:1. VDD=5.0V.2. SeeThermalConsiderationsSectionforinformationaboutoperationinhightemperatureambients.3. AverageIDDmeasuredatfullbrightness.SeeTable2inControlWordSectionforIDDatlowerbrightnesslevels.Peak­IDD=28/15xIDD(#).4. MaximumIDDoccursat-55°C.

5

Symbol Description 25°C Typical Minimum[1] UnitsFOSC OscillatorFrequency 57 28 k­Hz

FRF[5] DisplayRefreshRate 256 128 Hz

FFL[6] CharacterFlashRate 2 1 Hz

tST[7] SelfTestCycleTime 4.6 9.2 sec

Notes:5. FRF=FOSC/224.6. FFL=FOSC/28,672.7. tST=262,144/FOSC.

AC Timing Characteristics over Temperature RangeVDD=4.5to5.5Vunlessotherwisespecified.

Reference Number Symbol Description Min.[1] Units1 tACC DisplayAccessTime Write 210 Read 230 ns

2 tACS AddressSetupTimetoChipEnable 10 ns

3 tCE ChipEnableActiveTime[2,3] Write 140 Read 160 ns

4 tACH AddressHoldTimetoChipEnable 20 ns

5 tCER ChipEnableRecoveryTime 60 ns

6 tCES ChipEnableActivePriortoRisingEdgeof[2,3] Write 140 Read 160 ns

7 tCEH ChipEnableHoldTimetoRisingEdgeofRead/WriteSignal[2,3] 0 ns

8 tW WriteActiveTime 100 ns

9 tWD DataValidPriortoRisingEdgeofWriteSignal 50 ns

10 tDH DataWriteHoldTime 20 ns

11 tR ChipEnableActivePriortoValidData 160 ns

12 tRD ReadActivePriortoValidData 75 ns

13 tDF ReadDataFloatDelay 10 ns

tRC ResetActiveTime[4] 300 ns

Notes:1. WorstcasevaluesoccuratanICjunctiontemperatureof125°C.2. For designers who do not need to read from the display, the Read line can be tied toVDD and theWrite and Chip Enable lines can be tied

together.3. ChangingthelogiclevelsoftheAddresslineswhenCE=“0”maycauseerroneousdatatobeenteredintotheCharacterRAM,regardlessofthe

logiclevelsoftheWRandRDlines.4. Thedisplaymustnotbeaccesseduntilafter3clock­pulses(110µsmin.usingtheinternalrefreshclock­)aftertherisingedgeoftheresetline.

6

Write Cycle Timing Diagram

Read Cycle Timing Diagram

InputPulseLevels:0.6Vto2.4V

InputPulseLevels:0.6Vto2.4VOutputReferenceLevels:0.6Vto2.2VOutputLoading=1TTLLoadand100pF

1

9

86

32

CE

7

10

4 25

A0 -A4FL

D0 -D7

WR

1

12

11

6

32

CE

7

13

4 25

A0 -A4FL

D0 -D7

RD

7

Electrical DescriptionPin Function Description

RESET(RST,pin1) Resetinitializesthedisplay.

FLASH(FL,pin2) FL lowindicatesanaccesstotheFlashRAMandisunaffectedbythestateofaddresslinesA3-A4.

ADDRESSINPUTS Eachlocationinmemoryhasadistinctaddress.Addressinputs(A0-A2)selectaspecific(A0-A4,pins3-6,10) location in the Character RAM, the Flash RAM or a particular row in the UDC (User-

DefinedCharacter)RAM.A3-A4areusedtoselectwhichsectionofmemoryisaccessed.Table1showsthelogiclevelsneededtoaccesseachsectionofmemory.

Table 1. Logic Levels to Access Memory FL A4 A3 SectionofMemory A2A1A0

0 X X FlashRAM CharacterAddress

1 0 0 UDCAddressRegister Don’tCare

1 0 1 UDCRAM RowAddress

1 1 0 ControlWordRegister Don’tCare

1 1 1 CharacterRAM CharacterAddress

CLOCKSELECT(CLS,pin11) Thisinputisusedtoselecteitheraninternal(CLS=1)orexternal(CLS=0)clock­source.

CLOCKINPUT/OUTPUT Outputsthemasterclock­(CLS=1)orinputsaclock­(CLS=0)forslavedisplays.(CLK,pin12)

WRITE(WR,pin13) DataiswrittenintothedisplaywhentheWRinputislowandtheCEinputislow.

CHIPENABLE(CE,pin14) Thisinputmustbeatalogiclowtoreadorwritedatatothedisplayandmustgohigh betweeneachreadandwritecycle.

READ(RD,pin19) DataisreadfromthedisplaywhentheRDinputislowandtheCEinputislow.

DATABus TheDatabusisusedtoreadfromorwritetothedisplay.(D0-D7,pins20,21,25-30)

GND(SUPPLY)(pin16) ThisistheanaloggroundfortheLEDdrivers.

GND(LOGIC)(pin18) Thisisthedigitalgroundforinternallogic.

VDD(POWER)(pin15) Thisisthepositivepowersupplyinput.

ThermalTest(pin17) ThispinisusedtomeasuretheICjunctiontemperature.Donotconnect.

8

Figu

re 1.

HDS

P-25

3X in

tern

al b

lock

dia

gram

.

A 3 A 4 FLEN

UDC A

DDR

REGI

STER UD

CAD

DR

RD WR

D 0-D

7

CLR

PRE S

ET

CE

A 3 A 4

A 0-A

2

D 0-D

7 FL CEWRRD

A 3 A 4 FL CE FL CE

A 3 A 4 FL CE

A 3 A 4 FL CE

EN8 x

8CH

ARAC

TER

RAM

D 0-D

6RD W

RD 0

-D7

A 0-A

2RE

SET

CHAR

ADD

R

D 7

EN

FLAS

HRA

M

FLAS

HDA

TARD W

RD 0 A 0

-A2

RESE

TCH

AR A

DDR

EN

UDC R

AM

DOT

DATA

RD WR

D 0-D

4

D 0-D

4

A 0-A

2UD

C ADD

RRO

W SE

TEN EN RO

WSE

LSE

LFTE

STDECO

DER(

*) DOT

DATA

D 0-D

6TI

MIN

G

TIM

ING

DOT

DRIV

ERS

DOT

DATA

EN

FLAS

H

CONT

ROL W

ORD

REGI

STER

0 1RD W

R

RST

CLK

OCS

CLS

CLR1

CLR2

D 0-D

7

RESE

T

SELF

TEST

RESU

LT

2 3 4 6 7

SELF

TEST

IN

SELF

TEST

SELF

TEST

SELF

TEST

STAR

T

8 5x

7LE

DCH

ARAC

TERS

ROW

DRI

VERS

VISU

ALTE

STRO

MTE

ST CLR

TEST

OK

TEST

OK

INTE

NSIT

Y

INTE

NSIT

Y

FLAS

HFLAS

H

BLIN

K

BLIN

K

RESE

T

RESE

T

CLOC

K

TIM

ING

AND

CONT

ROL

CHAR

ADDR

ROW

SET

TIM

ING

9

CharacterRAM ThisRAMstoreseitherASCIIcharacterdataoraUDCRAMaddress.

FlashRAM Thisisa1x8RAMwhichstoresFlashdata.

User-DefinedCharacterRAM ThisRAMstoresthedotpatternforcustomcharacters.(UDCRAM)

User-DefinedCharacter ThisregisterisusedtoprovidetheaddresstotheUDCRAMwhenAddressRegister theuseriswritingorreadingacustomcharacter.(UDCAddressRegister)

ControlWordRegister Thisregisterallowstheusertoadjustthedisplaybrightness,flash individualcharacters,blink­,selftestorclearthedisplay.

WordRegisterandtherefreshcircuitrynecessarytosyn-chronize the decoding and driving of eight 5 x 7 dotmatrix characters.The major user accessible portions ofthedisplayarelistedbelow:

Display Internal Block DiagramFigure 1 shows the internal block­ diagram of the HDSP-253Xdisplay.TheCMOSICconsistsofan8byteCharacterRAM,an8bitFlashRAM,a128characterASCIIdecoder,a16characterUDCRAM,aUDCAddressRegister,aControl

Figure 2. Logic levels to access the character RAM.

Character RamFigure2showsthelogiclevelsneededtoaccesstheHDSP-253XCharacterRAM.DuringanormalaccesstheCE=“0”andeitherRD=“0”orWR=“0”.However,erroneousdatamaybewrittenintotheCharacterRAMiftheAddresslinesareunstablewhenCE=“0”regardlessofthelogiclevelsoftheRDorWRlines.AddresslinesA0-A2areusedtoselectthelocationintheCharacterRAM.TwotypesofdatacanbestoredineachCharacterRAMlocation:anASCIIcodeoraUDCRAMaddress.DatabitD7 isusedtodifferenti-atebetweentheASCIIcharacterandaUDCRAMaddress.D7=0enablestheASCIIdecoderandD7=1enablestheUDCRAM.D0-D6areusedtoinputASCIIdataandD0-D3areusedtoinputaUDCaddress.

CE

FL A4 A3 A2 A1 A0

RST WR RD

CHARACTERADDRESS

SYMBOL IS ACCESSED IN LOCATIONSPECIFIED BY THE CHARACTER ADDRESS ABOVE

01

0 00 11

1 11

01 1

UNDEFINED

CONTROL SIGNALS

CHARACTER RAM ADDRESS

CHARACTER RAM DATA FORMAT

WRITE TO DISPLAYREAD FROM DISPLAYUNDEFINED

000 = LEFT MOST111 = RIGHT MOST

D7 D6 D5 D4 D3 D2 D1 D0

0 128 ASCII CODE

X X X UDC CODE1

DISPLAY0 = LOGIC 0; 1 = LOGIC 1; X = DO NOT CARE

DIG0 DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7

001 010 011 100 101 110 111000

10

UDC RAM and UDC Address RegisterFigure3showsthelogiclevelsneededtoaccesstheUDCRAM and the UDC Address Register. The UDC AddressRegisteriseightbitswide.Thelowerfourbits(D0-D3)areusedtoselectoneofthe16UDClocations.Theupperfourbits(D4-D7)arenotused.OncetheUDCaddresshasbeenstoredintheUDCAddressRegister,theUDCRAMcanbeaccessed.

Tocompletelyspecifya5x7characterrequireseightwritecycles.OnecycleisusedtostoretheUDCRAMaddressintheUDCAddressRegister.Sevencyclesareusedtostoredot data in the UDC RAM. Data is entered by rows. Onecycle is needed to access each row. Figure 4 shows theorganizationofaUDCcharacterassumingthesymboltobestoredisan“F.”A0-A2areusedtoselecttherowtobeaccessedandD0-D4areusedtotransmittherowdotdata.Theupperthreebits(D5-D7)areignored.D0(leastsignifi-cantbit)correspondstotherightmostcolumnofthe5x7matrixandD4(mostsignificantbit)correspondstotheleftmostcolumnofthe5x7matrix.

Flash RAMFigure5showsthelogiclevelsneededtoaccesstheFlashRAM. The Flash RAM has one bit associated with eachlocation of the Character RAM. The Flash input is usedtoselecttheFlashRAM.AddresslinesA3-A4areignored.AddresslinesA0-A2areusedtoselectthelocationintheFlash RAM to store the attribute. D0 is used to store orremove the flash attribute. D0 =“1” stores the attributeandD0=“0”removestheattribute.

Whentheattributeisenabledthroughbit3oftheControlWordanda“1”isstoredintheFlashRAM,thecorrespond-ingcharacterwillflashatapproximately2Hz.Theactualrateisdependentontheclock­frequency.Foranexternalclock­theflashratecanbecalculatedbydividingtheclock­frequencyby28,672.

Figure 3. Logic levels to access a UDC character.

Figure 4. Data to load “”F’’ into the UDC RAM.

CE

FL A4 A3 A2 A1 A0

RST WR RD

010 00 11

0 01 X X X

01 1

UNDEFINED

CONTROL SIGNALS

UDC ADDRESS REGISTER ADDRESS

UDC ADDRESS REGISTER DATA FORMAT

WRITE TO DISPLAYREAD FROM DISPLAYUNDEFINED

000 = ROW 1110 = ROW 7

D7 D6 D5 D4 D3 D2 D1 D0

X UDC CODEX X X

FL A4 A3 A2 A1 A0

0 11 ROW SELECT

UDC RAM ADDRESS

UDC RAM C CDATA FORMAT O O L L 1 5

0 = LOGIC 0; 1 = LOGIC 1; X = DO NOT CARE

D7 D6 D5 D4 D3 D2 D1 D0

X DOT DATAX X

CERST WR RD

010 00 11 01 1

UNDEFINED

CONTROL SIGNALS

WRITE TO DISPLAYREAD FROM DISPLAYUNDEFINED

C C C C CO O O O OL L L L L1 2 3 4 5D4 D3 D2 D1 D0 UDC CHARACTER HEX CODE 1 1 1 1 1 ROW 1 • • • • • 1F1 0 0 0 0 ROW 2 • 101 0 0 0 0 ROW 3 • 101 1 1 1 0 ROW 4 • • • • 1E1 0 0 0 0 ROW 5 • 101 0 0 0 0 ROW 6 • 101 0 0 0 0 ROW 7 • 10IGNORED

0 = LOGIC 0; 1 = LOGIC 1; * = ILLUMINATED LED

Figure 5. Logic levels to access the Flash RAM.

CE

FL A4 A3 A2 A1 A0

RST WR RD

010 00 11

X X0

01 1

UNDEFINED

REMOVE FLASH ATSPECIFIED DIGIT LOCATIONSTORE FLASH ATSPECIFIED DIGIT LOCATION

CONTROL SIGNALS

FLASH RAM ADDRESS

FLASH RAM DATA FORMAT

0 = LOGIC 0; 1 = LOGIC 1; X = DO NOT CARE

WRITE TO DISPLAYREAD FROM DISPLAYUNDEFINED

D7 D6 D5 D4 D3 D2 D1 D0

X X X X X X X 01

CHARACTERADDRESS

000 = LEFT MOST111 = RIGHT MOST

11

Table 2. Current Requirements at Different Brightness Levels for All Colors Except AlGaAs % VDD = 5.0 V Symbol D2 D1 D0 Brightness 25°C Typ. UnitsIDD(V) 0 0 0 100 200 mA

0 0 1 80 160 mA

0 1 0 53 106 mA

0 1 1 40 80 mA

1 0 0 27 54 mA

1 0 1 20 40 mA

1 1 0 13 26 mA

Control Word RegisterFigure6showshowtoaccesstheControlWordRegister.Thisisaneightbitregisterwhichperformsfivefunctions.TheyareBrightnesscontrol,FlashRAMcontrol,Blink­ing,SelfTest and Clear. Each function is independent of theothers.However,allbitsareupdatedduringeachControlWordwritecycle.

Brightness (Bits 0-2)Bits0-2oftheControlWordadjustthebrightnessofthedisplay.Bits0-2areinterpretedasathreebitbinarycodewith code (000) corresponding to maximum brightnessand code (111) corresponding to a blank­ed display. Inaddition to varying the display brightness, bits 0-2 alsovary the average value of IDD. IDD can be calculated atany brightness level by multiplying the percent bright-nesslevelbythevalueofIDDatthe100%brightnesslevel.ThesevaluesofIDDareshowninTable2.

Flash Function (Bit 3)Bit3determineswhethertheflashingcharacterattributeisonoroff.Whenbit3isa“1,”theoutputoftheFlashRAMischeck­ed.IfthecontentofalocationintheFlashRAMisa“1,”theassociateddigitwillflashatapproximately2Hz.Foranexternalclock­,theblink­ratecanbecalculatedbydividingtheclock­frequencyby28,672.Iftheflashenablebit of the ControlWord is a“0,” the content of the FlashRAMisignored.TousethisfunctionwithmultipledisplaysystemsseetheResetsection.

Blink Function (Bit 4)Bit4oftheControlWordisusedtosynchronizeblink­ingofalleightdigitsofthedisplay.Whenthisbitisa“1”alleightdigitsofthedisplaywillblink­atapproximately2Hz.Theactual rate is dependent on the clock­ frequency. For anexternalclock­,theblink­ratecanbecalculatedbydividingtheclock­frequencyby28,672.ThisfunctionwilloverridetheFlash functionwhen it isactive.Touse this functionwithmultipledisplaysystemsseetheResetsection.

Figure 6. Logic levels to access the control word register.

CE

FL A4 A3 A2 A1 A0

RST WR RD

010 00 11

1 0 X X X1

01 1

UNDEFINED

CONTROL SIGNALS

CONTROL WORD ADDRESS

CONTROL WORD DATA FORMAT0 = LOGIC 0; 1 = LOGIC 1; X = DO NOT CARE

0 DISABLE FLASH1 ENABLE FLASH

BRIGHTNESSCONTROLLEVELS

0 DISABLE BLINKING1 ENABLE BLINKING

0 NORMAL OPERATION1 CLEAR FLASH AND CHARACTER RAMS

0 X NORMAL OPERATION; X IS IGNORED1 X START SELF TEST; RESULT GIVEN IN X X = 0 FAILED X = 1 PASSED

WRITE TO DISPLAYREAD FROM DISPLAYUNDEFINED

D7 D6 D5 D4 D3 D2 D1 D0

C S S BL F B

0 0 0 100%0 0 1 80%0 1 0 53%0 1 1 40%1 0 0 27%1 0 1 20%1 1 0 13%1 1 1 0%

B B

12

Self Test Function (Bits 5, 6)Bit6oftheControlWordRegisterisusedtoinitiatetheselftestfunction.Resultsoftheinternalselftestarestoredinbit5oftheControlWord.Bit5isareadonlybitwherebit5=“1”indicatesapassedselftestandbit5=“0”indicatesafailedselftest.

Setting bit 6 to a logic 1 will start the self test function.The built-in self test function of the IC consists of twointernal routines which exercises major portions of theICandilluminatesalloftheLEDs.ThefirstroutinecyclestheASCIIdecoderROMthroughallstatesandperformsacheck­sumontheoutput.Ifthecheck­sumagreeswiththecorrectvalue,bit5issetto“1.”ThesecondroutineprovidesavisualtestoftheLEDsusingthedrivecircuitry.Thisisac-complishedbywritingcheck­eredandinversecheck­eredpatterns to the display. Each pattern is displayed forapproximately2seconds.

During the self test function the display must not beaccessed. The time needed to execute the self testfunctioniscalculatedbymultiplyingtheclock­periodby262,144.Forexample,assumeaclock­frequencyof58KHz,thenthetimetoexecutetheselftestfunctionfrequencyisequalto(262,144/58,000)=4.5secondduration.

At the end of the self test function, the Character RAMisloadedwithblank­s,theControlWordRegisterissettozerosexceptforbit5,andtheFlashRAMisclearedandtheUDCAddressRegisterissettoallones.

Clear Function (Bit 7)Bit 7 of the Control Word will clear the Character RAMand the Flash RAM. Setting bit 7 to a “1” will start theclearfunction.Threeclock­cycles(110msmin.usingtheinternalrefreshclock­)arerequiredtocompletetheclearfunction. The display must not be accessed while thedisplayisbeingcleared.Whentheclearfunctionhasbeencompleted,bit7willberesettoa“0.”TheASCIIcharactercodeforaspace(20H)willbe loadedintotheCharacterRAMtoblank­thedisplayandtheFlashRAMwillbeloadedwith“1”s.TheUDCRAM,UDCAddressRegisterandthere-mainderoftheControlWordareunaffected.

Display ResetFigure7showsthelogiclevelsneededtoresetthedisplay.The display should be reset on Power-up. The externalResetclearstheCharacterRAM,FlashRAM,ControlWordandresetstheinternalcounters.AftertherisingedgeoftheResetsignal,threeclock­cycles(110msmin.usingtheinternalrefreshclock­)arerequiredtocompletetheresetsequence. The display must not be accessed while thedisplayisbeingreset.TheASCIICharactercodeforaspace(20H) will be loaded into the Character RAM to blank­the display. The Flash RAM and Control Word Registerare loadedwithall“0”s.TheUDCRAMandUDCAddressRegister are unaffected. All displays which operate withthe same clock­ source must be simultaneously reset tosynchronizetheFlashingandBlink­ingfunctions.

Mechanical ConsiderationsThe HDSP-253X is assembled by die attaching and wirebonding280LEDchipsandaCMOSICtoathermallycon-ductiveprintedcircuitboard.ApolycarbonatelensplacedoverthepcbcreatesanairgapovertheLEDwirebonds.Aback­fillepoxysealsthedisplaypack­age.

Figure 8 shows the proper method to insert the displaybyhand.TopreventdamagetotheLEDwirebonds,applypressure uniformly with fingers located at both ends ofthepart.Usingatool,showninFigure9,suchasascrew-driverorplierstopushthedisplayintotheprintedcircuitboard or sock­et may damage the LED wire bonds. TheforceexertedbyascrewdriverissufficienttopushthelensintotheLEDwirebonds.ThebentwirebondscauseshortsoropensthatresultincatastrophicfailureoftheLEDs.

Figure 7. Logic levels to reset the display.

Note:IfRST,CE,andWRarelow,unk­owndatamaybewrittenintothedisplay.

CERST WR RD

0 = LOGIC 0; 1 = LOGIC 1; X = DO NOT CARE

FL

0 1 X X X X X

A4 -A0 D7 -D0

13

Figure 9. Improper method to manually insert a display.

Thermal ConsiderationsThe HDSP-253X can operate from -40°C to +85°C. Thedisplay’slowthermalresistanceallowsheattoflowfromthe CMOS IC to the 24 pack­age pins.Typically, this heatisconductedthroughtheprintedcircuitboardtracestofreeair.Formostapplications,noadditionalheatsink­ingisneeded.Illuminatingall280LEDssimultaneouslyatfullbrightnessisnotrecommendedforcontinuousoperation.However,all280LEDscanbeilluminatedsimultaneouslyatfullbrightnessfor10secondsat25°Casalamptest.

TheIChasamaximumallowablejunctiontemperatureof150°C.TheICjunctiontemperaturecanbecalculatedwiththefollowingequation:TJMAX=TA+(PDxRqJ-A)

TJMAXisthemaximumallowableICjunctiontemperature.

TAistheambienttemperaturesurroundingthedisplay.

PDisthepowerdissipatedbytheIC.

RqJ-A is the thermal resistance from the IC through thedisplaypack­ageandprintedcircuitboardtotheambient.

AtypicalvalueforRqJ-Ais39°C/W.Thisvalueistypicalforadisplaymountedinasock­etandcoveredwithaplasticfilter. The sock­et is soldered to a 0.062 in. thick­ printedcircuit board with 0.020 in. wide one-ounce coppertraces.

PDcanbecalculatedasfollows:PD=VDDxIDDVDDisthesupplyvoltageandIDDisthesupplycurrent.VDDcanvaryfrom4.5Vto5.5V.IDDchangeswithVDD,temperature,brightnesslevel,andnumberofon-pixels.

ForAlGaAsIDD(#)=(83.8xVDD-0.35xTJ)xBxN/8IDD(V)=(63xVDD-0.79xTJ)xBxN/8

FortheothercolorsIDD(#)=(75.4xVDD-0.28xTJ)xBxN/8IDD(V)=(54xVDD-0.6xTJ)xBxN/8IDD (#) is the supply current using “#” as the displayedcharacter.

IDD(V) is the supply current using “V” as the displayedcharacter.

TJistheICjunctiontemperature.

Bisthepercentbrightnesslevel.

Nisthenumberofcharactersilluminated.

Operation in high temperature ambients may requirepower derating or heatsink­ing. Figure10 shows how toderatethepowerforanHDSP-253X.Youcanreducethepower by tighter supply voltage regulation or loweringthebrightnesslevel.

Figure 8. Proper method to manually insert a display.

14

Table3showsthecalculatedmaximumallowableambienttemperatureforseveraldifferentsetsofoperatingcondi-tions. The worst case alphanumeric characters (#,@,B)have 20 pixels. Displaying eight 20-pixel characters willnotoccurinnormaloperation.Thus,usingeight20-pixelcharacterstocalculatepowerdissipationwilloverestimatethepowerandtheICjunctiontemperature.Theaveragenumberofpixelspercharacter,supplyvoltage,brightnesslevel, and number of characters are needed to calculatethepowerdissipatedbytheIC.Theambienttemperature,power dissipated by the IC, and the thermal resistanceare then used to calculate IC junction temperature.Thetypicalalphanumericcharacteris15pixels.ForconditionsnotlistedinTable3,youcancalculatethepowerdissipat-edbytheICanduseFigure10todeterminethemaximumambienttemperature.

Table 3. Maximum Allowable Ambient Temperature for Various Operating ConditionsAlGaAs Red Number of Brightness VDD IDD PD RqJ-A TAMAX Character Characters Level V mA W °C/W °C#(20dots) 8 100% 5.5 408 2.2 39 64

#(20dots) 8 100% 5.25 387 2.0 39 72

#(20dots) 8 100% 5.0 366 1.8 39 80

#(20dots) 7 100% 5.5 357 2.0 39 72

#(20dots) 6 100% 5.5 306 1.7 39 84

#(20dots) 8 80% 5.5 327 1.8 39 80

#(20dots) 8 80% 5.25 310 1.6 39 85

#(20dots) 8 53% 5.5 216 1.2 39 85

V(12dots) 8 100% 5.5 228 1.3 39 85

Figure 10. Maximum allowable power dissipation vs. ambient temperature. TJMAX = 150°C or 120°C.

P D M

AX. –

MAX

IMUM

POW

ER D

ISSI

PATI

ON –

W

501.5

TA – AMBIENT TEMPERATURE – C8555 60 80 90

2.3

2.2

2.1

1.8

1.7

1.6

70 7565

2.0

1.9

AlGaAs

RθJ-A = 39C/W

ALL OTHER COLORS

Table 4. Maximum Allowable Ambient Temperature for Various Operating Conditions (cont’d.)All Colors Except AlGaAs Red Number of Brightness VDD IDD PD RqJ-A TAMAX Character Characters Level V mA W °C/W °C#(20dots) 8 100% 5.5 373 2.0 39 72

#(20dots) 8 100% 5.25 354 1.9 39 77

#(20dots) 8 100% 5.0 335 1.67 39 85

#(20dots) 7 100% 5.5 326 1.8 39 80

#(20dots) 6 100% 5.5 280 1.5 39 85

#(20dots) 8 80% 5.5 298 1.6 39 85

V(12dots) 8 100% 5.5 207 1.1 39 85

TheactualICtemperatureiseasytomeasure.Pin17isthermallyandelectricallyconnectedtotheICsubstrate.Thethermalresistancefrompin17totheICis16°C/W.TheproceduretomeasuretheICjunctiontemperatureisasfollows:1. MeasureVDDandIDDforthedisplay.MeasureVDDbetweenpins15and16.Measurethecurrententeringpin15.2. Measurethetemperatureofpin17after45minutes.Useanelectricallyisolatedthermalcoupleprobe.3. TJ(IC)=Tpin+VDDxIDDx16°C/W.

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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes 5989-3184ENAV02-2018EN - July 15, 2009

Color Bin Limits Color Range (nm)

Color Bin Min. Max.Green 1 576.0 580.0

2 573.0 577.0

3 570.0 574.0

4 567.0 571.0

Yellow 3 581.5 585.0

4 584.0 587.5

5 586.5 590.0

6 589.0 592.5

7 591.5 595.0

Note:TestconditionsasspecifiedinOpticalCharacteristictable.

Intensity Bin Limits for HDSP-253x Intensity Range (mcd)

Bin Min. Max.G 2.50 4.00

H 3.41 6.01

I 5.12 9.01

J 7.68 13.52

K 11.52 20.28

Note:TestconditionsasspecifiedinOpticalCharacteristictable.

Intensity Bin Limits for HDSP-2534 Intensity Range (mcd)

Bin Min. Max.I 5.12 9.01

J 7.68 13.52

K 11.52 20.28

L 17.27 30.42

M 25.91 45.63

Note:TestconditionsasspecifiedinOpticalCharacteristictable.

Ground ConnectionsTwogroundpinsareprovidedtok­eeptheinternalIClogicground clean. The designer can, when necessary, routethe analog ground for the LED drivers separately fromthe logic ground until an appropriate ground plane isavailable.Onlonginterconnectionsbetweenthedisplayandthehostsystem,thedesignercank­eepvoltagedropson the analog ground from affecting the display logiclevelsbyisolatingthetwogrounds.

Thelogicgroundshouldbeconnectedtothesamegroundpotentialasthelogicinterfacecircuitry.Theanaloggroundandthelogicgroundshouldbeconnectedatacommongroundwhichcanwithstandthecurrent inducedby theswitchingLEDdrivers.Whenseparategroundconnections

areused,theanaloggroundcanvaryfrom-0.3Vto+0.3Vwithrespecttothelogicground.Voltagebelow-0.3Vcancause all dots to be on.Voltage above +0.3V can causedimminganddotmismatch.

Solder and Post Solder CleaningNote:Freonvaporscancausetheblack­painttopeeloffthedisplay.SeeApplicationNote1027forinformationonsolderingandpostsoldercleaning.

Contrast Enhancement (Filtering)See Application Note 1015 for information on contrastenhancement.