CY8CKIT-149 PSoC 4100S Plus Prototyping Kit · 5 5 4 4 3 3 2 2 1 1 D D C C B B A A CY8CKIT-149 PSoC 4100S Plus Prototyping Kit PAGE DESCRIPTION 01 Title, Table of Contents & Drawing

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CY8CKIT-149 PSoC 4100S Plus Prototyping Kit

PAGE DESCRIPTION

01 Title, Table of Contents & Drawing Numbers

02 Block Diagram

03

CONTENTS

PCBAPCBFAB DRWASSY DRWSCH DRW

Drawing Numbers

04

121-60476-01

600-60476-01

610-60476-01

620-60476-01

630-60476-01

KitProg2 Schematics

PSoC 4100S Plus

05

06

07

CapSense

IO Headers, BLE and Programming

Revision History

SCH Title :

Size Document Number Rev

Date: Sheet of

CYPRESS SEMICONDUCTOR © 2017

Page Title :

Drawn By

CYPRESS SEMICONDUCTOR198 CHAMPION COURT SAN JOSE, CA 95134 (408) 943-2600

Approved By

630-60476-01 04


A4

1 7Wednesday, October 04, 2017

Title Page

NMIT RKAD

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630-60476-01 04


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Title Page

NMIT RKAD

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630-60476-01 04


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Title Page

NMIT RKAD

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Plus

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Block Diagram

NMIT RKAD

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630-60476-01 04


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Block Diagram

NMIT RKAD

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Block Diagram

NMIT RKAD

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Note: Pull down todisable HW flow control

Decoupling CapacitorsPSoC 5LP based KitProg2

Power LEDI2C Interface

KitProg2 HW Revision

Note: GND is read as binary"1" and floating as "0"

PSoC 5LP Power

Bit 0

ID = 0x03

Bit 1

Bit 2

Bit 3

Bit 4

Target PSoC Program/ Debug Connector

UART Interface

Mode Switch

KitProg2 Status LED

KitProg2 I/O headers

Target Power

Voltage Monitoring

SAR BypassCapacitor

Del-Sig BypassCapacitor

USB Microconnector

P5LP_VCCD

P5LP_VCCD

P5LP_VDD

P5LP_VDD

P5LP_VDD

P5LP_VDD

P5LP_VCCD

P5LP_VDD

P5LP_VDD

VBUS

VTARGVBUS VTARG

P5LP_VDDVBUS

VTARG

VTARG

VTARG

VBUS

P5LP_VDD

VBUS

VBUS

RESET

I2C_SCLI2C_SDA

SWDIOSWDCLKRESET

I2C_SCLI2C_SDA

UART_RXUART_TX

SCH Title :


Date: Sheet of


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Approved By

630-60476-01 04


A4


KitProg2

NMIT RKAD

SCH Title :


Date: Sheet of


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Approved By

630-60476-01 04


A4


KitProg2

NMIT RKAD

SCH Title :


Date: Sheet of


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630-60476-01 04


A4


KitProg2

NMIT RKAD

C10 1.0 uFNo Load

C44 10nF

SW3

SKRPACE010

1 4

2 3

C31

0.1 uF

C20

0.1 uF

C9 1.0 uF

U4

123

4567

R12 22E

C15

1.0 uF

LED2 AMBER LED

R50 30K

C14

1.0 uF

R39 750 OHM

R63 100K

R7 0 Ohm

R15 15K

C24

1.0 uF

LED3 AMBER LED

R36 30K

C16 1.0 uFR1 750 OHM

J6

CON 7x1No Load

1234567

C22

0.1 uF

C45

0.1uF

R10 22E

R2 15K

C34

0.1 uF

U1

CY8C5868LTI-LP039

P2[3

]65

P2[1

]63

P12[3]47

P3[7]37

P3[5

]34

P3[3

]32

P3[1

]30

P15[3]41

P15[2]40

P1[7

]19

P1[5]16

P1[3]14

P1[1]12

VS

SD

25

P15[6

] D

+22

P15[7

] D

-23

VC

CD

26

P12[0]38

P1[0]11

P1[2]13

P1[4]15

P1[6

]18

P3[0

]29

P3[2

]31

P3[4

]33

P12[1]39

P12[2]46

P3[6]36

P2[0

]62

P2[2

]64

P2[4

]66

P2[6]1

P0[0]48

P0[2]50

P0[4

]53

P0[6

]55

VD

DD

59

VS

SD

58

P0[7

]56

P0[5

]54

P0[3]51

P0[1]49P2[7]

2

P2[5

]68

P12[4]3

P12[5]4

VSSB5

IND6

VBOOST7

VBAT8

VSSD9

XRES10

VDDIO117

P12[6

]20

P12[7

]21

VD

DD

24

P15[0

]27

P15[1

]28

VD

DIO

267

P15[5

]61

P15[4

]60

VC

CD

57

VD

DIO

52

VSSD45

VDDA44

VSSA43

VCCA42

VDDIO335

EP

AD

69

D1 MBR0520L

C21

0.1 uF

J7

CON 7x1No Load

1234567

C4

1.0 uF

F1

C33

1.0 uF

R11 100K

R14 49.9KNo Load

C5

1.0 uF

C36

0.1 uF

R384.7K

C35

0.1 uF

J8

10118194-0001LF

VBUS1

DM2

DP3

GND5ID4

S1

SH

1S

2S

H2

S3

SH

3S

4S

H4

S5

SH

5S

6S

H6

R13 49.9K

C3

1.0 uF

J4

CON 5x1No Load

12345

R374.7K

C30

1.0 uF

C8

1.0 uF

UART_RXUART_TX

UART_CTS

P5LP2_1P5LP2_0

P5LP2_2P5LP2_3P5LP2_4

P5LP1_2

P5LP_SIO_VREFP5LP1_4

P5LP12_5I2C_SCLI2C_SDAUART_RXUART_TX


UART_CTS


KP_DMKP_DP

VTARG_MEAS

USB_V_SENSE

P5LP_SIO_VREF

P5

LP

3_

0

P5LP1_4

USB_V_SENSE

P5LP0_1P5LP0_2

P5LP12_5

SWDCLK

P5LP1_2

UART_RXVTARG_MEASP5LP3_4

UART_TX

P5LP3_6

SWDIO

P5LP3_5

P5LP2_4P5LP2_3P5LP2_2P5LP2_1P5LP2_0

KP_DMKP_DP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PSoC 4100S Plus Device

CMODCSH CintB

CapSense Capacitors

CintA

SAR bypassCapacitor

Decoupling Capacitors Reset

Test Points* User Interfaces

UART TX

UART RX

UART RX

UART TX

Current Measurement

Communication Lines

I2C SCL

I2C SDA

Voltage Distribution

ECO Crystal WCO Crystal

I2C Pull Ups

*All Test Points are No Load

VDDD VCCDVDDA

VDDA VCCDVDDD

VDDD

VDDA

VDDD

VCCD

VDDD VDDA

VDDD VCCD

VDDD

VTARG VDDD

P0_0P0_1P0_2P0_3P0_4P0_5P0_6P0_7

P1_0P1_1P1_2P1_3P1_4P1_5P1_6P1_7

P2_0P2_1P2_2P2_3P2_4P2_5P2_6P2_7

P3_0P3_1P3_2P3_3P3_4P3_5P3_6P3_7

P4_0P4_1P4_2P4_3P4_4P4_5P4_6P4_7

P5_0P5_1P5_2P5_3P5_5P5_6P5_7

P6_0P6_1P6_2P6_4P6_5

P7_0P7_1

RESET

UART_RX

UART_TX

BLE_RX

BLE_TX

BLE_SDA

I2C_SDA

I2C_SCL

BLE_SCL

BLE_XRES

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4


PSoC 4100S

NMIT RKAD

SCH Title :


Date: Sheet of


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Drawn By


Approved By

630-60476-01 04


A4


PSoC 4100S

NMIT RKAD

SCH Title :


Date: Sheet of


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Drawn By


Approved By

630-60476-01 04


A4


PSoC 4100S

NMIT RKAD

R45 0 OHMNo Load

R5 0 OHM

R440 OHM

C72200pF

R404.7K

TP2RED

R4

15K

R9 560 ohm

J3 HDR2

No Load

12

R17 0 OHMNo Load

C2

0.1 uFNo Load

R8 0 OHM

R510 OHM

C610 nF

C1

1.0 uF

0805

LED1

User LED BLUE

R52 0 OHMNo Load

TP4REDTP1RED

R18 0 OHMNo Load

R434.7K

C28 12 pF

R53 0 OHM

R49 0 OHM

C26 12 pF

CY8C4147AZI-S475

U2

P0.039

P0.140

P0.241

P0.342

P0.443

P0.544

P0.645

P0.746

P1.058

P1.159

P1.260

P1.361

P1.462

P1.563

P1.664

P1.71

P2.02

P2.13

P2.24

P2.35

P2.46

P2.57

P2.68

P2.79

XRES47

P4.027

P4.128

P4.229

P4.330

P4.431

P4.532

P4.633

P4.734

P5.051

P5.152

P5.253

P5.354

P5.555

P5.635

P5.736

P6.012

P6.113

P6.214

P6.415

P6.516

P7.037

P7.138

NC11

VC

CD

48

VD

DA

56

VD

DD

26

VD

DD

50

VS

SA

57

VS

SD

10

VS

SD

17

VS

SD

49

P3.018

P3.119

P3.220

P3.321

P3.422

P3.523

P3.624

P3.725 C18 18 pF

No Load

C12470pF

SW2

SKRPACE010

1 4

2 3

R41 0 OHM

R47 0 OHM

C29

1.0 uF

Y132.768KHz

No Load

C38

0.1 uF

C13470pF

R48 0 OHM

C19 36 pF

No Load

R3 0 OHM

C11

0.1 uF

SW1

SKRPACE010

1 4

2 3

Y24 MHz

R42 0 OHM

C23

0.1 uF

R6 0 OHM

R46 0 OHMNo Load

C37

1.0 uF

TP6RED

C27

10 uFC25

0.1 uF

XRES_L

P4_0 P4_1

P1_7

RESET

P3_4

P3_7

RESET

P3_0P3_1

P3_0

P3_1

P5_0

P5_1

P7_1

P7_0

XRES_L

P4_3P4_2

XTAL_4M_IN

XTAL_4M_IN

XTAL_4M_OUT

XTAL_4M_OUTXTAL_32K_OUT

XTAL_32K_IN

P0_4 XTAL_32K_IN

P0_5 XTAL_32K_OUT

P0_6

P0_7

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Slider 0 LED

Slider 1 LED

Slider 2 LED

Slider 3 LED

Slider 4 LED

Button 1 Rx

Button Tx

Button 2 Rx

Button 0 RxButton 0 LED

Button 1 LED

Button 2 LED

CapSense Slider

CapSense Buttons

Slider 5 LED

Slider Tx

Slider 4 Rx

Slider 2 Rx

Slider 3 Rx

Slider 1 Rx

Slider 0 Rx

Slider 5 Rx

Shield

Other Peripherals for CapSense Slider

Other Peripherals for CapSense Buttons

Shield

All CapSense Buttons are applicable for both SelfCapacitance and Mutual Capacitance operation

CapSense Slider is applicable for both SelfCapacitance and Mutual Capacitance operation

VDDD

VDDD

VDDD

VDDD

VDDD

VDDDP6_0

P2_7

P5_7

P5_5

P5_2

P4_4

P4_5

P4_6

P0_2

P6_4

P6_5

P6_1

P6_2

P6_0P6_1P6_2

P1_4

P1_2

P2_2

P1_6

P2_7

P1_0

P6_5P6_4

P2_0

P5_5

P5_2

P0_2

P4_6

P5_7

P4_5P4_4

P2_5

P0_1

P1_1

P2_2

P2_0

P1_6

P1_4

P1_2

P1_0

P2_5

P1_1

P0_1

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4


CapSense

NMIT RKAD

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4


CapSense

NMIT RKAD

SCH Title :


Date: Sheet of


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Drawn By


Approved By

630-60476-01 04


A4


CapSense

NMIT RKAD

C40

1.0 uF

R28 2k

R31 2k

R23 820 ohm

CSB2

Cap_Button_Medium

Tx1

Rx2

0805

LED12

Green LED

R580 OHM

No Load

R30 2k

0805

LED9

Green LED

R54 2k

R62 820 ohm

R29 2k

0805

LED13

Green LED

R19 820 ohm

C1710 pF25VNo Load

R59 2k

CSB3

Cap_Button_Big

Tx1

Rx2

J9

CON30

123456789101112131415161718192021222324252627282930

0805

LED5

Green LED

0805

LED10

Green LED

C42

0.1 uF

CSB1

Cap_Button_Small

Tx1

Rx2

R20 820 ohm

CAP_SH1

SH1

R56 2k

0805

LED6

Green LED

R24 820 ohm

C43

1.0 uF

C3910 pF25VNo Load

R250 OHM

No Load

CSS1

CapSense Linear Slider 6 Seg

11

22

33

44

55

7

TX

66

R21 820 ohm

R260 OHM

0805

LED7

Green LED

CAP_SH2

SH1

R27 2k

J10

CON30

123456789101112131415161718192021222324252627282930

R60 820 ohm

R33 2kR22 820 ohm

0805

LED11

Green LED

C41

0.1 uF

0805

LED8

Green LED

R32 2k

R570 OHM

R55 2k

R61 820 ohm

HATCH1

HATCH2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

I/O Headers

EZ-BLE Module

Programming/Debug

EZ-BLE

I2C_SCLI2C_SDA

UART RXUART TX

BLE TXBLE RX

User ButtonUser LED

SAR Bypass

*All Test Points are No Load

VDDAVDDD

VDDD

BLE_VDD

BLE_VDDR

BLE_VDD

BLE_VDD

BLE_VDDR

VTARG

BLE_VDD BLE_VDDR

VTARG

P0_0P0_1P0_2P0_3P0_4P0_5P0_6P0_7

P1_0P1_1P1_2P1_3P1_4P1_5P1_6P1_7

P2_1P2_2P2_3P2_4P2_5P2_6P2_7

P3_0P3_1P3_2

RESET

P4_0P4_1P4_2P4_3P4_4P4_5P4_6P4_7

P5_0P5_1P5_2P5_3

P6_5

P5_5

P5_6P5_7

P6_0

P6_2P6_1

P6_4

P7_0P7_1

P3_5 P3_6P3_4P3_3

P3_7

P2_0

BLE_TXBLE_RX

BLE_XRES

BLE_SCLBLE_SDA

SWDCLK

SWDIO

P3_7

P3_6

P3_2

P3_3

SWDIOSWDCLKRESET

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4



NMIT RKAD

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4



NMIT RKAD

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4



NMIT RKAD

TP3RED

R16

560 ohm

0805

LED4

User LED BLUE

J2

CON30

123456789101112131415161718192021222324252627282930

J5

HDR 1x5

No Load

11

3322

44

55

U3

CYBLE-022001-00

GND11

P4.12

P5.13

P5.04

VDDR5

P1.6

6P

0.7

7P

0.4

8P

0.5

9G

ND

210

P0.6

11

P1.7

12

VD

D13

XR

ES

14

P3.5

15

P3.4

16

P3.7

17

P1.418 P1.519 P3.620 P4.021

TP7

J1

CON30

123456789

101112131415161718192021222324252627282930

SW4

DPDT

12

3

45

6

SH

1

SH

2

SH

3

SH

4

R35 0 OHM

L2

330 OHM @ 100MHzL1

330 OHM @ 100MHz

R34 0 OHMNo Load

TP5RED

SW_BLE

SW_BLE

BLE_P0_5

BLE_P0_4

BLE_P1_6

BLE_P0_4

BLE_SWDCLK

BLE_P1_6

BLE_VDD

BLE_SWDCLK

BLE_SWDIO

BLE_SWDIO

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

08/08/2017

DESCRIPTIONRev

01

Initial Release

DATE

REVISION HISTORY

08/14/201702

Testing

03

Beta Release

09/08/2017

04

Alpha Release

10/4/2017

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4

7 7Thursday, October 05, 2017

Revision History

NMIT RKAD

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4


Revision History

NMIT RKAD

SCH Title :


Date: Sheet of


Page Title :

Drawn By


Approved By

630-60476-01 04


A4


Revision History

NMIT RKAD

Documents

CY8CKIT-149 PSoC 4100S Plus Prototyping Kit · 5 5 4 4 3 3 2 2 1 1 D D C C B B A A CY8CKIT-149 PSoC 4100S Plus Prototyping Kit PAGE DESCRIPTION 01 Title, Table of Contents & Drawing