Csci 136 Computer Architecture IICsci 136 Computer Architecture II– – More onMore on MIPS ISA MIPS ISA

Xiuzhen Chengcheng@gwu.edu

Announcement

Project #1 is due on 11:59PM, Feb 13, 2005.

What is an ISA?

A very important abstractionProvide the interface between the low-level software and hardware

May have multiple hardware implementations

Needs to answer the following questionsWhat is the minimum instruction set to be supported?

Use general purpose register or not?

CIRS or RISC design?

Instruction format?

Addressing mode?

… …

Summary: Salient features of MIPS

• 32-bit fixed format inst (3 formats)

• 32 32-bit GPR (R0 contains zero) and 32 FP registers (and HI LO)

–3-address, reg-reg arithmetic instr.

• Single addressing mode for load/store: base+displacement– no indirection, scaled

• 16-bit immediate plus LUI

• Simple branch conditions

– compare against zero or two registers for =,– no integer condition codes

Summary: MIPS Instruction set design

Use general purpose registers with a load-store architecture: yes or no?

Provide 32 general purpose registers plus separate floating-point registers:

What’s the addressing mode supported by MIPS?

An ISA uses fixed instruction encoding if interested in performance and use variable instruction encoding if interested in code size. What does MIPS ISA do?

Summary: MIPS Instruction set designSupport these data sizes and types: 8-bit, 16-bit, 32-bit

integers and 32-bit and 64-bit IEEE 754 floating point numbers:

Support these simple instructions, since they will dominate the number of instructions executed: load, store, add, subtract, move register-register, and, shift, compare equal, compare not equal, branch, jump, call, and return:

Aim for a minimalist instruction set:

More Details of MIPS ISA

Register 0 always has the value 0 even if you try to write it

Branch and jump use the PC+4 as the reference point

All instructions change all 32 bits of the destination register (including lui, lb, lh) and use all 32 bits of source register

Immediate arithmetic and logical instructions are extended as follows:

Logical immediate are zero-extended to 32 bits

Arithmetic immediate are sign-extended to 32 bits

The data loaded by the instructions lb and lh are extended as follows:

lbu, lhu are zero-extended

lb, lh are sign-extended

Overflow can occur in add, sub, addi, but does not in other arithmetic and logical operations

MIPS Hardware Design Principles

Simplicity favors regularityKeeping the hardware simple!

R-Type instruction format

Smaller is faster32 general purpose registers, no more, no less.

Good design demands good compromisesR, I, J, 3 types of instruction formats

Make the common case fast!I-type instructions for constant numbers

Symbolic Assembly Form

<Label> <Mnemonic> <OperandExp> … <OperandExp> <Comment>

Loop: slti $t0, $s1, 100 # if $s1<100 then $t0=1; else $t0=0

Label: optionalLocation reference of an instruction

Often starts in the 1st column and ends with “:”

Mnemonic: symbolic name for operations to be performed which directs assembler to

Arithmetic, data transfer, logic, branch, etc

OperandExp: value or address of an operand

Comments: Don’t forget me!

MIPS Assembly Language

Refer to the Companion CD.

Pseudo-instructionProvided by assembler but not implemented by hardwareDisintegrated by assembler to one or more instructionsExample: blt $16, $17, Less

slt $1, $16, $17bne $1, $0, Less

DirectivesTells assembler how to interpret or where to put code; no machine code is generated.Examples:

str1: .ascii “I am a string”str2: .asciiz “I am a null-terminated string”

.byte 8, 12, 16

.word 8, 12, 16

.space 12 # allocate 12 bytes in data segment

.data # put the following in data segment

.text # put the following in text segment

.align 2 # put the following value on word boundary

Compiler, Assembler, Linker, Loader

The compiler takes one or more source programs and converts them to an assembly program

The assembler takes an assembly program and converts it to machine code: an object file (or a library)

The linker takes multiple object files and libraries, decides memory layout and resolves references to convert them to a single program: an executable (or executable file)

The loader takes an executable, stores it in memory, initializes the segments and stacks, and jumps to the initial part of the program. The loader also calls exit once the program completes.

MIPS Memory Layout (1/2)

0x00000000 0x00

0x00000001 0xA0

0x00000002 0x3E

0x00000003 0x10

… … … …

0xFFFFFFFC 0x90

0xFFFFFFFD 0x6F

0xFFFFFFFE 0xA1

0xFFFFFFFF 0x00

Memory Organization

Reserved

Text segment

--Data segment—

… … … … …

Stack segment

MIPS Memory Layout

Instructions

0x00400000

0x10000000

$sp 0x7FFFFFFF

Dynamic data

Static data

$gp 0x10008000

MIPS Memory Layout (2/2)

How to load a word in the data segment at address 0x10010020 into register $s0?

lw/sw can not directly reference data objects with their 16-bit offset fields

lui $t0 0x1001lw $s0, 0x0020($t0)

Global pointer $gp points to 0x10008000lw $s0, 0x8020($gp)

Assembler

Convert an assembly language instruction to a machine language instruction: fill fields of the machine instruction for the assembly language instruction

Compute space for data statements, and store data in binary representation

Put information for placing instructions in memory – see object file format

Example: j loopFill op code: 00 0010Fill address field corresponding to the local label (loop in this eg)

Questions: How to find the address of a local or an external label?

Local Label Address Resolution

Assembler reads the program twiceFirst Pass: If an instruction has a label, add an entry <label, memory address of the instruction> in the symbol table

Second Pass: if an instruction branches to a label, search for an entry with that label in the symbol table and resolve the label address

Produce machine code

External label can not be assembled! – need help from linker!

Assembler reads the program onceProduce machine code

If an instruction has a unresolved label, record the label and the instruction address in the backpatch table. After the label is defined, the assembler consults the backpatch table to correct all binary representation of the instructions with that label.

Object File Format

Object file headerSize and position of each piece of the file

Text segmentMachine language instructions

Data segmentBinary representation of the data in the source file

Relocation informationIdentifies instruction and data words that depend on the absolute addresses; In MIPS, only lw/sw and jal needs absolute address.

Symbol tableGlobal symbols defined in the file

External references in the file

Debugging information

Example Object files

Object file header

Name Procedure A

Text Size 0x100

Data size 0x20

Text Segment Address Instruction

0 lw $a0, 0($gp)

4 jal 0

… …

Data segment 0 (X)

… …

Relocation information Address Instruction Type Dependency

0 lw X

4 jal B

Symbol Table Label Address

X –

B –

Linker

Why needs a linker?Save computing resources and time!

A linker converts all object files to an executable file

Resolve external symbols in all filesUse symbol table in all files

Search libraries for library functions

Assign address to data and instruction in all filesPlace data and text segments of a file relative to other files

Determine size of text and data segments for the program

Linking Object Files – An Example

Object file header

Name Procedure A

Text Size 0x100

Data size 0x20

Text Segment Address Instruction

0 lw $a0, 0($gp)

4 jal 0

… …

Data segment 0 (X)

… …

Relocation information Address Instruction Type Dependency

0 lw X

4 jal B

Symbol Table Label Address

X –

B –

The 2nd Object File

Object file header

Name Procedure B

Text Size 0x200

Data size 0x30

Text Segment Address Instruction

0 sw $a1, 0($gp)

4 jal 0

… …

Data segment 0 (Y)

… …

Relocation information Address Instruction Type Dependency

0 sw Y

4 jal A

Symbol Table Label Address

Y –

A –

Solution

Executable file header

Text size 0x300

Data size 0x50

Text segment Address Instruction

0x0040 0000 Lw $a0, 0x8000($gp)

0x0040 0004 Jal 0x0040 0100

… …

0x0040 0100 Sw $a1, 0x8020($sp)

0x0040 0104 Jal 0x0040 0000

… …

Data segment Address

0x1000 0000 (x)

… …

0x1000 0020 (Y)

… …

Loader

A loader starts execution of a programDetermine the size of text and data through executable’s header

Allocate enough memory for text and data

Copy data and text into the allocated memory

Initialize registersStack pointer

Copy parameters to registers and stack

Branch to the 1st instruction in the program

Processor Fetch-Execute Cycle

Instruction

Fetch

Instruction

Decode

Operand

Fetch

Execute

Result

Store

Next

Instruction

Obtain instruction from program storage

Determine required actions and instruction size

Locate and obtain operand data

Compute result value or status

Deposit results in storage for later use

Determine successor instruction

Example: Reverse a String (2/1)

Write a MIPS procedure to reverse a null-terminated character string. Assume the address of the string is in $a0 and the address of the reversed string is in $a1. Also assume the spaces needed by the reversed string have been pre-allocated.

Example: Reverse a String (2/2)Write a MIPS procedure to reverse a null-terminated character string. Assume the address of the string is in $a0 and the address of the reversed string is in $a1. Also assume the spaces needed by the reversed string have been pre-allocated.

reverseStr:addiu $sp, $sp, -32sw $s0, 16($sp)sw $s1, 20($sp)

move $s0, $a0move $s1, $a1

addi $sp, $sp, -1sb $zero, 0($sp)

push: lbu $t0, 0($s0)beq $t0, $zero, popaddi $s0, $s0, 1addi $sp, $sp, -1sb $t0, 0($sp)j push

pop: lbu $t0, 0($sp)addi $sp, $sp, 1sb $t0, 0($s1)beq $t0, $zero, doneaddi $s1, $s1, 1j pop

done: lw $s0, 16($sp)lw $s1, 20($sp)addi $sp, $sp, 32jr $ra

Questions?