CS3502: Data and Computer Networks DATA LINK LAYER - 1

CS3502:CS3502:

Data and Computer NetworksData and Computer Networks

DATA LINK LAYER - 1 DATA LINK LAYER - 1

data link layer : objectives data link layer : objectives

thorough understanding of DL layer -- where/how it fits into network/other layers

service it provides (to higher layers)

services it uses (from lower layer)

synchronous/asynchronous transmission

error detection and correction

describe flow control protocols: sliding window

specify/verify basic DL protocols

elementary performance analysis of DL protocols

data link layer data link layer

phys. layer subject to errors; not reliable; and only moves information as bits, which alone are not meaningful. DL layer adds these, and combines bits into frames, or messages.

purpose of DL: transform unreliable physical bit stream into reliable data communications link...

PHY + DL = DATA COMMUNICATIONS MAC layer (media access control) - takes

place of DL layer in LANs (together with LLC)

data link layer : functionsdata link layer : functions

framing and frame synchronization frames marked by sync/async technique

error control

flow control

addressing

control information, data on same link (unlike EIA232)

link management (3 phases)

data link layer : framingdata link layer : framing

bits must be grouped into frames or messages

frames marked by synchronous transmission: frame starts, ends with a special flag pattern

Meathods Character Count

Start + End Characters

Flags

Physical Layer Code Violation

Finite state machine for Bit stuff flag 011110

data link layer : framingdata link layer : framing

allows bits to be grouped into fields, subgroups; two main types are data and control bits.

several types of control bits; some for error detection and/or correction

addressing

flow control

other control type information

data link layer : error controldata link layer : error control

3 basic techniques in this course (more complex techniques exist) parity checking

very simple and easy error detection

CRC - cyclic redundancy check more complex, but very effective and efficient

Hamming code limited error correction; based on complex

combinations of parity checks

data link layer : parity checkingdata link layer : parity checking

to a group of data bits add a single extra bit, known as the parity bit. This bit is chosen to make the total number of 1s in the group even (or odd). Called even (odd) parity checking.

example: data bits 0011001; add parity bit 1 --->00110011.

exercise: construct a FSM to (1) output correct parity bit(2) read a string and decide parity

data link layer : parity checkingdata link layer : parity checking

what is the problem with simple parity checking as described? (show how to fool it)

X X X P LRC - double parity checks improve this

X X X X PX X X X PX X X X PP P P P P

show how to fool this error check improves error probability by factor of 102 -

104

data link layer : error data link layer : error probabilitiesprobabilitieslet PB = Prob [single bit error];

then (1 - PB ) = Prob [no error]

for group of Nb bits, define P1 : Prob[no errors]

P2 : Prob[undetected error]

P3 : Prob[detected error]

By definition, P1 + P2 + P3 = 1

data link layer : error data link layer : error probabilitiesprobabilities

examples in a 10 bit word, what is P[only bit 3 wrong]?

P[exactly 1 error]? P[exactly 3 errors]?

P[at most 3 errors]? P[3 errors or more]?

P[3 bit burst error, with other 7 bits correct]?


Case 1: no error detectionThen what are these 3 probabilities for Case 1?

P1 = Pr [no error] =

P2 = Pr [undetected error] =

P3 = Pr [detected error] =

example


Case 2: error detection using parity bit for even parity, even # errors goes undetected;

so P2 is Pr(even # of errors)

P1 = (1 - PB)Nb

P2 = NbC2a Pb 2a (1-Pb)Nb-2a

P3 = 1- P2 - P1

hint: what is Pr(1 error)? Pr(2 errors)? ... k errors?

a=1

Nb/2


frame probabilities, parity checking given a frame, sent as a sequence of

words/bytes, each with a parity check. What are Pf1, Pf2, and Pf3?

Pf1 = probability of no error in the whole frame

Pf2 = probability of an undetected error and nodetected error anywhere else in the frame

Pf3 = probability of an detected error

Nb = no.bits/word; Nc = no.words/frame.

Pf1 = P1Nc

where: P1 is the probability of no error in a word

Pf2 = NcCi P2 i [ (1-Pb)Nb]Nc -i

where: P2 is the probability of undetected error in a word

Pb is the probability there is an error in a bit

Pf3 = 1 - Pf1 - Pf2


i=1

Nc

error checking : CRC error checking : CRC

stronger error check needed

idea: insert a group of bits in the frame, which serve as as more powerful check.

added bits (frame check sequence, FCS) cause the resulting frame to be exactly divisible by a predetermined number.

modulo-2 arithmetic used; binary addition with no carries examples

error checking : CRCerror checking : CRC

let M denote data message, k bits longto M, add F, the FCS, which is n bits long

resulting transmitted frame is T,

T = 2n M + F = M| F

is evenly divisible by some pattern P, a sequence of (n + 1) bits.

Q: how is F calculated from M and P?


F is n bits, pattern P is (n + 1) bits 1st, last bits of P must be 1 FCS F computed from M, P:

F = remainder R, when dividing

2n M / P = Q + R

note: this “division” is modulo-2, no carries

example : let M = 110011; k = 6; n = 3; p = 1001. Find F and T. (answer next page)


quotient Q = 110101; remainder R = 101; so T = 110011101.

check: divide T by P, R should be 0.

example : M = 1010001101; P = 110101. Find F, T. Then check it.


CRC summary all single and double bit errors all odd numbers of errors all burst errors smaller than n most larger burst errors If error detected, frame is retransmitted; does

NOT correct error. both CRC and parity checking widely used;

CRC used in many network protocols, in addition to data link layer, including most LANs.

CRC can be implemented efficiently in hardware... computation done bit by bit

error checking : CRC error checking : CRC implementationimplementation

shift register, XOR gates 1 XOR gate for each “1” in pattern P, minus

1. (n-1) 1-bit shift registers example : show logic circuit for P - 110101.

error checking : Hamming error checking : Hamming codecode

correct a single bit error detect multiple errors extended parity checking; ie, redundant

parity bits

Idea: parity bits appear in positions corresponding

to the nodes of a binary tree; data bits appear in positions corresponding to the leafs. If a bit is in error, the other bits “point” to it by their related positions in the tree.


each parity bit appears in a position corresponding to a power of 2: k = 0,1,2,4,8,16,...

bits checked by parity bit in position n are: 1. itself2. continue for next n bits (including itself)3. off (don’t check) next n bits4. on (check) the next n bits

and continue to end of message.

Example: for the data 1101101, show Hamming coded mesage.


How is single error bit detected?

example: suppose 111100010101 is received. 1st parity bit, position 1:

2nd parity bit, position 2: 3rd parity bit, position 4: 4th parity bit, position 8: 0 parity bit, position 0:

result:


example: suppose 0111011 received; is it correct?

Q: for a n-bit message, approximately how many bits are needed?

Summary, error correction: more complex codes correct multiple errors require more redundancy, overhead. Also more time...

so not widely used in communications. do have a place in longer distance communications --

eg, deep space, etc. In fact could be critical to long distance (time) communications

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CS3502: Data and Computer Networks DATA LINK LAYER - 1