• Course update (technical, CIM)• Quiz• Wires, Ground loops• Thermal considerations• Energy• PCB Layout 

6.101 Spring 2020 Lecture 12 1

6.101 Course Update

• Course information source:– Course website mit.edu/6.101– Note will be posted on piazza when new information on course website is posted

• Staff communications– Zoom/Video conference– Piazza– Email– Telephone

6.101 Spring 2020 Lecture 11 2

6.101 Spring 2020 Lecture 12 3

Revised Calendar

Course Update• Lab 5, lab 6: physical lab replaced with LTspice

simulation. Lab posted.

• Quiz: Open book quiz, 3+1 hour limit, date selected by class poll:  Wed 4/7,  Thu,  Fri 9p‐1am EST– Lpset 1‐5, Labs 1‐5, Lecture 1‐12; upload answers by 1am

• Final project (Technical)– Single person or team – Proposal, block diagram, checklist, etc.. review/conferences as 

scheduled  (video conference)– Design verified with LTspice– PCB layout required but not fab

• Up to $100 budget for project– Can order from Digikey (need to setup business account under 

MIT)

6.101 Spring 2020 Lecture 11 4

Ordering Parts

• Up to $100 budget for project• Ordering from Digikey: 

– setup business account under MIT– Email tax exemption certificate to salestax@digikey.com– Ship to home address– Email gim@mit.edu and negarr@mit.edu for approval– Applies to PCB.  

• Reimbursement via direct deposit.

6.101 Spring 2020 Lecture 11 5

OS ‐ ECAD

OS Number

Windows 14

macOS 8

Ubuntu 1

ECAD Number

KiCad 14

Circuitmaker 8

Eagle 2

Altium (student license)

1

6.101 Spring 2020 Lecture 12 6

Final Project

6.101 Spring 2020 Lecture 12 7

Final Project (CIM)

• Abstract and proposal uploaded as scheduled• Design presentation review with Dave and Laura• Project Design Presentations (Tue/Thu during class time) ‐ attendance required

• Final report due last day of class.  Extensions can be granted to Friday.

6.101 Spring 2020 Lecture 11 8

6.101 Spring 2020 Lecture 12 9

Wires Theory vs Reality 

6.101 Spring 2020 9

30-50mv voltage drop in chip

power supply noise

Signal Grounds

6.101 Spring 2020 Lecture 12 10

www.analog.com/library/analogdialogue/archives/43-09/edch%2012%20pc%20issues.pdf

Signal Grounds

6.101 Spring 2020 Lecture 12 11

www.analog.com/library/analogdialogue/archives/43-09/edch%2012%20pc%20issues.pdf

Power Line Connection

6.101 Spring 2020 Lecture 12 12

*Bill Whitlock, Understanding, Finding, & Eliminating Ground Loops In Audio & Video Systems

6.101 Spring 2020Lecture 12 13

AD Supply Voltages Consideration

• AVDD Positive Analog Supply Voltage

• AVSS Analog Ground

• DVDD Positive Digital Supply Voltage

• DVSS Digital Ground

dtdv

c ci

Noise caused by current spikes in fast switching digital circuits:

6.101 Spring 2020 Lecture 12 14

Digital/Analog Grounds

analogcircuit

digitallogic

AVdd DVdd

LM 4550

+Vin

-

digital groundDVss

analog groundAVss

n signals

Connect the grounds at a single place

digital logicanalog

circuit

6.101 Spring 2020 Lecture 12 15

Teensy 3.2 Top

6.101 Spring 2020 Lecture 12 16

Teensy 3.2

6.101 Spring 2020 Lecture 5 16

Noise ‐ Unavoidable

• Noise – generated:  switching power supplies, high current output stage

• Noise – picked up: 60 hz,  broadcast signal; conducted: ground pickup, system clocks

6.101 Spring 2020 Lecture 12 17

6.101 Spring 2020 Lecture 12 18

Junction (Silicon) TemperatureSimple Scenario

Tj-Ta= RJA PD

Silicon

RJA is the thermal resistance between silicon and Ambient

RJAPD

Tj= Ta RJA PD

Make this as low as possible

Realistic Scenario

RJCPD

RCA = RCS + RSA

SinkCase

Silicon

TJ

TA

TJ

TCTS

TATJ

TC

TS

TA

RCS

RSA

is minimized by facilitating heat transfer (bolt case to extended metal surface – heat sink)

*

Heatsinks

6.101 Spring 2020 Lecture 12 19

Insulators

Mounting screw insulated from metal tab!

*http://thompsona20armstronga4830a.wordpress.com/2011/11/21/heat-sink-mounting-kit-for-to-220-4880/

Thermal Grease

6.101 Spring 2020 Lecture 12 20

Improves thermal conductivity – less is better (why?)

6.101 Spring 2020 Lecture 12 21

Problem: Energy Consumption

Moore’s law for batteries… snails pace!Today: Understand where power goes

and ways to manage it

What can One Jouleof energy do?

Send a 1 Megabyte file over 802.11b

Operate a processor for ~ 7s

The Energy Problem7.5 cm3

AA batteryAlkaline: ~10,000J

Mow your lawn for

1 ms

Credit: Anantha Chandraksan 22Lecture 12

http://pubs.rsc.org/is/content/articlehtml/2011/ee/c0ee00777c

(40+ lbs)Battery

Trends: Energy Scavenging

Jose Mur Miranda/ Jeff Lang

Vibration-to-Electric Conversion

~ 10W

MEMS Generator Power Harvesting Shoes

Joe Paradiso(Media Lab)

After 3-6 steps, it provides 3 mA for 0.5 sec

~10mW

23Lecture 12

Low-Profile Wearable Body-Powered Thermoelectric Generator

• Low profile, lightweight, conformal.• Utilization of small temperature difference• Utilization of natural convection for cooling

Credit: Krishna Settaluri MIT ‘201024Lecture 12

Experimental Results

15mV

Optimal Electrical Load Resistance 33Ω(20Ω theoretical)

Optimized Power 11µW

16 TEG Islands (2 TEG modules)Credit: Krishna Settaluri MIT ‘2010

25Lecture 12

RF Enery Harvesting

6.101 Spring 2020 Lecture 12 26

Resistor High Frequency Performance

• Metal film resistors have coils of metallic film

• Surface mount resistors have a higher parallel capacitance

6.101 Spring 2020 Lecture 12 27

C

L

Capacitors – Frequency Limitations

Type Max Frequency

Aluminum Electrolytic 100kHz

Tantalum Electrolytic 1MHz

Mica 500MHz

Ceramic 1GHz

6.101 Spring 2020 Lecture 12 28

C

L

Use HP Impedance Bridge to measure

Inductors*  High Frequency Performance

• DC resistance of windings

• Capacitance between turns of wires and layers of wires

6.101 Spring 2020 Lecture 12 29

L

C

Use HP Impedance Bridge to measure

* RF choke

6.101 Spring 2020 Lecture 12 30

Reliability

•  Product of – stress factor (2x safety factor recommended)

• capacitor operating voltage• resistor power rating

– temperature factor– the environment factor

• shock, vibration• packaging

– the quality factor– the adjustment factor

PCB – Printed Circuit Board

• Invented by Paul Eisler circa 1930’s• Used in WW 2 radios• Released after WW 2 for commerical use by US Army

• General commercial use in 1950’s• Zenith Radio/TV last to implement PCB’s in manufacturing process – 1960’s

6.101 Spring 2020 Lecture 12 31

Zenith Marketing Spin

6.101 Spring 2020 Lecture 12 32

PCB – Printed Circuit Board

• FR‐4 glass epoxy, high strength a elevated temperature, self extinguishing

• FR “Flame retardant”• Type two layer or four (or more) PCB• 1oz PCB:  (1oz cu per sq ft)• Silkscreen: labels components on PCB • Solder mask: lacquer like polymer applied to prevent solder bridges and oxidation

6.101 Spring 2020 Lecture 12 33

PCB Files

• Netlist: a text file describing connectivity of the design

• Gerber file: de facto standard used by PCB industry software to describe the printed circuit board images: copper layers, solder mask, legend, drill holes

6.101 Spring 2020 Lecture 12 34

PCB General Rules

• Where ever possible, make the botton layer a ground plane

• Be careful of autorouters – all grounds not the same!• Coupling between traces: incidental capacitive 

coupling;  0.75mm x 7.5mm run with 0.188 thickness creates a 1pF cap

• Cross talk• Trace resistance : 10mil trace  0.048ohm/inch for 1oz 

Cu  (35um thickness, 1cm cu cube = 1.7uohm) • Avoid 90 deg turns,  use 45 deg turns

6.101 Spring 2020 Lecture 12 35

PCB Trace

6.101 Spring 2020 Lecture 12 36

• PCB trace are transmissions lines• 90 deg corners results in reflections• Use 45 deg turns

http://www.ti.com/sc/docs/apps/msp/journal/aug2000/aug_09.pdf

PCB Design Software

• KiCad– Open source (Windows, 

OSX, Linux)– Schematic capture– Up 32 layers with 

routing for differential piars

– 3D viewer

6.101 Spring 2020 Lecture 12 37

• Altium ‐ CircuitMaker– Windows only– Design must be open sourced – Internet link required

• Eagle (cadsoft)– Free download available (Eagle 

light ‐Windows, OSX, Linux)– Limitations:

• The useable board area is limited to 100 x 80 mm (4 x 3.2 inches).

• Only two signal layers can be used (top and bottom).

• The schematic editor can only create one sheet.

6.101 Spring 2020 Lecture 12 38

PCB Sources

• www.smart‐prototyping.com (China)– 10 boards,  10cm x 10cm 2 layer $9.90  + $20 shipping– Typically 7 day delivery via AIR– Accepts Gerber files

•  www.PCBWay.com– 10 boards, 10cm x 10cm 2 layer $5 + $25, – shipping is 3‐5 days,– Accepts Gerber files

Surface Mount Technology

• Higher component density• Simpler and faster automated assembly = 

lower manfacturing costs• Lower component costs

6.101 Spring 2020 Lecture 12 39

• Terminology:  – capacitors and resistors:  length x width

0805 (0.079in x 0.049in  = 2.0mm x1.25mm– Transistors:  SOT   Small Outline Transistor– IC’s: SOIC   Small Outline Integrated Circuit– BGA: Ball Grid Array

6.101 Spring 2020 Lecture 12 40

SMT Board Example

• Surface mount a 1.4 watt class D stereo amplifier

• 1206 components

• USB powered

• 84% efficiency at 400mw

• Short circuit and thermal protection

PCB Layout Process

• Schematic capture • Component footprint selection • Netlist generation • Board layout • Gerber files generation

6.101 Spring 2020 Lecture 12 41

https://www.youtube.com/watch?v=l9b_6WLemmg

6.101 Spring 2020 Lecture 12 42

Questions?

6.101 Spring 2020 Lecture 12 43