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Control code in the memory (The flow chart of the control code shown in Fig.-8.2) Pyroelect ric transduce r Input port/buffer Temporary memory-1 Analog to digital converter Digital to analog converter Motor Output port/buffer W O R K S P A C E Microprocessor Limit switch-1 Input port/buffer Temporary memory-2 Analog to digital converter Limit switch-2 Input port/buffer Temporary memory-3 Analog to digital converter External memory Microprocessor / microcontrolle r is a digital device composed of millio-ns of transis-tors within a single wafer or single sem- iconductor piece. It is called a Very Large Scale Integ-rated (VLSI) chip that represent the heart of control applications. The based control solution facilitate higher integration providing incredible performance. They take less space and also consume low power.

Control code in the memory (The flow chart of the control code shown in Fig.-8.2)

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External memory. Microprocessor. Output port/buffer. Control code in the memory (The flow chart of the control code shown in Fig.-8.2). W O R K S P A C E. Temporary memory-3. Temporary memory-1. Temporary memory-2. Limit switch-1. Pyroelectric transducer. Limit - PowerPoint PPT Presentation

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Page 1: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Control code in the memory

(The flow chart of the control code

shown in Fig.-8.2)

Pyroelectric transducer

Input port/buffer

Temporary memory-1

Analog to digital converter

Digital to analogconverter

Motor

Output port/buffer

W O R K S P A C E

Microprocessor

Limit switch-1

Input port/buffer

Temporary memory-2

Analog to digital converter

Limit switch-2

Input port/buffer

Temporary memory-3

Analog to digital converter

External memory

Microprocessor/microcontroller is a digital device composed of millio-ns of transis-tors within a single wafer or single sem-iconductor piece. It is called a Very Large Scale Integ-rated (VLSI) chip that represent the heart of control applications. The microprocessor and microcontroller

based control solution facilitate higher integration providing incredible performance. They take less space and also consume low power.

Page 2: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Is temporary memory-1 is full?

Yes

No

Turn on the motorReset the temporary memory -1

Is temporary memory-2 is full?

Yes

No

Stop the motorReset temporary memory-2

Wait for 5 seconds

Start

Rotate the motor in reverse direction

Is temporary memory-3 is full?

No

Yes

Stop the motorReset the temporary memory-3

Control code of a typical automatic door (in flow chart form). The control system automatically opens the door when a person approaches, and automatically closes. An electric motor based actuator fitted with other auxiliary electronics and mechanical components, is responsible for sliding the door on the rail.

Page 3: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

0000

0001

0002

0003

0004

0005

0006

0007

03FA

03FB

03FC

03FD

03FE

03FF

Memory device Its address

D

E

C

O

D

E

R

CCV GGV

RD WR

Address lines/pins (Unidirectional)

Data lines (bi-directional)

CE

A memory is a physical device where program, data etc. are stored. The contains many memory locations. Each location is defined in terms of an address, which is a unique number within a particular microprocessor-based control application. The figure illustrates a memory device whose address space is 0000 to 03FF. The length of the address space of this chip is 1 K bytes.

Page 4: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( PMicroprocessor

MemoryHolding the program

Memory Select Signal

Address path

Data or Instruction path

2000

2001

2002

2003

2004

2005

2006

2007

2008

2009

200A

200B

200C

200D

200E

200F

Address

A program is a logical sequence of instructions that directs the microprocessor to perform a desired task. Once a program is developed, it is stored in the memory sequentially. In a typical example, if the program resides in the memory locations 2000H to 200FH, then the microprocessor addresses the locations and fetches program codes from the memory, one by one.

Page 5: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( P8-bit Temporary registers

16-bit Temporary registers

The CPU require some temporary storage cells so that intermediate data can be stored temporarily, either for data transaction or for latter use. The temporary storage cells are called temporary registers.

Page 6: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( P Input Buffer 10011100

1 0 0 1 1 1 0 0

Memory holding a data byte

Data Register

1 0 0 1 1 1 0 0

Data Register is a special register, which holds data when they are fetched from the memory or input devices

Page 7: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

FD

3C

59

76

59

)( P

Memory

DECODER

0000

0001

0002

2003

AddressInstruction decoder

Address=0002

Instruction register

Instruction OPCODE = 59

Control signals

Instruction Register (IR) only accommodates instructions. The user written program (OPCODE) flows from the memory into the microprocessor in sequence. The OPCODE is placed in the IR. In this typical example, the OPCODE 59 (‘01011001’) located at memory location 0002H has been fetched and placed in the IR of the microprocessor.

Page 8: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Input Buffer

External Input devices

)( P

Internal Registers

Output Buffer

To External Output devices

Buffers are registers, which hold data or address those come in and go out of the microprocessor. The difference between the buffer and other registers in the microprocessor is that the data or address is first entered into the input buffer and then transferred to a specified register. Similarly, the data are sent out from any register(s) to the outside world via output buffer. The buffers are apparently some sorts of I/O (Input/Output) ports.

Page 9: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( P Program Counter

0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0

MemoryHolding the program

2000

2001

2002

2003

2004

2005

2006

2007

2008

2009

200A

200B

200C

200D

200E

200F

Address

D

E

C

O

D

E

R

0 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0

Decoder selects location 200C

Memory address register

of the PC (the next address) is transferred to the memory and decoded in order to get the next item of the executable code. The next item could be a data or an instruction. The content of the Program Counter is placed on the Memory Address Register (MAR) before the address is transferred to the decoder of the memory device.

Program Counter (PC) is a register that holds the addr-ess of the next instruction. At the end of the execution of the current instruct-ion, the content

Page 10: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( P

Flag Register

C P Z S X X X X

Flag Bits

Sigh Bit

C = Carry BitP = Parity BitZ = Zero BitS = Sign BitX = This Bit not in use (don’t care)

)( P

0 0 0 0 0 0 0 0 0 1 1 0 X X X X

Accumulator (ACC) Flag Register

(a)

(b)

The flag register in the microprocessor is a special purpose register in which the individual bit values represents the standing of a result byte. The flag bits are automatically modified in accordance with the result and the type of operation performed.

Page 11: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

State

Crystal frequency

Microprocessor operates at this frequency

OSCf

2OSCf

The microprocessor processes data at a rate, which is determined by the clock signal (crystal output) it has been provided with. The time required to complete a read (fetch) and write cycle is measured in terms of state. The state is related to the clock frequency of the microprocessor and it is half of the crystal frequency.

Page 12: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Unidirectional Bus

Bi-directionalbus

A typical unit within the microprocessor

)( P

Bus can be used in multiplexed mode

Internal bus

External

Another Unit

Registers

every unit within the microprocessor. Some buses are bi-directional and some are unidirectional, meaning the bi-directional buses transfers data in both directions, where as unidirectional buses carries data in only one direction. Buses, which carry address and data are called address-bus and data-bus, respectively. They may be external or internal. Some busses are used in multiplexed mode.

OPCODE, operands and address bytes are transferred through bus. A bus is a transmitting media consisting of group of lines. The number of lines are usually 8, 16, 32, etc. They connect each and

Page 13: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Instruction Register

OPCODE From Memory

)( P

Control Signals other units of the microprocessor

Instruction decoder(Microcode Engine)

The OPCODE is decoded to generate control signals for ‘what to do next’. As a result a unique set of control signal is generated. If the instruction is for addition, then addition related control signals are produced. If the OPCODE is a comparison instruction, then comparison related control signals are produced.

Page 14: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( P

Analog to

Digital Converter

SENSOR

Interrupt pin of the Microprocessor

Interrupt pin of A/D converter

Interrupt line

Interrupt acknowledge pin of the Microprocessor

Interrupt pin-2

Interrupt pin-n

In a typical microprocessor-based control implementation usually the external input devices such as sensors, A/D converters, Input ports, Programmable Interrupt Controller (PIC), Direct Memory Access Controller (DMAC), etc. are interfaced with the microprocessor through some special lines called interrupt lines or interrupt pins, and these lines are input lines. The data transformation is called interrupt-driven data transformation.

Page 15: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( P200C

BEFORE INTERRRUPT

PC

8D

3000

SP

A Register

MemoryHolding the

Main program

2000

2001

2002

2003

2004

2005

2006

2007

2008

2009

200A

200B

200C

200D

200E

200F

Address

D

E

C

O

D

E

R

Stack

300A

3009

3008

3007

3006

3005

3004

3003

3002

3001

3000

Address

DECODER

Interrupt Subroutine

5000

5001

5002

5003

5004

5005

5006

5007

5008

5009

500A

500B

500C

500D

500E

500F

Address

D

E

C

O

D

E

R

Stack is a user defined memory space, which includes many locations within the memory space of the micropr-ocessor. These memory locati-

ons are special in the sense that when interrupts occur, the micr-oprocessor stores the current content of the various registers and flags in the

stack in order to attend the interrupt.

Before interruption

Page 16: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

)( P5000

AFTER INTERRRUPT

PC

SP

A Register

MemoryHolding the

Main program

2000

2001

2002

2003

2004

2005

2006

2007

2008

2009

200A

200B

200C

200D

200E

200F

Address

D

E

C

O

D

E

R

8D

20

0C

Stack

300A

3009

3008

3007

3006

3005

3004

3003

3002

3001

3000

Address

DECODER

Interrupt Subroutine

5000

5001

5002

5003

5004

5005

5006

5007

5008

5009

500A

500B

500C

500D

500E

500F

Address

D

E

C

O

D

E

R

3002

After interruption

Page 17: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

ALU

Register set

Program Counter

Stack Pointer

Microcode Engine

Memory Address Register (MAR)

To Memory and I/O

To Memory and Output

Accumulator

Instruction Register (IR)

Control signals

Flag bits

Bus

Unidirectional Bus

Bi-directional Bus

Data Register (DR)

Data pathAddress path

Address path

)( P

CCVGroundRD WR

RD

setReClock

Minimum configuration of a typical microprocessor

Page 18: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Serial I/O Control UnitInterrupt Control Unit

Accumulator (ACC)

Address Buffer

C

Temporary Register

Instruction register

InstructionDecoder

Timing and Control unit

Clockout RD

WRALE 10 SS IO/M HLDA RESETOUT

RESETIN

HLD READY

B

E D

L H

PC

SP

Incrementer/Decrementer

Address/Data Buffer

158 AA 70 ADAD

ALU

SID SODTRAP RST 7.5 RST 6.5 RST 5.5 INTRA INTR

Intel’s 8085A Microprocessor Architecture

Page 19: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

State-1(send address)

2OSCf

State-2(Read)

State-3(Fetch)

Fetch cycle

addressssend

tousedADAD 70 datasendto

usedADAD 70

70 ADAD Data are transferred from and into the microprocessor through 8 lines, i.e., through pins. Thus are used in multiplexed mode; they carry both data and address. Within a fetch cycle the address is sent during the first state of the cycle. During the second state the content of the specified memory location is read and during the third state the content is transferred into the microprocessor through the same lines/pins.

70 ADAD

70 ADAD

Page 20: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

CPU CPU

CPU

ALURegister set

BuffersInstruction decoder

Control UnitPC, SP

Interrupt controllerSID/SOD Unit

Busses(a)

(b) (c)

The microprocessor or microcontroller might contain one or more CPUs as

(a) Microprocessor with one CPU.(b) with two CPUs.(c) with three CPUs

Page 21: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

CPU

ALURegister set

BuffersInstruction decoder

Control UnitPC, SP

Interrupt controllerSID/SOD Unit

Busses

A/D converterMemory controller Programmable timer

Pulse width modulatorDigital I/O

Phase locked loopMemory controller

EPROM, ROM (a)

(b)

CPU CPU

As far as architecture is concerned, microcontroller, unlike microprocessor, contains many additional peripheral units along with the common functional

units. The functional units are arithmetic and logic unit, Register sets, Program Counter, Stack Pointer, Control Circuitry, etc. These common and basic functional units are required to interpret and execute instructions or program. The additional units are called peripheral

units. These include A/D converter, Programmable timer, Pulse width Modulator, Phase locked loop, Memory controller, EPROM, ROM , etc.

Page 22: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Microprocessor

Signal conditioning circuits and interfacing

(Peripheral Units)

= SENSORS (Encoder, switch)

= ACRUATOR (motor)

PLANT

Microcontroller

= SENSORS (Encoder, switch)

= ACRUATOR (motor)

PLANT

In microprocessor-based solution the external units have to be integrated or interfaced, requiring additional task and connectivity. On the other hand microcontroller-based control design do not require additional peripheral units since they have been built into

the processor chip. They are more reliable, since little or fewer additional connections and interfacings are required thus reducing part size and enhancing real-time performance and efficiency.

Page 23: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

A/D Converter

S/H

MUX

Register file

512 bytes in KC1024 bytes in KD

RALU

Microcode engine

Clock

Interrupt Controller

PTS

OTPROM16K – KC32K - KD

MemoryController

Queue

Port 0

PWM

WatchdogTimer

Port 2 Multiplexure

Serial Port

BoudRate Generator

T2CAPT

Timer 2Timer 1

HighSpeed I/O

Port 1

HIS HSO Port 1

Reference frequency

Port 2

A/D Port 0

Control Signals

Port 3

Port 4HOLDHOLDA

BREQ

PWM 1

PWM 2

AddressData Bus

V (Ref) ANGND

Architecture of Intel’s 8CX196KC/KD Microcontroller

Page 24: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Register RAM

Register File

SFR

Master PC with Incrementer

Upper word registerWith Shifter

Lower word Register With Shifter

Program Status Word(PSW)

PSW control

6-bit Loop CounterWith Decrementer

2nd Operand Register

Constants

3-bit Select Register

Instruction Register

Microcode Engine

MUX

A B

ALU

BUSCONTROLLER

MUX

Memory Bus

QueueSlave

PCAddressRegister

DataRegister

InterruptController

CPU ControlAnd status signals

CPU

RALU Memory Controller

CPU BUSSES

16

8

Core Units of the 8CX196KC/KD Microcontroller

Page 25: Control code in  the memory (The flow chart of  the control code shown  in Fig.-8.2)

Input Output(ON/OFF)

Input

Module

Relays

Output

Module

Relays

CPU

Memory

Programmable Logic Controllers (PLC) have long been used in the industrial automation platform. The primary reason for designing such a device was to facilitate communication capability and to replace the sluggish relay based control systems. The PLCs have been applied for factory automation, machine control, process control, instrumentation, data acquisition and control and many manufacturing systems

The building blocks of a typical PLC