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COMPUTER ORGANIZATIONS CSNB123 CHAPTER 10 INSTRUCTION SETS CSNB123 COMPUTER ORGANIZATION May 2014 Systems and Networking 1

COMPUTER ORGANIZATIONS CSNB123 May 2014Systems and Networking1

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Page 1: COMPUTER ORGANIZATIONS CSNB123 May 2014Systems and Networking1

COMPUTER ORGANIZATIONSCSNB123

Systems and Networking 1

CHAPTER 10 INSTRUCTION SETSCSNB123 COMPUTER ORGANIZATION

May 2014

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Expected Course Outcome# Course Outcome Coverage

1 Explain the concepts that underlie modern computer architecture, its evolution, functions and organization.

2 Identify the best organization of a computer for achieving the best performance when asked to make a selection from the current market.

3 Demonstrate the flow of an instruction cycle. 4 Differentiate types of memory components in terms of its technology

and usage.5 Convert integer and floating point numbers to its internal data

representation.6 Construct a series of computer instructions to perform low-level

processor operations.

7 Explain the RISC and CISC computers, and single core and multi-core computers

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Architecture

• Attributes visible to the programmer Instruction set Number of bits used

for data representation

I/O mechanisms Addressing

techniques

Recap Chapter 1

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Machine Instruction CharacteristicsTerm DescriptionMachine instruction / computer instructions

Instruction which is executed by processor

Processor’s instruction set

Collection of different instructions that the processor can execute

• Each instruction must contain the information required by the processor for execution

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Machine Instruction Characteristics (Cont.)

• Elements of Machine Instruction (MI)Elements DescriptionOperation code (opcode)

specifies the operation to be performedADD, SUB

Source operand reference

operands that are inputs for the operation

Result operand reference

the operation may produce a result

Next instruction reference

tell processor where to fetch the next instruction after the execution of this instruction is complete

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Simple Instruction Format

• Instruction is represented by a sequence of bits• During instruction execution, an instruction is read into an

instruction register (IR) in the processor.• The processor must be able to extract the data from the various

instruction fields to perform the required operation• Opcodes are presented by abbreviations-mnemonics-that indicate

the operation ..why do this …hard to remember code in binary form

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Simple Instruction Format (Cont.)• Operands also represented symbolically • Example:

Add the value contained in the location Y to the contents of register R

Y=refer to the address of a location in memory R=refers to a particular register

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ADD R,Y

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Instruction Types• HLL language instruction in BASIC• Instruct the computer to add the value stored

in Y to the value stored in X and put the result in X.

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X=513, Y=514X=X + Y

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Instruction Types (Cont.)

Simple instruction sets• Load a register with the contents of memory

location 513• Add the contents of memory location 514 to

the register• Store the contents of the register in memory

location 513May 2014

X=513, Y=514X=X + Y

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Instruction Types (Cont.)Category DescriptionData processing Arithmetic and logic instructionsData storage Movement of data into or out of register

and or memory locationsData movement I/O instructionsControl-test and branch instructions

• Test instructions are used to test the value of a data word or the status of the operation

• Branch instructions are used to branch to a different set of instructions depending on the decision made

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Number of Address• Address refer to location that store the value

of the operands• In most architecture, most instructions have

1,2 or 3 operand addresses

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Example

Y=(A-B)/[C+(DXE)]

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3 address instructions• Each instruction specifies two source operand

locations and a destination operation location• Operand 1, Operand 2, Result• Not common since they require a relatively

long instructions format to hold the three address references

• T = temporary location-to store intermediary result

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Example

Y=(A-B)/[C+(DXE)]

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Instruction CommentSUB Y, A, B Y A-BMPY T, D, E T D * EADD T, T, C T T + CDIV Y, Y, T Y Y / T

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2 address instructions• Each instruction specifies both an operand

and the result location• Operand 1, Operand 2, Result• MOVE – is used to move one of the values to a

result/temp loc before performing the operation

• Reduce space for address

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Example

Y=(A-B)/[C+(DXE)]

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Instruction CommentMOVE Y, A Y ASUB Y, B Y Y – BMOVE T, D T DMPY T, E T T * EADD T, C T T + CDIV Y, T Y Y / T

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1 address instructions• Second address must be implicit (hidden)• Common in earlier machines- the implied

address being a processor register known as the accumulator (AC)

• The AC contains one of the operands and is used to store the result

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Example

Y=(A-B)/[C+(DXE)]

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Instruction CommentLOAD D AC DMPY E AC AC * EADD C AC AC + CSTOR Y Y AC LOAD A AC ASUB B AC AC – BDIV Y AC AC / YSTOR Y Y AC

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0 address instructions• All address must be implicit (hidden)• Stack-based operations

last-in-first-out (LIFO) set of locations Interact with the stack using PUSH and POP

operations • PUSH – to push a data from memory onto the stack• POP – to pop out data from the stack to a memory

location

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ExampleY=(A-B)/[C+(DXE)]

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InstructionPUSH APUSH BSUBPUSH CPUSH EPUSH DMPYADDDIVPOP

A

PUSH BPUSH A

A

B

A

SUB

A

PUSH C

C

A

PUSH D

C

D

APUSH E

C

D

E

A

C

MPY

D

A

C

ADDA DIVPOP

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Number of Address (Cont.)• Fewer address

require less complex processor Instruction become shorter But contain more total instructions-longer

execution time

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Number of Address (Cont.)• Multiple address instructions – have multiple

general purpose register • Register references are faster than memory

references – speed up the execution• Most contemporary machine employ a

mixture of 2 and 3 address instructions

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Types of Operands• Categories of data

Addresses Numbers• Integer/floating point

Characters• ASCII etc.

Logical data• 0/1-false/true

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Types of Operations• Data transfer• Arithmetic • Logical• Conversion• I/O• Transfer of control

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Refer to Table 9.3

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Types of Operations (Cont.)

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Types of Operations (Cont.)

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Control Operations• Branch/jump instruction

Sequential Unconditional branch Conditional branch

• Skip• Subroutine / procedure call

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Control Operations - Branch• Has one of its operands the address of the next

instruction to be executed• A sequence of code in a computer program which

is conditionally executed depending on whether the flow of control is altered or not (at the branching point) Conditional – the branch is made only if a certain

condition is met Unconditional – a branch instruction in which the

branch is always taken May 2014

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Control Operations - Branch (Cont.)Branch Explanation

Sequential • Normal execution• One instruction after the

otherUnconditional branch

• Non-sequential• instruction at the

designated address is unconditionally executed

Conditional branch

• Non-sequential• A branch is made

conditionally to another instruction address.

• If the condition is true, the instruction at the designated address is executed.

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Control Operations - Skip• Useful in loop control• Implies that next instruction to be skipped

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Control Operations – Subroutine• Also known as procedure call• A self-contained computer program that is incorporated into

a larger program• At any point in the program, the procedure may be called or

invoked• The processor is instructed to go and execute the entire

procedure and then return to the point from which the call took place

• A procedure allow the same piece of code to be used many times

• Involves two basic instructions; call and return instruction

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Control Operations – Subroutine (Cont.)

Call instruction• Instructions that branches

from the present location to the procedure

Return instruction• Instruction that returns

from the procedure to the place from which it was called

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Control Operations – Subroutine (Cont.)

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Additional Reference• William Stallings, Computer Organization and

Architecture: Designing for Performance, 8th. Edition, Prentice-Hall Inc., 2010

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This teaching material is belongs to

Systems and Networking DepartmentCollege of Information Technology

Universiti Tenaga Nasional (UNITEN)Malaysia

2014