CMOS太赫兹源与探测器的发展与挑战 - ChinaMTA

CMOS太赫兹源与探测器的发展与挑战

徐雷钧（教授、博导）

江苏大学电气信息工程学院

汇报提纲

11 CMOS工艺的优势与缺陷

12

CMOS工艺在太赫兹频段的挑战13

CMOS太赫兹源与探测器发展现状

14 课题组相关研究进展介绍

15 CMOS太赫兹集成电路展望

一、CMOS工艺的优势与缺陷

• 集成度高（工艺发展快-5nm）

• 成本低

• 易于模数混合单片集成（SoC）

实现大规模商业化应用

优势

[1] K. Sengupta, T. Nagatsuma, and D. M. Mittleman, “Terahertz integrated

electronic and hybrid electronic-photonic systems,” Nature Electronics, vol. 1, no.

12, pp. 622-635, Dec 2018.

一、CMOS工艺的优势与缺陷

• 晶体管截止/最大频率fmax难以提升

• 太赫兹频段，硅衬底高损耗性

• 多层金属工艺的设计规则限制了版图最优设计

缺陷

[1] K. Sengupta, T. Nagatsuma, and D. M. Mittleman, “Terahertz

integrated electronic and hybrid electronic-photonic systems,”

Nature Electronics, vol. 1, no. 12, pp. 622-635, Dec 2018.

太赫兹源设计指标：高输出功率、高DC-to-THz转换效率、具有一定调频范围等。

二、CMOS太赫兹源与探测器发展现状

CMOS太赫兹源实现方式

倍频器

振荡器

[2] P. Hillger, J. Grzyb, R. Jain, and U. R. Pfeiffer, “Terahertz Imaging and Sensing Applications

With Silicon-Based Technologies,” IEEE Trans. THz Sci. Technol., vol. 9, no. 1, pp. 1-19, 2019.

三点式LC 差分LC

Push-Push振荡器的基波信号相互抵消，而二次谐波由于相位相同会叠加输出。


振荡器1的输出：

振荡器2的输出：

双推端口输出：

1 0

0

( ) cos( )n nV t a n t

2 0

0

( ) co s( )n nV t a n t n

out 1 2 0

2,4,...

( )= ( ) ( ) 2 cos( )n n

n

V t V t V t a n t

基本Push-Push振荡器结构原理图

Yin1 Yin2

Vout(t)

YL

V1(t) V2(t)

A

Triple-Push振荡器类似，三次谐波同相叠加输出。


国内太赫兹源研究

Tech. Freq.

(GHz)

Tuning Range

(%)

Output Power

(dBm)

Phase Noise

(dBc/Hz@10MHz)

DC Power

(mW)

28nm CMOS 169.6 21.7 -9.2 -109.33 95

[4] Y. Shu, H. J. Qian, and X. Luo, “A 169.6-GHz Low Phase Noise and Wideband Hybrid Mode-Switching Push–Push Oscillator,” IEEE Trans. Microw. Theory Techn., vol.

67, no. 7, pp. 2769-2781, 2019.


Tech. Freq.

(GHz)

Prad

(mW)

EIRP

(dBm)

Tuning

Range (%)

Phase Noise

(dBc/Hz@1MHz)

DC Power

(mW)

DC-to-RF

(%)

65nm

CMOS

312 1.2 10.5 1.3 -96 300 0.42国内太赫兹源研究

[3] L. Wu, S. Liao, and Q. Xue, “A 312-GHz CMOS Injection-Locked Radiator With Chip-and-Package Distributed Antenna,” IEEE J. Solid-State Circuits, vol. 52, no.

11, pp. 2920-2933, 2017.


国外太赫兹源研究

Tech. Freq.

(GHz)

Max. Output

Power (dBm)

Phase Noise

(dBc/Hz@1MHz)

DC-to-RF

(%)

Tuning Range

(%)

DC

Power

(mW)

65nm

CMOS

215 5.6 -94.6 4.6 0.65 79

[5] R. Kananizadeh and O. Momeni, “High-Power and High-Efficiency Millimeter-Wave Harmonic Oscillator Design, Exploiting Harmonic Positive Feedback in CMOS,” IEEE Trans.

Microw. Theory Techn., vol. 65, no. 10, pp. 3922-3936, 2017.



Technology Frequency

(GHz)

Tuning Range

(%)

Max. Radiated Power

(dBm)

DC-to-THz

(%)

65nm CMOS 610.6 2.3 -25.2 0.01

[9] Z. Chen, Z. Chen, W. Choi, and O. K. K, “610-GHz Fourth Harmonic Signal Reactively Generated in a CMOS Voltage Controlled Oscillator Using Differentially Pumped

Varactors,” IEEE Solid-State Circuits Lett., vol. 3, pp. 46-49, 2020.


国外太赫兹源研究（a）（b）

（c）

Tech. Freq.

(GHz)

Output

Power (dBm)

Tuning

Range (%)

Phase Noise

(dBc/Hz@1MHz)

DC Power

(mW)

DC-to-

RF (%)

Single-ended 65nm

CMOS

213 -1 NA -93.4 11.5 6.87

Differential -0.92 NA -90.9 23.6 6.86

VCO -6.93 2.3 -93 3.36 6.02

[6] H. Wang, J. Chen, J. T. S. Do, H. Rashtian, and X. Liu, “High-Efficiency Millimeter-Wave Single-Ended and Differential Fundamental Oscillators in CMOS,” IEEE J. Solid-State

Circuits, vol. 53, no. 8, pp. 2151-2163, 2018.



Tech. Freq.

(GHz)

Max. Output

Power (dBm)

Min. Phase Noise

(dBc/Hz@10MHz)

Tuning

Range (%)

DC-to-RF

(%)

DC Power

(mW)

65nm

CMOS

229 3.4 -105.8 8.35 1.16 195

[8] H. Jalili and O. Momeni, “A 230-GHz High-Power and Wideband Coupled Standing Wave VCO in 65-nm CMOS,” IEEE J. Solid-State Circuits, vol. 55, no. 3, pp.

547-556, 2020.



Tech. Freq.

(GHz)

Prad

(dBm)

Tuning Range

(%)

DC-to-RF

(%)

EIRP

(dBm)

DC Power

(mW)

40nm CMOS 531.5 -12 0.9 0.024 2.3 260

[7] K. Guo, Y. Zhang, and P. Reynaert, “A 0.53-THz Subharmonic Injection-Locked Phased Array With 63-𝜇W Radiated Power in 40-nm CMOS,” IEEE J. Solid-State Circuits,

vol. 54, no. 2, pp. 380-391, 2019.

CMOS太赫兹源发展现状总结：


Push-Push/3推Colpitts

阵列注入锁定驻波耦合

······

输出/辐射功率：-27dBm 5.6dBm

(560GHz) (215GHz)

基本结构增强措施

[3] L. Wu, S. Liao, and Q. Xue, “A 312-GHz CMOS Injection-Locked Radiator With Chip-and-Package Distributed Antenna,” IEEE J. Solid-State Circuits, vol. 52, no. 11, pp.

2920-2933, 2017.

[4] Y. Shu, H. J. Qian, and X. Luo, “A 169.6-GHz Low Phase Noise and Wideband Hybrid Mode-Switching Push–Push Oscillator,” IEEE Trans. Microw. Theory Techn., vol.

67, no. 7, pp. 2769-2781, 2019.

[5] R. Kananizadeh and O. Momeni, “High-Power and High-Efficiency Millimeter-Wave Harmonic Oscillator Design, Exploiting Harmonic Positive Feedback in CMOS,”

IEEE Trans. Microw. Theory Techn., vol. 65, no. 10, pp. 3922-3936, 2017.

[6] H. Wang, J. Chen, J. T. S. Do, H. Rashtian, and X. Liu, “High-Efficiency Millimeter-Wave Single-Ended and Differential Fundamental Oscillators in CMOS,” IEEE J.

Solid-State Circuits, vol. 53, no. 8, pp. 2151-2163, 2018.

[7] K. Guo, Y. Zhang, and P. Reynaert, “A 0.53-THz Subharmonic Injection-Locked Phased Array With 63-𝜇W Radiated Power in 40-nm CMOS,” IEEE J. Solid-State Circuits,

vol. 54, no. 2, pp. 380-391, 2019.

[8] H. Jalili and O. Momeni, “A 230-GHz High-Power and Wideband Coupled Standing Wave VCO in 65-nm CMOS,” IEEE J. Solid-State Circuits, vol. 55, no. 3, pp. 547-

556, 2020.

[9] Z. Chen, Z. Chen, W. Choi, and O. K. K, “610-GHz Fourth Harmonic Signal Reactively Generated in a CMOS Voltage Controlled Oscillator Using Differentially Pumped

Varactors,” IEEE Solid-State Circuits Lett., vol. 3, pp. 46-49, 2020.

[10] F. Golcuk, O. D. Gurbuz, and G. M. Rebeiz, “A 0.39–0.44 THz 2x4 Amplifier-Quadrupler Array With Peak EIRP of 3–4 dBm,” IEEE Trans. Microw. Theory Techn., vol.

61, no. 12, pp. 4483-4491, 2013.

[11] R. Han and E. Afshari, “A CMOS High-Power Broadband 260-GHz Radiator Array for Spectroscopy,” IEEE J. Solid-State Circuits, vol. 48, no. 12, pp. 3090-3104, 2013.

[12] Y. Tousi and E. Afshari, “A High-Power and Scalable 2-D Phased Array for Terahertz CMOS Integrated Systems,” IEEE J. Solid-State Circuits, vol. 50, no. 2, pp. 597-609,

2015.

[13] Y. Yang, O. D. Gurbuz, and G. M. Rebeiz, “An Eight-Element 370–410-GHz Phased-Array Transmitter in 45-nm CMOS SOI With Peak EIRP of 8–8.5 dBm,” IEEE Trans.

Microw. Theory Techn., vol. 64, no. 12, pp. 4241-4249, 2016.

[14] Y. Zhao et al., “A 0.56 THz Phase-Locked Frequency Synthesizer in 65 nm CMOS Technology,” IEEE J. Solid-State Circuits, vol. 51, no. 12, pp. 3005-3019, 2016.

[15] K. Guo, A. Standaert, and P. Reynaert, “A 525–556-GHz Radiating Source With a Dielectric Lens Antenna in 28-nm CMOS,” IEEE Trans. THz Sci. Technol., vol. 8, no. 3,

pp. 340-349, 2018.


太赫兹探测器灵敏度的改善一直是研究工作的重点！


太赫兹探测器实现方式

直接混频探测

外差混频探测

[2] P. Hillger, J. Grzyb, R. Jain, and U. R. Pfeiffer, “Terahertz Imaging and Sensing Applications

With Silicon-Based Technologies,” IEEE Trans. THz Sci. Technol., vol. 9, no. 1, pp. 1-19, 2019.

MOS器件直接混频（自混频）探测原理

工作原理图

CMOS or HEMT

0 gds dsi G V （V）g g g

= cos

= cos +

ds ds ds ds ds

g g

V V V V V

V V V V V

（）

（）

背景电流

光电流0 g ds 0 g g

1+ cos

2ds dsi G G V （V）V （V） V （）

a.选用电子迁移率较高的材料

b.设计高效的太赫兹混频天线

栅控能力天线耦合效率


MOS器件直接混频（自混频）探测原理

工作原理图

180nm CMOS

Dyakonov-Shur理论： thgs

RF

VV

VU

4

2



国内太赫兹探测器研究

Technology Frequency Ws (nm) Responsivity

(kV/W)

NEP

(pW/Hz1/2)

180nm CMOS 650GHz 20 3.8 13.1

40 5.5 9.1

[18] Q. Yang, X. Ji, Y. Xu, and F. Yan, “Improved performance of CMOS terahertz detectors by reducing MOSFET parasitic capacitance,” IEEE Access, vol. 7, pp.

9783-9789, 2019.




(GHz)

Max. Responsivity

(kV/W)

Min. NEP

(pW/Hz1/2)

Array

180nm CMOS 860 3.3 106 3×5

[17] Z. Liu, L. Liu, J. Yang, and N. Wu, “A CMOS fully integrated 860-GHz terahertz sensor,” IEEE Trans. THz Sci. Technol., vol. 7, no. 4, pp. 455-465, July 2017.




(THz)

Responsivity

（V/W）NEP

（nW/Hz1/2）Single-transistor 55nm CMOS 2.58 40.2 1.1

Four-transistor

paralleled

62.9 4

[19] D. Shang, Y. Xing, and P. Sun, “Short-channel MOSFET for terahertz wave detection fabricated in 55 nm silicon CMOS process technology,” Electron. Lett.,

vol. 55, no. 25, pp. 1357-1358, 2019.



[16] C. Li, C. Ko, M. Kuo, and D. Chang, “A 340-GHz heterodyne receiver front end in 40-nm CMOS for THz biomedical imaging applications,” IEEE Trans. THz

Sci. Technol., vol. 6, no. 4, pp. 625-636, July 2016.


(GHz)

CG

(dB)

NF

(dB)

DC Power

(mW)

40nm CMOS 335.8 -1.7 23.2 53.1


国外太赫兹探测器研究

[20] M. Khatib and M. Perenzoni, “Response Optimization of Antenna-Coupled FET Detectors for 0.85-to-1-THz Imaging,” IEEE Microw.Wireless Compon. Lett., vol. 28, no.

10, pp. 903-905, 2018.




(GHz)

Max.CG

(dB)

Min.Sensitivity

(dBm)

DC Power

(mW)

65nm CMOS 50-280 -20 -73 34

[21] B. Jamali and A. Babakhani, “A Fully Integrated 50–280-GHz Frequency Comb Detector for Coherent Broadband Sensing,” IEEE Trans. THz Sci. Technol., vol. 9, no.

6, pp. 613-623, 2019.




(GHz)

Responsivity

(kV/W)

NEP

(pW/Hz1/2)

DC Power

(mW)

65nm CMOS 483-496 140 1.2 26

[22] K. Choi, D. R. Utomo, and S. Lee, “A Fully Integrated 490-GHz CMOS Heterodyne Imager Adopting Second Subharmonic Resistive Mixer Structure,” IEEE

Microw.Wireless Compon. Lett., vol. 29, no. 10, pp. 673-676, 2019.



[23] Z. Hu, C. Wang, and R. Han, “A 32-Unit 240-GHz Heterodyne Receiver Array in 65-nm CMOS With Array-Wide Phase Locking,” IEEE J. Solid-State Circuits, vol.

54, no. 5, pp. 1216-1227, 2019.


(GHz)

CG

(dB)

Sensitivity

(dBm)

DC Power

(mW)

65nm CMOS 240 -39.8 -102 980

太赫兹探测器发展现状总结：


直接混频探测外差混频探测

多像素阵列集成硅透镜

······

灵敏度：-53.9dBm/ Hz -150.8dBm/Hz

(2.58THz) (335.8GHz)

基本结构增强措施

[16] C. Li, C. Ko, M. Kuo, and D. Chang, “A 340-GHz heterodyne receiver front end in 40-nm CMOS for THz biomedical imaging applications,” IEEE Trans. THz Sci.

Technol., vol. 6, no. 4, pp. 625-636, July 2016.

[17] Z. Liu, L. Liu, J. Yang, and N. Wu, “A CMOS fully integrated 860-GHz terahertz sensor,” IEEE Trans. THz Sci. Technol., vol. 7, no. 4, pp. 455-465, July 2017.

[18] Q. Yang, X. Ji, Y. Xu, and F. Yan, “Improved performance of CMOS terahertz detectors by reducing MOSFET parasitic capacitance,” IEEE Access, vol. 7, pp. 9783-9789,

2019.

[19] D. Shang, Y. Xing, and P. Sun, “Short-channel MOSFET for terahertz wave detection fabricated in 55 nm silicon CMOS process technology,” Electron. Lett., vol. 55, no.

25, pp. 1357-1358, 2019.

[20] M. Khatib and M. Perenzoni, “Response Optimization of Antenna-Coupled FET Detectors for 0.85-to-1-THz Imaging,” IEEE Microw.Wireless Compon. Lett., vol. 28, no.

10, pp. 903-905, 2018.

[21] B. Jamali and A. Babakhani, “A Fully Integrated 50–280-GHz Frequency Comb Detector for Coherent Broadband Sensing,” IEEE Trans. THz Sci. Technol., vol. 9, no. 6,

pp. 613-623, 2019.

[22] K. Choi, D. R. Utomo, and S. Lee, “A Fully Integrated 490-GHz CMOS Heterodyne Imager Adopting Second Subharmonic Resistive Mixer Structure,” IEEE

Microw.Wireless Compon. Lett., vol. 29, no. 10, pp. 673-676, 2019.

[23] Z. Hu, C. Wang, and R. Han, “A 32-Unit 240-GHz Heterodyne Receiver Array in 65-nm CMOS With Array-Wide Phase Locking,” IEEE J. Solid-State Circuits, vol. 54,

no. 5, pp. 1216-1227, 2019.

[24] S. Boppel et al., “CMOS Integrated Antenna-Coupled Field-Effect Transistors for the Detection of Radiation From 0.2 to 4.3 THz,” IEEE Trans. Microw. Theory Techn.,

vol. 60, no. 12, pp. 3834-3843, 2012.

[25] R. A. Hadi et al., “A 1k-Pixel video camera for 0.7–1.1 terahertz imaging applications in 65-nm CMOS,” IEEE J. Solid-State Circuits, vol. 47, no. 12, pp. 2999-3012,

Dec. 2012.

[26] G. Károlyi, D. Gergelyi, and P. Földesy, “Sub-THz Sensor Array With Embedded Signal Processing in 90 nm CMOS Technology,” IEEE Sens. J., vol. 14, no. 8, pp. 2432-

2441, 2014.

[27] S. V. Thyagarajan, S. Kang, and A. M. Niknejad, “A 240 GHz Fully Integrated Wideband QPSK Receiver in 65 nm CMOS,” IEEE J. Solid-State Circuits, vol. 50, no. 10,

pp. 2268-2280, 2015.


三、CMOS工艺在太赫兹频段的挑战

• BEOL结构（Back-End-of-Line）的CMOS工艺，随着工艺尺寸的不断缩小，

金属层与高损耗硅衬底之间的距离也越来越近，对片上天线的增益，辐射

效率等性能提出了很大挑战（设计规则限制）。

三、CMOS工艺在太赫兹频段的挑战

• 晶体管的fmax较低，严重限制了太赫兹

源的输出功率，DC-to-THz转换效率等。

• 片上天线与太赫兹探测器之间的匹配程

度影响着太赫兹探测器的灵敏度，匹配

设计也是实现高灵敏度太赫兹探测器的

难点所在。

四、课题组相关研究进展介绍

4.1 研究目标传统太赫兹探测设备（如THz-TDS）体积较为庞大，价格昂贵，不利于实现大量商业化生产。

课题组根据CMOS集成电路易集成，成本低等特点，研究小型便携式太赫兹探测系统。

（b）固态电路的太赫兹探测系统结构（a）基于光学方法的太赫兹时域探测系统


4.2 直接混频探测器基本结构

Antenna

Rs

Antenna

Cgd

bV

outV

Rs

bV

outV

共源结构共栅结构


（1.1）设计了四种不同结构的太赫兹直接混频探测电路

4.3 研究成果

TLVb

In1_1

In1_2

In2_1

In2_2

Out

TLVb

In1

In2

Out

TL

In

Vb

Out

Detector4Detector2Detector1

TL

In

Vb

Out

Detector3


（1.2）探测器1双环差分天线模型及其S11仿真结果

4.3 研究成果

双环差分天线

TLVb

In1_1

In1_2

In2_1

In2_2

Out

应用电路天线S11


（1.3）探测器2圆形开槽天线模型及其S11仿真结果

4.3 研究成果

圆形开槽天线应用电路天线S11

TL

In

Vb

Out


（1.4）探测器3菱形开槽天线模型及其S11仿真结果

4.3 研究成果

菱形开槽天线应用电路天线S11

TL

In

Vb

Out


（1.5）探测器4单环差分天线模型及其S11仿真结果

4.3 研究成果

单环差分天线应用电路天线S11

TLVb

In1

In2

Out

（1.6）基于0.18μm CMOS工艺制造的芯片版图及照片（尺寸大小：1mm×1mm）


4.3 研究成果

芯片版图芯片照片

（1.7）芯片绑定及PCB测试板


4.3 研究成果

芯片绑定（尺寸大小：5.1cm×1.8cm） PCB测试板（尺寸大小：13.7cm×9.8cm）

（1.8）芯片I-V特性曲线实测与仿真结果


4.3 研究成果

Detector4Detector2Detector1 Detector3

（1.9）响应度与NEP测试结果


4.3 研究成果

电压响应度噪声等效功率

（2.1）Push-Push压控振荡器


4.3 研究成果

Push-Push压控振荡器电路输出功率

（2.2）应用于Push-Push压控振荡器的矩形槽天线及其S11仿真结果


4.3 研究成果

Ground Plane

M10

M1

矩形槽天线模型天线S11

（2.3）1×2阵列Push-Push压控振荡器


4.3 研究成果

（2.4）应用于1×2阵列Push-Push压控振荡器的T形槽天线及其S11仿真结果


4.3 研究成果

T形槽天线模型天线S11

（2.5）外差混频探测器


4.3 研究成果

混频器电路中频放大器电路

（2.6）应用于外差混频探测器的环形差分天线及其S11仿真结果


4.3 研究成果

Ground Plane

环形差分天线模型天线S11

（2.7）直接混频探测器及折叠形天线


4.3 研究成果

直接混频探测器折叠形天线模型天线S11

（2.8）基于40nm CMOS工艺制造的芯片照片（尺寸大小：1mm×1mm）


4.3 研究成果

Heterodyne Detector

Direct Detector

Push-Push

VCO

1×2 Push-Push

VCO

Colpitts

VCO

Push-Push

VCO

(Probe)

（2.9）芯片绑定及PCB测试板


4.3 研究成果

芯片绑定（尺寸大小：2.3cm×2.3cm） PCB测试板（尺寸大小：10cm×7cm）

（2.10）1×2阵列Push-Push压控振荡器测试结果


4.3 研究成果

辐射功率测试辐射强度太赫兹源响应测试

（2.11）直接混频探测器测试结果


4.3 研究成果

太赫兹探测器测试响应度测试

• 器件性能提升，频率更高（fmax>1THz）

FinFET GAAFET，5nm 3nm

• 5G技术加速CMOS太赫兹芯片的产业化

无线通信：300GHz（IEEE 802.15.3d）

探测成像：安检、无损检测

• 混合CMOS工艺

光电子+CMOS：源、混频、片上天线

异质集成技术：CMOS+化合物半导体（碳化硅、氮化镓）

五、CMOS太赫兹集成电路展望

6G

性能

应用

工艺

起止时间项目来源项目名称

2019.1-

2022.12国家自然科学基金面上61874050

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2019.6江苏省自然科学基金面上项目BK20161352

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主要承担的基金项目

感谢各位专家与朋友！

踏灯塔，碎封锁！若一去不回，纵身碎，魂必归！

Documents

CMOS太赫兹源与探测器的发展与挑战 - ChinaMTA