8/6/2019 Clocking Basics
1/2
An introduction to clock
distribution circuits
ANALOG & POWER
I
Consumer electronics, including devices suchas DVD recorders,
personal computers, note-
books and HDTV have been the subject of dra-
matic increases in functionality and perform-
ance over the past few years. During the same
time there have been progressive reductions in
cost to the point where most of us now regard
such devices as standard household equipment.
This trend is being replicated in other areas like
mobile communications and the worldwide
web, where bandwidth and speeds are increas-
ing all the time. This is opening up new media
opportunities such as downloading videos
onto a mobile phone or watching HDTV
movies from the internet.
A lot of data processing is necessary to imple-
ment all these modern requirements, resulting
in the use of powerful digital processors and
other similar ICs, and clock distribution circuits
are one of the keys to ensuring that the best per-
formance and cost-effectiveness is achieved.
Since each processor in these applications uti-
lizes synchronized logic, it means that the
speed of every component needs to be dictated
by a central system clock.
This contrasts with the situation in years goneby when only a
few clocks with lower frequen-
cies were necessary. Nowadays, with higher sys-
tem performance and increased processor
speeds, the need to create, distribute and refresh
the system clock is becoming ever more critical.Thankfully,
however, a whole family of high-
performance, cost-effective clock distribution
circuits (CDCs) is available today, which main-
tains different tasks and allows complex clock-
ing structures to be established.
CDCs are split into three main groups: clock
synthesizers, which are ICs that generate clocks
in a system; clock buffers, which distribute
clocks; and jitter cleaners, which refresh clocks
where needed in the system. Sometimes the
functionality of CDCs is integrated in more
complex ICs, or partly in the processor itself.
For high performance, or more complex clock-ing structures,
however, there is no way round
using dedicated clocking ICs. Dedicated clock-
ing ICs usually deliver better performance and
more flexibility than integrated solutions. The
following is a brief introduction to the most im-
portant CDCs and their uses.
Typically, the clock synthesizer provides the
starting point for a system clock, especially in
consumer electronics such as gaming consoles,
IP set-top boxes and the like, where general-
purpose clock synthesizers are being used in-
creasingly as the central clock source becausethey can provide a
more cost-effective solution
than a number of crystals and simple crystal os-
cillators sited around the system. Clock synthe-
sizers basically consist of an external crystal and
an oscillator circuit. The crystal normally pro-vides the
frequency reference point, usually in
the 8-32MHz range (27MHz is the standard for
current video applications for example), and al-
lows stable and accurate oscillation of the os-
cillator circuit. As a rule, additional phase-locked
loops (PLLs) are used to allow easy multiplica-
tion or division of the oscillator frequency. With
this ability, many different frequencies can be
derived from a single low-frequency crystal os-
cillator such as the CDCE949 from Texas In-
struments for example, which generates up to
nine different output frequencies. These fre-
quencies can be chosen virtually freely from val-
ues between a few hundred kHz up to 230MHz,and in very high
resolution. Figure 1 illustrates
a general-purpose clock synthesizer.
Clock buffers distribute and copy a clock signal
from one input to several outputs. The con-
version between different supply voltage levels
(e.g. 3.3V to 1.8V), or between different sig-
naling standards (e.g. single ended to differen-
tial ended) can be handled through this kind of
IC. Important signaling standards are LVCMOS
(single ended), LVPECL and LVDS (differential
ended). Buffers are frequently used in memory
applications like the double data rate (DDR)RAM memory in PCs,
notebooks and servers.
A general-purpose clock buffer is illustrated in
figure 2. Modern clock buffers often have a
built-in PLL that allows the phase of the output
By Alexander Pakosta, Texas Instruments
This article describes the maintypes of clock distribution
and
discusses two of the most
important parameterscharacterizing their operation,
jitter and skew.
Figure 1. Block diagram ofa general-purpose clocksynthesizer
February 2008 36
