Circuit.cellar.020.Apr May.1991

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Towards MorePersonal Computing

EDITOR’SINK

Curtis Fran klin, Jr.

I t wasn’t hard to predict. Computers started out aslarge dramatic things served by cadres of professional

The first must in data storage is CD-ROM. Referenceworks currently available are a rich resource for those who

keepers. The trend toward smaller, more powerful, andless power-hungry computers started almost immedi-

can take advantage. Working storage will be in the form ofa KKl-200-megabyte hard disk. Floppy disk drives will be

ately. From UNIVAC, through IBM and Digital Equip- available, but not necessarily something always with you-ment, with strong assistance from engineers at NASA, when you need one, you’ll know where to find it. Oncomputers just kept getting smaller and smaller. Of course,history accelerated a bit when the folks at Intel decided

thinking about what I use floppy disks for, I realized that

that a general-purpose microprocessor was the best solu-

there are only four functions: data storage; hard-disk

tion to a customer’s request for a calculator engine, and thebackup; software installation; and data transportation.The first of these is taken care of by the on-board hard disk.

was born. If you’re reading this magazine, you knowthe rest. The amazing thing is not that the trend has

The second two are important, but can easily be done at settimes, when an outboard disk drive is convenient. The last

extended so long, but that there are so many people willingto believe that the progress has come to an end.

gave me the most concern, but it is easily accomplished ifyou are always connected to a network.

The power that once required rooms and now sits ondesks is being liberated from its steel boxes and trans-ported into, and by, our backpacks, attache cases, and coatpockets. The rush to have computers constantly by oursides assures that serious resources are dedicated to makingcomputers even smaller and more powerful. The technol-ogy is now in place to let true “information appliances”

become as useful andportable asa Victorinox Champion. Jerry Pournelle said, some time ago, that the day was

fast approaching when the answer to any question (with aknown answer) would be available to any person. For allpractical purposes, that day has arrived. If you use on-lineservices, you realize what an important information sourcethey are, and CD-ROMs and other tools are available to agrowing number of people. Jerry was, if anything, conser-vative in his prediction. It is now safe to say that the day isfast approaching when any known answer will be avail-able to any person from any location. The mechanism willbe the personal computer as it will evolve.

Future laptops will have built-in network support:Not for anything as limiting as an Ethernet LAN, but for alarge public network with access through both land-lineand cellular telephone systems. Email, voice mail, filesharing, even large resource sharing will all be through thenets. This is a vision of the computer as a communicationsappliance, replacing beeper, answering machine, cellular

telephone, mailbox, and more. It’s not hard to imagine myfuture laptop replacing Daytimers as the symbol of anorganized life. For the replacement to occur, however, onemore truly difficult obstacle must be overcome-price.

All the features I have described and more can bedesigned into a computer, but if that computer is priced at$20,000 the influence will be small. If, on the other hand,manufacturing and packaging engineers can produce thefeatures listed at a retail price of $1000 or, better yet, $500,then a real revolution will occur.

First, the personal computer will be small and light.The default footprint is 8.5” x ll”, and four pounds theoutside weight limit. There will be a color screen of at leastVGA quality, a keyboard, voice input, and a stylus. Why somany input means? We use different technologies fordifferent tasks. For a quick note, a signature, or workingwith a GUI, a stylus makes sense. For lengthy writing orprecise work with numbers, nothing beats a keyboard.Finally, there are times when the spoken word communi-cates as nothing else can. Given the benefits of a solid userinterface, the personal computer will need storage.

Doubters will proffer countless reasons for the com-puter I’ve described never to occur. I’ve pinned my opti-mism to the broad human drive for a “higher quality oflife.” We recognize that information is an important part ofhow wedefine “qualityof life,” and thecomputer sketchedabove is a marvelous information tool. It, or something likeit, will happen, and help us get on with the ever-evolvingbusiness of life.

April/May 199 I 1



FOUNDER/EDITORIAL DIRECTORSteve Ciarc ia

PUBLISHERDaniel Rodrigues

EDITOR-in-CHIEFCu rtis Fran& / in, Jr.

MANAGINGEDITORKen Davidson

PUBLISHER’SASSISTANTSueMcGil l

ENGINEERING STAFFJeff Bac hiochi

Edward Nisle y

CONTRIBUTINGEDITORSThom a s Cantre l l

Christopher Ciarcia

NEW PRODUCTSEDITORHarv Weiner

CONSULTINGEDITORSMark Dahmke

larry Loe b

CIRCULATIONCOORDINATORRose Man se/ la

CIRCULATIONCONSULTANTGregory Spifzfaden

ART & PRODUCTIONDIRECTORTric ia Fab ish

PRODUCTIONARTIST/ILLUSTRATORLisa Ferry

BUSINESSMANAGERJeannette Walters

ADVERTISINGCOORDINATORDan Go rsky

STAFF RESEARCHERS

NortheastEric Albert

William C urlew

Richa rd Saw ye r

Ro b & Stek

Midwest

Jon E/son

Tm McDonough

West Coast

Frank Kuec hma nn

Ma rk Voo rhee s

Cover illustration

by Robert Tinney

CIRCUIT CELLAR FI N IK @

THE COMPUTER APPLICATIONSJOURNAL

14A MIDI-Controlled Sampled-Sound Playerby Tom Dahl in Don Krantz

Digitally sampled sound is impressive. MIDI control is versatile. The contest-winning

project brings them together in a solid design.

A Portable 8051 -Based DRAM Tester

24 Design ing Ma ximum Fea tures in to Min imum Spa c e

by John Weff ro ih

Memory problems can be hard to trac k down. This portable unit lets you test DRAM inthe palm of your hand.

q41Using the T174 for Data AcquisitionLow -Co st BASIC I/ O by Ed Vog e l

A simple expansion unit for an affordable hand-held computer gives you a powerfuldata logger with on-site analysis capability.

45The Mystery of Intel Hex FormatExorc ising the Hex Dem on

by Ed Nisley

Intel’s hex format has caused many programmers to scratch their heads.Now Ed Nisley shows you the secrets of making Intel hex work for you.

q79

A PC-Controlled light ShowA Para l le l -Com m unica t ion Light ing Boa rd w ith MIDI Potent ia l

b y R. Sc off Cop pe rsm ith

When it’s time to take your show on the road, this lighting controller can give you

sophisticated control with simple PC programming.

q84Working with Zeropower SRAMBuilding ZMEM, The Zerop ow er Mem ory Ch ip Prog ram me r

by Ernest Stiltner

Zeropower RAM is at the heart of many portable applications. Here are the simple

techniques you need to use zeropower RAM in your next design.

q

From the Bench

66 Working w ith an A oforouterInteg rat ing a New Too l in to a n Esta b lishe d Eng ine er ing Ro ut ine

by Jeff Bac hiochi

J eff Bac hiochi has worked with boa rd designers and ‘rolled his own” with a PC Basedautorouter. Here are his tips and techniques for getting the most out of each.

71Bringing in the ProsWo rking w ith a Boa rd Desig n Firm

by Curtis Frank lin, Jr.

There a re times when a professional board designer is the cheapest and best route

to a finished board. This interview walks you through the process with a top boarddesigner.

2 l UlT CELLAR INK



r Editor’s INK

LLlTowards More Personal Computing

b y Cuffis Frankl in . lr.

r-7 Reader’s INK-Letters to the Editor

NEWProductNews

Firmware Furnace You Can’t Do That!A Loo k at Port ing C od e From OS/2 to DOS by Ed Nisiey

Silicon UpdatePixie PowerA Switch + LCD C om bo for in te l l igent I/O

by Tom C a n t & i

Practical AlgorithmsAdjusting Standard Deviation to Sample SizeInc rea se d Reliab ility for BASIC Sta tistic s

b y Char ies P. Boe g ii

rl86ConnecTime-Excerpts from the Circuit Cellar BBSConduc ted by Ken Dav idson

Steve’s Own INK Why Portable?by Steve Cia rc i c r

Advertiser’s Index

Circuit Cellar BBS-24 Hrs.

300/1200/2400bps,Bbits,no

parity, 1 stop bit, (203) 871-

1988.

The schematics provided

in Circuit Cellar INK are

drawn using Schema from

Omatiin Inc. All programs

and schematics in Circuit

Cellar INK have been care-

fully reviewed to ensure that

their performance is in ac-cordance with the speciiii

cations described, and pro-

gramsarepo.stedontheCir-

cuit Ce llar BBS for elec tronic

transfer by subscribers.

Circuit Celbr INK makes

no wa rranties and a ssumes

no responsibility or liab ility of

any kind for errors in these

programs or schematics or

fortheconsequencesofany

such errors. Furthermore, be-

cause of the possible varii

ation in the quality and con-

dition of materials and work-

manship of reoder-as-

sembled projects, CircuitCellar INK disclaims any re-

sponsiblity for the safe and

proper function of reader-

assembled projects based

upon or from plans, descrip

tions, or information pub-

lished in Circuit Cellar INK.

CIRCUIT CELLAR INK (ISSN

08968985) is published bii

monthly by Circuit Ce llar In-

corporated, 4 Park Street,

Suite 20, Vernon, CT 06066

(203) 875-2751. Second-

CIQSS postage paid at Ver-

non, CT and additional of-

fices. One-yea r (6 issues)subscription rate U.S.A. and

possessbnsS17.95.CanadaJ

Mexico $21.95, all other

countriesS32.95. Allsubscrip-

tion orders payable in U.S.

funds only, via international

postalmoneyorderorcheck

drawn on U.S. bank. Direct

subscription orders to Circuit

CelbrlNK.Subscripiions.P.0.

Box 3050-C. Southeastern,

PA 19398 or call (215) 630-

1914.

POSTMASTER: Please

sendaddresschangestoCir-

cuit Cellar INK, Circulation

Dept.. P.O. Box 3050-C .Southeastern, PA 19398.

Entire contents copyright

8 1991 by C ircuit Ce llar In-

corporated . All rights re-

served. Reproductionofthis

publication in whole or in

partwithoutwtittenconsent

from Circuit Ce llar Inc. is

prohibited.

April/May 199 3



Letters to the Editor

READER’SINK

JUST DO IT

Kenneth J. Ciszewski’s letter (CIRCUIT CELLAR INK 18)prompted me to express something which has been on mymind for some time. Mr. Ciszewski is, of course, correct:“Changes where your code is going” is a better subtitle formy ComeFrom article than “Discover where your code hasbeen.” (“Implementing a ComeFrom Statement,” CIRCUIT

CELLAR INK 15)Considerationsof subtitling aside, I must state that my

association with CIRCUIT CELLAR INK’s editorial staff hasbeen an extremely valuable experience. They have alwaysbeen receptive to my ideas and have worked wonderssmoothing my grammatical faux pas.

Writing is good for you-just like eating lima beans. Itforces you to think in a way which will be intelligible toothers-and that may be very different from how youpresent the same information to yourself. Ask any man-ager: One roadblock to career advancement for engineersis an inability to write succinctly.

Having said that, I feel compelled to encourage poten-

tial authors to remove that roadblock by publishing theirwork.

J. Conrad HubertSt. Paul, MN

Weaccept thecriticism and appreciate thekind words. We’d

also like to encourage our readers to take word processor in handand writeabout the projects they‘ve completed. Most of C IRCUIT

CELLAR INK’s authors are not professional writers-they’reprofessional programmers and engineers. We’re used to helpingtechnical professionals become good writers, so start writing!Ed.

ADVICE AND DISSENT

I recently discovered your magazine and I have beenreading it with interest. I am a consulting engineer practic-ing in the area of connecting devices to computers. Youreditorial content produces articles close to my practice.

I have some comments on CIRCUI-~ CELLAR INK 17. Thefirst is on the “Multichannel Digital Voltmeter Interface.”On page 53 is shown a schematic for a full-wave rectifier(i.e., it produces an output for both positive and negativeportions of the input signal). The point I want to concen-trate on is the capacitor connected to the positive input ofthe LM324. This terminal can have as much as 259 nA ofbias current. The circuit does not include any path for this

current except for the capacitor. Thiscurrent and capacitorcombination can cause a drift in the circuit of some 25 mVper second. Inaddition, thecircuit will drift into saturationafter a long operating time. One solution to this problemwould be to place a resistor to ground from the input pin.Using a l-Ma resistor will control the offset to less than 250mV (still a big value). Of course, the amplifier impedancewill drop, but that’s what design is all about.

Another comment is on the article “Using C for Em-bedded Control.” On page 69 is shown a circuit includinga transistor speaker driver. Now, my concern here is indriving an inductive load (the speaker) with a switchedtransistor. What happens here is the old V = L di/dt

problem. The current through the speaker will try toremain flowing as the transistor is switched off. This willcause the voltage to rise. The voltage will rise until thetransistor breaks down (around 40 V). This action places astress on the transistor which might lead to failure. One fixfor this effect is to place a diode across the speaker. Herethe diode cathode is placed on the positive terminal. Thisdiode will then absorb the reverse voltage produced by thespeaker inductance. Of course, the speaker will take longer to recover from the pulse thereby possibly causing itssound to change, but that’s what design is all about.

And now to the back page: I found the comments onreinventing the computer interesting. A portion of mypractice is spent designing and programming small em-bedded computers. There are still many situations wherea special design is indicated. These places occur where theclient is planning to market a device and he has specificpackaging constraints. Of course, most “special” designsare really packaging exercises. The physical nature of thedesign is usually much more difficult thanthe electronicside. On the other hand, the programming typically isspecial and straightforward in most cases. In the column,there is an implication that the $119 board will take the

Apr i l /May 1991 5



place of the 40k design. The article did not state thecomplexity of the software required to perform the proto-col translation. That effort could easily require thousandsof dollars of effort.

Frank Boss0Danbury, CT

In his “Editor’s INK” column of C IRCUIT CELLAR INK 19, Curtis Franklin, Jr. notes that embedded systemscomprising 500,000-l,OOO,OOO lines of code will becomemore prevalent, and that to produce such systems“you.. .need a high-level language, heavy-duty librariesand support programs, and a debugger that will workwith you in the most intimate fashion.” It is not surprisingthat Mr. Franklin has seen the future, since the items thathe has mentioned are available right now. The language isAda. Designed directly in response to the requirements oflarge embedded systems, Ada contains a variety of facili-

ties that are essential for that application domain:l o ulur imf i on features that support a variety of

composition techniques, including the increasingly popu-lar object-oriented design method, and that separate es-sential interface information from implementation details;

l Type-checking, whichallows early detection of errors;

l Language-defined features for exception handl ing

and fasting;l A sepa r a t e c omp i l u f i o n mechanism that allows both

bottom-up and top-down development and that easessystem integration by enforcing interface checking incre-mentally;

l Low-level features, including interrupt handling andcontrol over machine representations.

In addition to these technical features that support

embedded systems programming, Ada has the advantageof being a mature language standard (military, ANSI, andISO) and having production-quality compilers on a vari-ety of platforms. Run-time efficiency of Ada code is com-parable to other languages, and sophisticated tool sets(including cross-debuggers integrated within-circuit emu-lators) are available.

Ada is no stranger to the demands of time-criticalembedded systems in practice. It was the language ofchoice on a number of large projects, including severalEuropean air-traffic control systems, avionics software forthe Boeing 747400, process-control for a General Electricsteel mill rolling application, and many others.

In short, programmers who need to develop largeembedded systems do not have to wait for the future for alanguage and tools; Ada is ready and available now.

Benjamin M. BrosgotVice President, Alsys Inc. and

Paradigm has the complete solution for embedded system software development.

in hardware development tools will also appreciatethe ability of Paradigm LOCATE to generate complete

ecision. Make your choice and rest easy Intel OMF for use with popular in-circuit emulators.

se only Paradigm LOCATE has the ability‘th both of these powerful software

Relaxt environments. With comprehensive

Your application is done in record time because

time library and floating point initiali-you made the correct choice of software develop-ment tools. If you’re still struggling, now is the

, Paradigm LOCATE frees you to con-the details of the application.

time to experience the power, flexibility and com- pleteness of Paradigm LOCATE.

Call or write as today for more information onParadigm LOCATE provides a full spectrum of state-of-the-art embeddedsystem solurionsfromoptions for controlling the locate process. Bind Paradigm for Intel 8 x8 and NEC V-Series

physical addresses to code and data, automatically microprocessors.

handle initialized data or generate optional EPROMand documentation files. Intel 80186/188 usersSpecific questions about what Paradigm LOCATE can dofor you?Call toll-free info-line I-800-582-0864

Paradigm LOCATE uniquelyassles of memory chip selectAnd Paradigm LOCATE isr than your cutient tools,large applications with fullinformation in just seconds.

Paradigm Systems3301 Country Club Road, Suite 2214 l Endwell. NY 13760To order: (800) 537.5043 l (607]748-5968 (FAX)

PdradlgmLOCA*E,satrademar~ofRradlgmSyslcms

ReoderSenke X 7

6 CIRCUITCELLAR INK



Chairman, Commercial Ada Users Working Group forACM SIGAdaBurlington, MA

[Editor’s Note: Alsys is a vendor of Ada compilers anddevelopment systems.1

C COMPILER UPDATE

THE DASTARDLY DANGLING DONGLES AREDOOMED!

Yes, it’s true. We agree with your feelings about thosecopy protection devices we’ve been using. [BSO/TaskingC Compiler, “0, Say Can You C?” CIRCUIT CELLAR INK

As you can imagine, we have had many discussionsabout them. One customer told us he had to have sixdifferent keys on the back of his PC for six differentproducts.

In December we decided to stop using them and justuse a serial numbering system for Customer Supportpurposes. Of course, it will take us a couple of months toget the dongle-related stuff out of the products and theproduction system. The de-dongling is underway.

Vaughn OrchardMarketing ManagerBSO/TaskingWaltham, MA

We hope to take another look at the BSOITasking C compiler in its de-dangled state.

We have decided, based on our experience with severalsoftwarepackages, toinstituteapolicyof not evaluatingsoftware

that incorporates copy protection. We understand the legitimate property theft concerns of software vendors, but feel that copy- protection schemes, in their current forms, place an undueburden on legitimate, paying customers.

We will focus our attention on those products that do notunnecessarily inconvenience their users with intrusive copy

protection schemes. Curtis Franklin

We Want to Heai From You!Write letters of praise, condemnation, orsuggestion to the editors of C ircuit Cellar INK at:

Circuit Cellar INK Letters to the Edltor4 Park StreetVernon, CT 06066

FAX: (203) 872-2204Circuit Cellar BBS: “editor’

In Issue 19, the price of the PSpice Evalution

Package was listed as $70. The actual price is

$75.

Take complete control with ParadigmLOCATE and the Turbo Debugger.Total VisibilityParadigm LOCATE and the award-winning TurboDebugger are the ultimate weapons in the tightagainst system blindness. Acting as a window intothe target system, the Turbo Debugger givesunprecedented control over an embedded applica-tion. Debugging in the dark? Use the power andcapabilities of the Turbo Debugger to identify andisolate even the most insidious bugs!

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Don’t settle for anything less than the best. To getthe complete story, call, fax or write today to learnhow Paradigm LOCATE and the Turbo Debugger can improve your Intel 80x86 and NEC V-Seriesapplications.

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breakpoints with pass counts, execution history,inspectors, watches, macros and a host of other capabilities offer an unparalleled picture of theinner workings of your application, even in a real-time multi-tasking environment.

Borland MicrosoftCompatibility 3301 Country Club Road, Suite 2214

Endwell, NY 13760Paradigm LOCATE and the Turbo Debugger arecompatible with both Turbo C++ and MicrosoftC. So go ahead and use your favorite compiler.

to order: (800) 537-5043 . (FAX) (607) 748-5968

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Ap ri l/M ay 199 1 7



NEVVPRODUCTNEWSNElA/PRODUCTNEWS

LOW-COSTMICROPROCESSOREMULATORS

HiTech EquipmentCorporation has announced theaddition of two low-cost micro-

processor emulator products toits DryICE family of 8051emulators. The 80511CE-65supports the Philips/Signetics8OC652 microprocessor, and the8051ICE-FA supports the Intel8OC51FA. The 8OC652 is astandard 8051 with 256 bytes ofinternal RAM and an interface tothe PC bus. The 8OC51FA is an8032 with a programmablecounter array peripheral added.Both emulators include theSuperMon firmware, which features an on-line assembler and a real-time execute-to-breakpoint command, as well as the standard DrylCEprogram execution and memory interrogation (display, substitute,

and fill) commands.The assembled and tested boards feature emulation cables that

plug into the user’s target system in place of the target microproces-sor. Commands are sent to the DryICE serially through a cable con-nected to the user’s terminal or PC COM port. Terminal emulationsoftware is all that is needed to begin program debugging on a PC.The DryICE accepts user code in Intel hex format.

the monitor, but this assignmentcan be dynamically altered. Allother 8OC652 or 8GC51FA pe-ripherals are available to theuser. Each of the emulator

boards is priced at $329.00.

HiTech Equipment Corp.

9400 Activity Rd.San Diego, CA 92126(619) 566-1892

Fax: (6 19) 530- 1458

Reader Service 500

The DryICE firmwarecommunicates to the PC throughan on-board external memory-mapped UART featuring auto-matic data rate detection. Theonly requirements on the userare where the code starts and thereservation of six bytes of stackspace for the monitor’s use. Oneinterrupt must be reserved for

LOW-COST MOTIONCONTROLLER USES

PRINTER PORTThe Indexer LPT from

Ability Systems Corporationconverts an ordinary IBM-compatible printer port into amultiaxis stepper motor indexer.Each printer port provides suffi-cient input and output to controltwo axes of motion. The IndexerLPT supports up to three printer

ports, totalling six axes ofmotion.

Signals for each axis consist

of TTL-level outputs controlling“step,” “reduced current,” and“all windings off.” Two limitswitches per axis may be wireddirectly to the printer connector.One auxiliary TTL-level inputper axis is provided to allow foradditional system sensing. Limit-switch closures automaticallyarrest motion.

The Indexer LPT software

loads as an MSDOS devicedriver and behaves like a diskfile. It is compatible with virtu-

ally every programminglanguage, including BASIC, C,Pascal, and even DOS batch files.Since all communication with theIndexer LPT occurs through theDOS device interface, ordinaryASCII files containing the In-dexer LPT commands can bequickly constructed with a texteditor or word processor, andused to control motion by simplyusing the DOS CoPYcommand.

Version 2.0 includes linearinterpolation in up to sixsimultaneous axes, rapidtraversal, vector velocity control,and circular interpolation. Newfeatures such as a “feed hold”and simplified discrete outputspecifically target the machinetool automation market. Amenu-driven diagnosis programsimplifies initial installation andprovides a convenient platformto exercise motion hardware. A117-page instruction manual isincluded. The Indexer LPT sells

for $249.00.

Ability Systems Corp.

1422 Arnold Ave.Roslyn, PA 1900 1

(215) 657-4338Fax: (215) 657-7815

Reader Service 501



NEVVPRODUCTNEWSNElA/PRODUCTNEWS VERSATILE 805 1IN-CIRCUITEMULATOR

A flexible, easy-to-use in-

circuit emulator for the 8051

family of microcontrollers isavailable from MetaLink Corpo-

ration. The iceMASTER, a 7” x5.5” x 1” unit, connects any PC(DOS or OS/2) to the targetprocessor through a high-speed(115.2 kbps) serial interface witha standard RS232 cable. Modesof operation include: single chip,microprocessor, watchdog timerenabled, and DMA active. Twomodels are available: the Model200 is the basic emulator; the

Model 400 adds a 4K trace

buffer, performance analyzer,and full watchdog timer support.

An advanced interface provides user-configurable color windows that can be sized, moved, high-

lighted, added, or removed. The main screen windows display registers, bit memory, stack, internal andexternal data memory, source program, watch, and system status. Pull-down and popup menus and user-

assignable function/hot keys are available. The contents of any memory space may be viewed from theappropriate window. An on-tine context-sensitive help system provides assistance from any point in thework session.

Access to as many as 128K break and 64K trace triggers is available. These triggers, both simple and

complex, can be enabled, disabled, set, or cleared. Simple triggers are based on code or external data

addresses or address ranges. Complex triggers are based on code, direct, or bit address; opcode value or

class; or immediate operand.

The 4K-frame trace buffer captures data in real time. Trace information consists of address and databus values, DMA activity, and user-selectable probe clips. Trace buffer data can be viewed through severaldisplay filters, including raw hex, disassembled instructions, instructions mixed with source statements, orsource only. The trace can be triggered to begin capturing data on all instructions leading up to, around, orfollowing a breakpoint. An integrated search mechanism allows the location of any label, source linenumber, or address in the trace buffer, in either the backward or forward direction.

A flexible, accurate, performance analyzer features a resolution of less than 6 microseconds. The timeto execute specific portions of a program can be monitored. Up to 15 memory areas, based on codeaddress, module, line number, or label range, can be defined and analyzed. Results can be vieweddynamically during emulation or later for a more detailed analysis.

A large variety of file formats is supported, including Archimedes, Avocet, Intel OMF and hex,MetaLink, and Motorola S.

The price of the Model 200 is $1495.00 including cables. The Model 400 sells for $2799.00. A free demodisk is available by calling BOO)

6382423.

Metaltnk Corp.

P.O. Box 1329

Chandler, AZ 85244- 1329(602) 926-0797

Fax: (602) 926- 1198

Reader Service I2

PC-BASEDSIMULATOR FORZILOG Z8

PseudoMax BZ, a PC-basedsimulator for the Zilog Z8 familyof microprocessors, has been in-troduced by PseudoCorp. Thesimulator allows the developerto test and debug 28 programseven before the hardware exists.By means of machine windows,the developer can watch theprogram execution as thesimulator single steps or freeruns through the program code.Each register, the stack, l/Oports, and blocks of memory canbe monitored.

Ten user-definable screensenable the designer to customizethe simulator. Each screen cancontain up to 79 machine-specific

windows. Three of the tenscreens come predefined. Screen1, the main screen, containswindows for flags, the stack,interrupts, internal RAM,register pointer, and others.Screen 2 contains the port win-dows, and Screen 3 contains theworking registers and workingregister pairs.

Other features includeunlimited breakpoints, memorymapping, and a trace file featurethat gives the user the ability toselectively record the simulator

session for later analysis.The introductory price ofthe simulator is $100.00. The 28Cross- Assembler is $50.00 and aZ8 Disassembler is available for$100.00. A Developer Pack,consisting of all three products is

$200.00.

PseudoCorp

716 Thimble Shoals Blvd.,

Suite E

Newport News, VA 23606

(804) 873- 1947Fax: (804) 873-2154

Reader Service 503

April/May 199 1 9









NEWPRODUCTNEWSNEVVPRODUCTNEWS

VERSATILE ANALOG/DIGITAL SYSTEMSIMULATOR

The TESS (Transient Electronic System Simulator) block

diagram simulator from Tesoft simulates mixed analog and digitalsystems at the block level. Unlike transistor-level simulators, TESS

runs at speeds fast enough to model communications systems. It can

be used to analyze modems, radios, signal processors, and controlsystems to observe the effects of nonlinearities, bandlimiting. quanti-

zation, and adjacent channels. Loop stability tests, BER measure-ments, FET spectrum analysis, filter synthesis, Gaussian noise, andcost/performance tradeoffs can also be performed. Circuits with upto 800 blocks and 1000 nodes can be run, and simulation size islimited only by disk space. Support is included for a math coproces-sor as well as macros and subcircuit libraries. Interfaces to OrCAD

and P-CAD are included.The TESS Model library contains over 55 blocks for building

communications equipment and other electronic systems. Theseinclude filters, mixers, VCO, A/D and D/A convertors, digital logicmodels, phase meter, and many others. Subcircuits can be used tocreate new models from existing ones. An optional menu-drivenmodel generator, MODGEN, can be used to define a custom modelusing Microsoft FORTRAN; no special modeling languages or

coding is required. Models can be as small as one line or ascomplex as 1OOK of code. TESS Version 1.1 adds 24 new filters, high-quality graphics with interfaces to publishing software and plottingdevices, memory management to support huge model libraries andrun other tools, and enhancement of many existing features.

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Apr i l /May 199 1 13



FEATUREARTICLES

page 4

A MIDI-ControlledSampled-Sound Player

A Portuble 8051 BasedDRAM Tester

Using the T174 forData Acquisition

The Mystery of Intel Hex Format

A PC-ControlledLight Show

Working wlthZeropower SRAM

14 ClRCU/ T C fLLA R NK

A MIDI-ControlledSampled-Sound Player

w

1 his article describes a simplecircuit that connects to a MIDI busand replays sampled sounds when socommanded. The primary applicationis as a MIDI drum synthesizer for theauthors’ home studios, and thisappli-cation drove many of the design deci-sions. However, digital percussion isonly one of the things the unit can beused for. Any audio waveform thatcan be digitally sampled or otherwisereduced to digital form can be playedback by this unit, including othermusical instruments, human voices,and sound effects.

The unit, as described in this ar-ticle, is capable of storing about sixseconds’ worth of sound. The six sec-onds can be arbitrarily partitionedamong the notes-that is, each note

can last a different amount of time.Each note lasts its own fixed amountof time. Up to four notes can be activeatanyone time,andeachof themmaybe played at different volumes (usingMIDIvelocitycommandsin therangel-127). The sample/playback rate we

An exam p le o f a sam p led

sound. We used a Ma cintosh

co mp u te r and Mac Rec orde r

hardwa re to sam ple the drum

sound s. Thissc ree n is from the

‘ So u n d W a v e ’ p r o g r a m

wh i ch a l lows you t o ed i t ,resam ple. and f il ter samp led

da ta. The sam pler hardwa re

ha s a resolut ion of 8 bi ts and

a ma x imum sam p le ra t e o f

22k sam ples pe r sec ond .

use is almost exactly 10 kHz, whichprovides fidelity more than adequatefor rock ‘n roll.

In our development system,sounds are captured on a Macintoshusing the MacRecorder digitizer andsound editing facilities (from FarallonInc.). This system was selected pri-marily because we already had thehardware and software when we de-cided to design the MIDI unit. Soundsare transferred to a PC for linking intothe embedded program and down-loading to the unit’s EPROM.

AN UNUSUAL PROCESSOR

Figure1 shows themajorelementsof the unit in block diagram form whileFigure2 isaschematic. Asyoucansee,

the system uses very few parts. Amajor design goal was to design forlow cost, both material and labor, andwe believe that we reached this goal.

The processor is the NationalSemiconductor HPC 46003 (see page18). This processor is used in large



dustry, but is almost unknownelsewhere (possibly because thesoftwaredevelopmenttoolsfortheHPC family are among the worst inthe industry, ranking just aboveloading binary machine instructionson front-panel switches).

The HPC is a 16-bit machine thatcan run with either an &bit or 16-bitexternal data bus. We chose to use the

bit external bus to save an EPROMand address latch. Because the CPUmust double fetch instructions in its 8bit mode, it runs slower than it wouldif we had used the 16bit mode. Theearly chips in the HPC family (this oneincluded) also cannot fetch 16-bit dataitems from RAM or ROM when in 8-bit mode; 16-bit operands must beexplicitly double fetched and recon-

structed in software. Later members

quantities in the automotive in-

of the HPC family are reputed to curethis problem.

The HPC is available in a 30-MHzversion, with many instructions exe-cuting in about four clock cycles (theclockisone-half the crystal frequency).Al though the MIDI unit was designedto run at 32 MHz (the National fieldengineer says the 30-MHz part worksfine at 32 MHz), we opted to run theprototypeat 16 MHzbecause we wire-wrapped the prototype.

We selected the HPC for this proj-ect after the usual rigorous tradeoffstudy and analysis phase. We had used

the HPC in an earlier project where we

FEATUREARTICLE

Tom DahlinDon Krantz

Photo l-The com p l e ted unit is a

com pac t un it

user I/O .

wi th l imi ted d i rec t

Photo 2-Wire w r a a c onstruct ion “2.Z.. l im i ted proc essor speed to 16 M Hz.

but a l lowe d for fast turnaround o n

des ign c hange s.

needed the speed and the input cap-ture registers. Because of the earlier

project, we had a primitive in-circuitemulator, an assembler/linker, and arudimentary C compiler.

The HPC has many good features,but it also has some bad ones. On thepositive side, the part is very fast andhas a decent instruction set (it is RISC-like and reasonably orthogonal). At30-MHz it is fast enough to do simpleaudio digital signal processing. Thehardware design is simple andstraightforward, very much like the68xx family. On the negative side, the

part is not a mainstream processor,and it is unlikely that it will makelarge inroads in the 8031 or 68HCllcamps. Because of this, third-partytools are nonexistent. The local Na-tional field engineers made heroicefforts to support us, but they didn’thave all the answers. More than once,we had to hold up the project whilethe California development systemfolks figured out what was wrong.

MIDI DATA INTERFACE

The MIDI spec calls for opticalisolation on the receiver end of a MIDIconnection. We used an HP2730 op-toisolator connected directly to theserial input port (pin 16) of the HPC.Our application does not require theability to transmit on MIDI, but thiscapability can be easily added by con-necting a 74LS driver to the HPC’s

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NATIONAL SEMICONDUCTORHPC 46003

The HPC 46003 is a member of National’s family of high-perform-anc e microcontrollers. There areseveralmembersofthisfamily,eachwith the same lbbit CPU core butdiffering in the I/O and memoryoptions provided. The part is uniqueIn that it can operate with either an

8- or lbbit-wide memory bus. Thisprovides the designer with the op-tion to use an 8-bit bus for low cost orreduced real estate, or a 16-bit busfor maximum speed.

KEY FEATURES

l 3GMHz parts available-the regis-

ter instructions execute in as littleas 134 ns

l CMOSfabrica lion-low power, tol-erant of input voltage variations

l 16-bit architecture-internal andexternal, with additional 8-bit ln-structions and addressing modes

l 1 &bit data bus, ALU, and registersl 64K bytes of direct memory ad-

dressingl Most opcodes are a single bytel 16- x 16-bit multiply and 32- x16-

bit divide instructionsl 8 vectored interruptsl 8 timers with up to 8 outputsl 4 Input capture registers-on-the-

fly programmable edge detec-tion and interrupts

l 256 bytes of byte- and word-ad-dressable internal RAM

l Built-in watchdog timerl Full-duplex UART with program-

mable transmit and receive data

ratesl Microwire serial bus (Microwire is a

three-wire serial interconnec t busfor communicating with periph-eral chips such as A/D and D/A

converters)

miscellaneous minor componentswhose functions should be self-

evident. [Editor’s Note: Completesoft-

ware for this article is available from theCircuit Cellar BBSand SoftwareOn Disk 20. Seepage 9 for downloading and or-dering information.1

The MIDI input section uses theHPC’s internal UART in a fully inter-rupt-driven mode. As data is receivedfrom the 32-kbps MIDI bus, it is storedin a circular receiver FIFO. The logic isin the file UART . C, shown in Listing 1.

This file was taken in whole from a

Readerservice x1.58

18 C ?CU T

CEL ? N













on a cost-per-bit basis. It’s true thatthere is additional overhead involvedin DRAM-based products but the eco-nomics for large memory arrays arestill overwhelming.

A DRAM-based system has to giveup a little CPU overhead or have spe-cialized hardware to go out and “re-fresh” its DRAMS every few millisec-onds or so. This refreshing at its mostbasic level is a process of reading outand recharging each capacitive stor-age element. It’s apparent that thishassle is worthwhile, witnessed by allthe DRAM-based PCs in the world.

There are also several interfacingdifferences between DRAM andSRAM. Figure 2 is a pinout of a 256Kby 1 DRAM; its generic part numberwould be “41256.” DRAMS, like theone shown, are usually configured as

single bit slice arrays of a large num-ber such as 64K by 1 or 256K by 1. Inorder to build an array of 8 bits, youput eight “by 1”devices in parallel,each providing a bit.

Since DRAMS have a large linearaddress space, and IC pin count isalways at a premium, the address busis usually multiplexed. The multi-plexed addressed bus facilitates re-freshing as discussed in the next sec-

tion. The address multiplexing is ac-complished by dividing the addressspace of the DRAM into a row and col-umn address. In this way a 64K partcan be accessed using only eight multi-

RAS

CAS

4

0

A l A2 A3

-<>I A 4 I

3WR

DIN

Figure 2-The DRAM Tester is d esig ne d t o

te st p a rts suc h a s this 256K b y I DRAM . Its

ge ner ic pa rt numb er wou ld b e ‘4 1256 .’

plexed address lines (a 64K RAM ar-ray can be thought of as a 256-by 256-bit square). This is similar to the multi-plexed low-order address and databus on Intel microprocessors.

In order to complete the multi-plex of the row and column addresslines, two address strobes are required,one for the row address (RAS) and one

for the column address (CA’S). TheRAS line also doubles as the chipenable pin and the CAS line doublesas the output enable pin. DRAMS alsohave a data input pin (D), a data out-put pin (Q), and a write line (W). It’sfairly impressive that a 256K DRAMcan be packaged in a 16-pin DIP pack-age. The process of addressing aDRAM is to apply the row address tothe address inputs, drop the RAS lineto strobe it in, apply the column ad-dress, and drop the CAS line to com-pletetheaddressselection. Write,DataIn, and Data Out are handled appro-priately, similar to static RAM.

DRAM timing diagrams can lookvery confusing, mainly due to themultiplexed address system and re-freshing requirements. If you don’tget too hung up on the details, it’sfairly simple. Figure 3 is a simplifiedtiming diagram for a DRAM readcycle. Accessing a cell in the DRAMconsists of placing the row address on

the address input and bringing RASlow to strobe in the row address(dotted line 1 in Figure 3). Since theRAS line also acts as the chip enable, itis kept low through the remainder ofthe cycle. The column address is nextplaced on the address inputs and theCAS line is brought low (dotted line2). The addressing is now completeand Q is enabled by CAS (rememberthat CAS doubles as the output enablepin). Data is picked up off Q (dottedline 3) and CAS and RAS are brought

high, ending the cycle (dotted line 4).This process can be repeated after ashort “precharge” time (lines 5 and 6 ).

Writingisaccomplishedasshownin Figure 4, but W and D are set upbefore CAS falls. This is a simple writecalled an “early write” since write islow before CAS is asserted. This al-lows Q and D to be connected to-gether, making for simpler interfac-ing using a single bidirectional data

Apr i l /May 1991 5





takes place a row at a time internallyeach time that row is accessed. Duringa refresh, the DRAM reads the valueof each bit in the row and rewrites it,putting a fresh, full charge on the tinycapacitor storing the data. There aretwo details that need to be added tothis simple idea: Modem DRAMsonlyrequire half their rows to be accessedfor refreshing. The lower half and theupper half of the part are refreshed si-multaneously due to the internal or-ganization of these parts. (The actualorganization is two half-sized arrays.)This means that a 64K DRAM onlyrequires that 128 rows be accessedrather than the full 256. The otherdetail is that a full memory accesscycle is not required for refreshing.The minimum that is required is a rowaddress input and a brief RAS strobeas shown in Figure 5. This is calledRAS-only refresh and is the simplestrefresh method. Each time a row isaccessed, when the RAS line is re-turned high, all capacitors in that roware recharged. This is called the “pre-charge” timeand typically takes about

on entry: low row address in ACChigh row address in DPH

low co1 address on POhigh co1 address on ~2

entry setup for writing-

CLR RAMWE : write

SETB RAMDIN : write a 1or- CLR RAMDIN : write a 0

entry setup for reading-

SETB RAMWF. ; read

do memory operation, putting Act out on PO

and DPH on PZ-

MOVX @DPTR,A : generate RAS

8051 WE line is latched by hardware that now holds

RAS line low, row address has been strobed in

8051 write cycle is now over and ports 0 and 2 havecolumn address, generate CAS now-

SETB RAMCAS ; end cycle

RAS hardware reset by rising edge of CAS-

end

Listing 1 -Add ressing for a rea d or w r ite for any RAM loca t ion in the Data test mo de s uses a c od e seg me nt simi lar to that show n here.

the same amount of time as the row ways. IBM PCs perform a periodicaccess time (to be discussed later). dummy DMA cycle which reads a

Refreshing at a system level is large block of memory. One of theaccomplished in a variety of clever many things that made the280 micro-

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straightforward code. With a 12-MHz8051 thisresultsina timeof 74secondsfor a 1M part. This is a long time andseemed excessive. I spent a some timelooking at simple ways to shorten thistime. I thought a lo-second total testtime would be a good goal.

I looked at a special test mode that1M DRAMS have just for the purpose

of speeding up testing at the factory.Internally, 1M DRAMsareconfiguredas four 256K arrays. When a 10.5-V“supervoltage” (a DRAM vendor’s

jargon-not mine) is applied to a spe-cial test pin, any data on the input goesinto all four arrays simultaneously,and any data output is thelogical ANDof these four arrays. As a result, thepart can be tested as a 256K part, tak-ing a quarter of the time. I pursuedthis to the point of looking at step-upvoltage converters to generate the 10.5volts, but abandoned the approachsince I figured out an addressingmethod thatgot the1M test timedown

considerably. The time was above mylo-second goal but I decided to acceptit in the name of simplicity.

The actual interface makes use ofsome of the 8051’s built-in memory-access hardware and a minimalamount of external hardware. Thisinterface is covered in detail in thehardware description section that fol-

lows, but basically takes advantage ofthe fact that the port pins on an 8751-type device are also used for externalmemory accesses. By placing the col-umn address on the port pins (PO andP2) and the row address in the datapointer register (DPTR), externalmemory operations making use ofDPTR rapidly switch port 0 and port 2from column addresses to row ad-dresses, simplifying both the hard-ware and software. An external flip-flop is used to make RAS the properlength to serve itschip select function.RAS is cleared on the rising edge ofCAS which is generated by the 8751’s

write enable line. Using this interfacebrought the test time for the data testto 32 seconds for a 1M part, only eightseconds for a 256K part, and a blazingtwo seconds for a 64K part. I decidedthis was acceptable and very work-able from a parts count standpoint.

ACCESS TIME TEST HARDWARE

INTERFACE

This article gives the impressionthat the design was a serial proccss-first I did this, I finished that, then Ithought about this.. . That’s not reallythe way any design goes. While I wasdeveloping the data test interface Iwas also looking at what impact deci-sions would have on the access timeinterface. A lot of things that lookedreasonable for the data test made theaccess time measurement impossible.In the data test, the part is simplyexercised and timing isn’t really anissue. In the access time test, you need

““1 1 “4 I Y6,,,c7 I P O W E R T A B L E1

30 ClRCUfJ CELLAR INK



to perform operations in the tens ofnanoseconds and measure times inthe hundreds of nanoseconds withdecent resolution. This kind of timingis not something any processor can doveryeasily,muchlessaminimal87C51system.

Several approaches to the thisproblem were considered. One ap-

proach was a brute force method of just measuring the access time using ahigh-speed clock. A 100-MHz clockcould be gated into a counter whenRAS fell, a short counter would gener-ate CAS four clocks (40 ns) later, andfinally, when data was available fromthe RAM, theclockinput to the counterwould be disabled. The contents ofthe counter would be the row accesstime in tens of nanoseconds. Whilethis is possible,it isn’t very practical atany reasonable power level. Crystal-

controlled loo-MHz oscillators them-selves are not very low power circuitsmuch less counters capable of beingclocked at 100 MHz. A design ap-proach bites the dust.

I started looking at delay linesand quickly realized they were a good

fit. Delay lines are used routinely inDRAM circuits to generate the specialtiming required. They produce delaysthat are accurate to a few percent,have TTL-compatible inputs and out-puts, and are reasonable on power.The series of devices that seems themost complete is made by DallasSemiconductor. They makedelay lines

with a single input and multiple out-put “taps” at fixed delays. The devicethat looked best was one with five 20-ns taps for an end-toend delay of 100ns. The DRAM tester uses two of thesedevicesend to end inconjunction withan g-to-1 multiplexer to produce aprogrammabledelayof 60-200 ns witha resolution of 20 ns and an accuracyof+5%.Fivepercentaccuracyis+lOns

for a 200-ns part, which is half the timeresolution (20 ns) and very reasonablein my book. Access time is actuallymeasured by clocking a D flip-flopwith a delayed RAS signal and bring-ing the RAM’s data input into the Dinput. If the D input is stable in timefor the clock, then the access timepasses. If not, Q will not reflect D andthe access time fails.

One of the tough problems thathad a very simple solution was how to

jam a row and then a column addressonto the address lines and strobe themin time to see the minimumrow accesstime.ThedelaybetweenRASandCAShas to be on the order of 40 ns to meetthe row access time. This means that arow and then a column address have

to change very quickly. The simplesolution to this problem was to notchange the column address afterstrobing in the row address. This onlyallows access time testing on “diago-nal” addresses in which the row andcolumn address are the same, but af-ter all, access time is independent ofaddress and the hardware savings aresignificant. The CAS signal in theaccess time test mode is generated bytaking a fixed 40-ns delay out of thefirst delay line whose input is RAS.

TEST ALGORITHMS

The test algorithms are really thekey to the DRAM tester. I wanted tomake the hardwareand software flex-ible and modular enough so that new

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of these sockets, I highly recommendthemforalmostanythingbutthemostcritical circuits. The technique is simi-lar to wire-wrap in some ways butusesinsulationdisplacementpinsandmakes low-profile boards.

MAIN ELECTRONICS BOARD

The overall board size is 3.1” x 3.6”with 0.4” notches in two comers forthe bosses in the box. The board ismounted to the box with 4 x l/4”self-tapping hardware on a 3.2” x 1.5”pattern to match the box bosses. Thekeyboard wiring hangsoff this smallerboard, the ZIF socket board connectswith a 20-pin dual row IDC ribbonconnector at the top, and the LCDdisplay is connected with a 14-pin DIPheaderand ribbonneartheside.Leavegood service loops for this wiring but

make sure you can close the box.

KEYBOARD

Thekeyboardisalittlestrip boardabout 0.6” wide and 3.6” long. I usedstiff solder-typeperfboard forit so the

key switches could be soldered downand would feel solid. The keys I usedare 0.3” on a side, are available fromgood electronics wholesalers, and aremade by Calectro. The board align-ment is critical for smooth operationand aesthetics. I point-to-point sol-dered the wiring on the board and rana ribbon over to the main board.

ZIF SOCKET BOARD

TheZIF socket board uses similarconstruction techniques as the key-board. I used point-to-point wiringwith 30-gauge wire-wrap wire andsolder. I taped over the back of it withelectrical tape since it is a bit delicate.It has about a 2”ribbon cable and dualrow O.lOO”center IDC header hangingoff it that mates with the top of themain electronics board. The clearance

of this ribbon cable with the battery isa bit tight.

LCD DISPLAY

The LCD display is a standard Japanese display module. They are

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available on thesurplusmarket at verylow prices; I buy them whenever I seea good deal. Though I wasn’t able tofind one, a bottom view display ispreferred since this is almost alwaysthe orientation of the display. Thedisplay is connected to the main boardwith a 1Cpin DIP header and ribboncable about 3” long. I generally wire

the 14-pin header to agree with the 14pins of the display. Though this in-volves a little bit of scramble wiring ofthe ribbon cable, it’s easier to trou-bleshoot and I’ve standardized on itfor all my junk box displays. The dis-play is mounted with #2-56 machinescrews at its four comers. If you usethe machine screws, use spacers or becareful tightening them since the LCDboards are fairly fragile.

A STARTING POINT

This article has described the designand construction of a portable DRAMtester. My hope is that this article willbe a starting point for the reader toembellish and improve. Some ideasfor improvements might be the inclu-sion of “by 4”-type parts or supportfor SIPS and SIMMs, both of which areconsiderably more common now thanwhen I developed this unit. Anotherimprovement might be automaticpower shut-off, a necessity in a port-

able instrument I think. I’m sureimprovements could be made in thetest algorithms and software, too. Ialso deliberately left the processor’sUART available so that a serial opera-tion mode could be included. Thismight be useful for logging tests to aprinter or getting sort data. Anyway,have fun and let me know what youcome up with by leaving me somemail on the Circuit Cellar BBS. I’dreally enjoy hearing from you. “

John Wettroth is the chief engineer at SAIC

Mil Products in San Diego, Calif. He alsoowns Travtech of San Diego, which producesan HP 48 calculator I/O interface.

IRS404 Very Useful405 Moderately Useful406 Not Useful

Reader Service X185

38 CIRCUIT CELLAR INK





THE EDGE CARD CONNECTOR

Photo 1 - the 1174 da ta ac qu isi t ion

enc losure , and the O boa r d .

unit c o ns ists of th ree ma i n a sse m b l ies : the T/ 74,

This is the most difficult part ofthe project: Work methodically andtake your time. Set the edge card con-nector in a table vise and situate theI/O board pins up nearby. Cut atwelve-inch piece of wire-wrap wireand strip one end for wrapping. Stripthe other end back one eighth of aninch and form a tight hook. Tin thehook with solder. Using the TI con-nector illustrated in Figure 1, solderthe pretinned wire to pin 14. Wrap theother end of the wire to pin 34 of Ul.

Cut out apieceof perfboard to thedimensions in Figure 1 and attach thispiece to the edge card connector.

the THIS IS

the corners of the prototyping board.Mark the hole pattern onto a separatepiece of paper for use later in theconstruction of the enclosure. Solderthe wire-wrap sockets, Cl, C2, and Rlinto the PC board. Mark pin 1 of eachsocket on the bottom of the board forreference. Using the schematic shownin Figure 1, start making wraps, mark-

ing off each connection as it is com-pleted.

Attach a DB-25 connector to oneend of the ribbon cable. Split out wirenumber 13 and install the 24-pin IDCsocket on the other end. Solder thewire that was split out to circuit groundand install the IDC socket in the 24-pin wire-wrap socket on the I/Oboard.

A TEST

The experienced may wish to stophere and do their own custom appli-cation. The project is now at a semi-functional level so testing is in orderregardless of additional plans. I usedthe following items to perform thetest: T174, IBM adapter, I/O board,multimeter, and oscilloscope or logicprobe. I am not going to do a detailed

POWER TfiBLE

Flgure -m e h e a r 7 o f the O bo ard is an 82C55 PPI. Conne c t ions f rom the b oa rd to the o utside w or ld a re th roug h a 25 p / n D-type

co nnec to r . A r ibb on c ab le f rom a 24-pinD/P heade r to the 25 p / n D connec to r co mp le tes the connec t ion .

42 C IRCUIT CELLAR INK





hardware. Put rubber feet on the bot-tom of the box. Install the PC board onits standoffs, pulling the edge cardconnector and cable up and out of thebox. Slide the cover onto the box justup to the cable and mark it.

File a slot on the cover wheremarked and smooth with sandpaper.I used electrical tape to protect the

cable where it emerges from the cut-out. Screw the lid onto the box. Applyseveral layers of sticky-backed tape tothe bottom of the T174 plastic carryingcase. Position it carefully on the enclo-sure cover, sitting in such a way thatthe edge card connector and cable arenot hanging out over the enclosureedge. Press down to set the tape, in-stall the T174 in its case, and plug in theedge card connector.

MAKING IT WORK

To simplify interfacing I recom-mend making up another DB-25-to-24-pin IDC cable. It will plugnicely into a solderless breadboardand will assist in keeping track of

wiring connections. Remember to splitout wire 13 for ground if you do this.Any wall socket DC adapter regu-lated through a 7805 will do nicely for+5 V to the breadboard.

The first step in any interfacing isto determine how many inputs andoutputs are required since this deter-mines which control word gets writ-

ten into the data direction register.Read the comments in the test pro-gram and the data sheet for the 82C55for more details. I have interfaced aKAD 0820BCN A/D converter avail-able from Digi-Key, a 74HC574 latch,and a solid-state relay switching ACpower on and off to a instrument. Thehighest sampling or switching rateyou can expect is about 20 times asecond, which is about the same asthat used by multimeters. There is ahost of other chips that can be inter-

faced to this system to do many dataacquisition and control tasks. 4

Ed Vogel works in product development for Science Applications International Corpora-tion and is a part time science teacher.

SOURCES

Most parts may be found at RadioShack. The remainder may be ob-tained from Allied Electronics. The 15x 2 edge connector W235-21-030DS20) may be obtained from MethodeElectronics,

Radio Shack: located across theU.S. and in many foreigncountries

Educalc27953 Cabot Rd.Laguna Niguel, CA 92677(800) 677-700 1(7 14) 582-2637

Allied Electronics7410 Pebble Dr.Fort Worth, TX 76118(8 17) 595-35cx)

Bell Industriescontact:Methode Electronicsc/o David Norling(818) 991-4238


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The Mystery of Intel Hex FormatExo rc ising the Hex Dem on

FEATUREARTICLE

Ed N isley

I here comes a time in everyproject when your heart stops, youreyes cloud, and you realize that youhaven’t the foggiest idea what to donext. In embedded systems program-ming, one such moment occurs whenyou desperately need data in Intel hexformat and all you’ve got is binary.. .

or vice versa.

you get data from one to the other,with some assurance that a bit or twodidn’t fall off along the way?

citrant gizmo by hand (it has beendone!).

Fortunately, Intel hex format iseasy to generate or parse, at least onceyou have the key. Afterreading this article, you canrestart your heart, uncrossyour eyes, and get on withyour other problems.

The Intel hex file is a survivor ofthe era that replaced TlYs with CRTs,paper tape with floppy disks, andnearly everything else with a personalcomputer. Although there are other

formats around, if you can get yourdata into Intel hex format, the mes-sage will get through.

The fields in each line are:ccaaaattdd...ddssccr>.zlf>

THE BACKGROUND

Your programs start aseyeball-readable ASCII

text in a disk file and, aftera trip through a compileror assembler, end up asbinary data in another diskfile. The EPROM holdingyour program containsbinary data, so what’s theproblem? Just stuff thebinary data in the binaryEPROM, right?

E&If

ccaaaa

tt

dd

ss<cr>

<If>

ContentsEach line must begin with a colonNumber of data bytes in the line

Address of first data byteRecord typeData bytes

ChecksumCarriage return character Line feed character

The last record in the file is usually::00000001 FF

Step back in time twodecades, when “hand cal-culators” had fingers, an“electronic desk calcula-tor“ was a suitcase full of TTL, and a“personal computer” got salary andbenefits. Perhaps you were one of thelucky ones with a Teletype terminaland an EPROM programmer in youroffice.

Figure 1 shows the format of eachline, or “record” as it’s called in thetrade, within an Intel hex file. Theformat’s name and traditional file ex-tension come from the fact that every-thing is hexadecimal. Every line be-

gins with a colon character and endswith a carriage return and (in mostcases) a line feed. Some devices are

smart enough to ignorelines that don’t start with acolon, although many willgrump about an invalidrecord format, and somedon’t need the line feed.

The first byte (twocharacters) gives thenumber of data bytes inthe record. Although a

single record can have upto 255 bytes, most devicesgag after only 16 or 32.Unfortunately, these up-per limitsare generallyun-documented and deter-mined by experimentationafter a last-minute catas-trophe. A zero length bytemeans there are no databytes in the record; thisusually occurs only in thelast record in the file.

The next two bytes

A record that puts the data bytes 12 34 at address 5678::025678001234EA

Figure 1 -The Me/hex forma t divide s ea c h line into spe c ific fields. The

first four fields have fixed lengths, while the size of the da ta f i e ld is

spe c if ied by the ‘d ata leng th ’ f ie ld . All of the cha rac fe rs a r e uppe r

case, pr in in tab le ASC II.

THE FORMAT

If you were really lucky, that TTYhad a paper tape reader/punch, asdid the EPROM burner. How would

The most essential feature of theIntel hex format is that it uses onlyupper case, printable ASCII charac-ters. You can print that file, massage itwith a text editor, send it over thephone without a fancy binary proto-col, or even type it directly into a recal-

(four characters) are the address of thefirst data byte in the line. Despite whatyou may think from years of experi-ence writing code for Intel 8086 proc-essors, the high-order address bytecomes first! Because there are onlytwo addressbytes, an Intel hex file canhold only 64K bytes of data. Whilethere are variant formats for bigger

Ap ril/ Ma y 199 1 45









binary value, the tokenized programtext, and a carriage return character.The length byte includes all thosefields, so you can find the startingaddress of the next line by adding thelength byte to the current address.The last line of the program is fol-lowed by a single 01 hex byte.

The first line number in GETBA-

s IC S code is stored in variable L8 sothat GETBASIC can stop producingoutput when it encounters its ownbeginning, rather than when it hits thetrue end-of-program marker. If youdon’t have another program in RAMwhen you start GETBASIC, the hexoutput will consist of the header infor-mation and a 01 byte marking the endoftheprogram,withnothingbetween!

GETBASIC starts a new hex linefor each new BASIC program line, soyou can edit the hex file to remove

program lines.. .but this procedure isnot for the faint of heart. It also startsa new line after emitting the amountof data specified by variable L (set inline 640041, so you can control themaximum line length to match yourgizmo’s restrictions.

GETBAS IC adds text marker linesbefore and after the hex data so thatthestartingandendingpointsaremoreobvious in the captured disk file. Youmust edit the file to remove thoselines,as well as any other extraneous data,before feeding the file into yourEPROM programmer (unless yourprogrammer ignores lines that don’tstart with a colon!).

With all that as prologue, GETBA-SIC's actual workings are fairlystraightforward. Listing 2 shows asampleprogramand theresultinghexoutput so you can trace through thecode.

Examining the first hex line:

B

shows 34 at address 0000, so theBASIC-52 EPROM header simulates aprogram created using PROG4. TheFFDC at address 0001 will set 9600bits/second withan 11.059-MHzcrys-tal. Finally, the 17FFreveals that MTOPwas reduced 2K from the 1FFF nor-mally found with an 8K RAM.

The next line:

:01001000559A

contains a single byte, the 55 marker ataddress 0010.

Theremaininglinesarethe token-ized text corresponding toGETTEST.BAS.I'~~~WC itasanexer-

cise for the reader to match the binaryline numbers with the BASIC text. TheBASIC-52 manual has a table match-ing keywords and tokens, so you cancheck to see that the rest of the pro-gram is correct.

The final step is to burn the datainto an EPROM, stick it into your 8052system, and see if it works. Try it!

THINGS TO DO

There are several utility programsthat belong on every embedded sys-tems programmei’s disk. Given theinformation in this article, you shouldbe able to whip off a pair of programsthat convert hex files into binary filesand binary files back into hex. [Edi-tor’s Note: There are numerous binu y

to-hex and hex-to-bina y conversion programs for the IBM PC posted on the Cir-cuit Cellar BBS.1 A hex sorting utilitymight be handy, and, of course, ItWould Be Nice to download a hex fileto your 8052 once in a while.. .

You may be tempted to skip thechecksum when you’re reading hexfiles from a PC disk file. After all, what

can possibly go wrong with a disk filethat wouldn’t be caught by DOS andBIOS error checking? As it turns out,every so often my OS/2 terminalemulator would drop a byte. The hexfile checksum was the only proof I hadthat something was broken.. .becausethe checksum was created on a differ-ent system!

Long live the Intel hex file! +

Ed Nisley is a Registered Professional Engi-

neer and a member of the Circuit Cell ar INK

engineering staff. He special i zes i n findinginnovat iv e solut ions to demanding and un-

usual technical problems.

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Control-R Model 2 (now includes MAX232 & 8K SRAM) $79.95 An expanded version of the Control-R 1. Now comes fully populated with 8K

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Datalog-R Model 1 (with MAX232 & 8K SRAM) $179.95The newest member of our SBC line. Features serial f/O, 4 ea. 8K devicesockets user configurable as RAM or ROM, expansion connection and a

socket that will accept an (optional, $70.00) 32K byte removable memorycard. This SBC is designed for applications requiring removable, non-volatilestorage or can be used without the memory card as a conventional SBC. Re-quires either 5vdc or 12vdc for operation and measures 8.0” x 4.5”.

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Apr i l /May 199 1 49



DEPARTMENTS

Firmware Furnace

qp o w 57

Silicon Update

MODULE : paOe

qrac

Practical Algorithms

Connecfime

50 CIRCUff CELLAR INK

You Can’t Do That!A Lo o k a t Po rt ing C o d e From OS/ 2 to DO S

D1 erhaps the least interesting part

of C programming is deducing whichpointer you misused from the obser-vation that your program dies instrange and mysterious ways. Theprocess is rarely boring, because thatabused pointer can give your wholemachine a serious case of the twitch-

ing never-get-overs by mutilating theoperating system’s code or data.

Try as you might, you can’t writeC code without at least one such blun-der (unless, of course, you use no

routines and recompiled the code. Ashort session on an AT with DOS-mode CodeView produced, in effect,an OS/2 program ported to DOS!

Although this column usuallyconcentrates on gritty firmware de-tails, tricks for developing the pro-grams merit some attention, too. I’ll

explore the differences between theOS/2 and DOS versions of my soft-ware, then make a few observationson program development by portingfrom OS/2 to DOS.

What if y o u c o uld find p o inter erro rs b e fo re they

c au sed an y dam age?

Would tha t b e w orth a nyth ing to you?

pointers at all). So you get used to BigRed Switch debugging, even thoughyou know deep down in your heartthat the next glitch may scrub yourhard disk right down to the platter.

What if your debugger reacted toa wild pointer by popping up a win-dow saying “Protection Violation”rather than freezing in its tracks? What

if you could find pointer errors beforethey caused any damage? Would thatbe worth anything to you?

As it turns out, I developed thecode for an upcoming project entirelyunder OS/2, using Microsoft C 6.00and OS/2 CodeView, specifically toget that level of debugging support.When the program was working cor-rectly, I added a few DOS interface

THE BIG PICTURE

The whole purpose of an operat-ing system is to separate your pro-gram from the actual system hard-ware. In principle, your programshould “talk” only to the operatingsystem and ignore the hardware de-tails. In practice, essentially all PC-

DOS programs bypass the operatingsystem to get direct video controlleraccess, handle interrupt-driven serialI/O, and perhaps even snag scan codesright from the keyboard hardware.

OS/2, in contrast, provides amind-numbingcollectionof functions(called an Applications Program In-terface, or API, in the currently fash-ionable technobabble), enough that









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Windows really should have been allalong. What might the coming yearhold?

For a while, the biggest and mostserious objection to OS/2 was thatyou needed a bigger and most seriousmachine with lots of RAM. That’s lesstrue today and, better yet, bigger andmore serious machines are a lot

cheaper. For example, a name-brand-clone l&MHz 386/SX clone with 2MB of RAM, a big hard disk, VGA,and all the stuffings costsabout $1500.DRAM is down to $50 per megabyte,even in SIMMs, so a few more mega-bytes is no longer much of an issue.

Frankly, the next machine you buywill run OS/2 with little or no addi-tional hardwareinvestment. Althoughnobody bundles OS/2 with theirmachines (earlier Windowsgiveawayshaving defined the concept of a “shelf-

ware operating system”), the incre-mental cost of OS/2 is perhaps a fewhundred bucks.

Incidentally, there is a differencebetween “minimum amount of RAMneeded to boot” and “desirableamount of RAM to do useful work.”

Just as you can never be too smart, toothin, or too fast, your system canneverhave enough RAM. Buy about twiceas much RAM as you think you’llneed (even for DOS!) and you’ll comeout about right for starters.

Contrary to popular opinion, youdon’t need the n-kilobuck MicrosoftOS/2 Software Development Kit towrite OS/2 programs. The MicrosoftC 6.00 compiler works just fine, as doa variety of other compilers from other vendors. There are even alternativedebuggers available if you don’t likeCodeView,although the highly toutedMultiscope debugger turns out to beincompatible with MSC 6.00 despiteadvertising claims to thecontrarytthis

should be fixed by the time you readthis, I’m told).Commercial function libraries for

OS/2 are still scarce, althoughOakland’s C-scape does pretty nearlyall the tricks you’d need to build acharacter-mode user interface. All myC-scape customization code workedfine under both DOS and OS/2, with-out even any preprocessor trickery.Apart from some documentation



problems and the lack of MSC 6.00source compatibility, C-scape is a veryclean design with lots of hooks andcapability.

What about all those wonderfulDOS programs with no OS/2 equiva-lents? Well, most DOS programs arequite happy in the DOS box. For thosefew that aren’t, you can use either OS/~‘S dual-boot option or keep aDOS floppy boot disk handy. The onlycritical program that I don’t have isanOS/2 disk backup routine; I do dailybackups from the DOS box and bootDOSaboutonceamonthfortheGrand

Slam backup.

THE PAYOFFS

Part of debugging any programthat uses serial communication is fig-uring out who said what to whomabout what. Normally, the programI’ve been writing about talks to theDDT-51 controller over a three-wire(send, receive, common) cable; I builtan octopus connector that routed thetwo signals to COM3 and COM4 onmy PS/2. Because the PS/2 MicroChannel architecture allows multipleserial ports to share a common inter-rupt line, all three of those ports oper-ate concurrently.

Monitoring the serial exchangeswas a matter of starting twoREXXTERM sessions in PM windows:

COM3 shows the application-to-con-troller messages, COM4 shows thereverse direction. Meanwhile, thesoftware under test is using COMlfrom another PM window. All theresults show up in real time!

Relatively littleof my time is spentcompiling 8031 code in the DOS box.PM supports multiple text windows,so I can edit source code using KEDITin a PM window, compile it with MSC

in another window or the Avocetcompiler in the DOS box, then test itusing CodeView or download a HEXfile to the EPROM emulator throughanother REXXTERM window.

Mostly as a result of Microsoft’sbig Windows 3.0 sales extravaganza,the OS/2 versions of essentially allPC-DOS word processing, spread-sheet, and database programs are nowon Pause while Windows versions are

on Fast Forward. But, as a result of Microsoft’s previous (OS/21 salesextravaganza, I have OS/2 versions of WordPerfect, Excel, Paradox, and alarge collection of utilities.

THEBOTTOM LINE

OS/2 provides an excellent de-velopment environment: once youexperience multitasking, backgroundcompiles, and crash-proof debuggingyou’ll never want to see a DOS promptagain. Even if you develop PC-DOS

programs, using OS/2 will produce aworking version faster and easier.

Windows or Desqview may giveyou many of the same advantages, butI don’t have any first-hand experi-ence. If you have tried DOS programdevelopment using Windows or anyof the other DOS extenders, sign ontothe Circuit Cellar BBS and tell us howwell it works and what you think of the whole process?

Oh, yes, best of luck with thosewild pointers!

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Ap ri l/M ay 199 1 55



Pixie Power

SILICONUPDATE

ITom Cuntre//

A Sw itc h + LCD C om b o for Inte llig e nt I/ O

Havingcovered big, fancy LCDs in a recent article,let’s now turn to a tiny sibling-the Pixie from IndustrialElectronic Engineers Inc. (IEE). The most interesting thingabout this thumbnail-sized display is that it is built into apush-button switch (Figure 1). Thus, the Pixie qualifies asa complete “I/O” device in less than a cubic inch! Thoughthe Pixie won’t replace the CRT and keyboard on ourdesktop PCs, it could be useful in your next embedded ap-

plication.The previous article discussed LCD basics and cer-

tainly there is not much to say about the Pixie’s role as amomentary switch. The real issues for Pixie are a) how toput it to work and b) what the heck is it good for? As for thelatter question, IEE points out the obvious Pixie potentialin applications like vending machines, industrial controlgear, automotive dashboards, and so on. Certainly, broadacceptance depends on the price and the current quotefrom IEE-$37.75 @ 500 pieces ($49.95 singles&--seems alittle high.

Nevertheless, working under the assumption thatelectronic stuff always costs less eventually, the Pixie

should be able to find a home in an ever growing base ofapplications. If yours is one, read on to see how to put thePixie to work. As you’ll see, there are three choices alongthe make-versus-buy curve. Choose whichever is best de-pending on the state of your technical requirements andwallet.

ROLL YOUR OWN

If your design is high volume enough to justify extradevelopment costs which reduce unit costs, designingyour own direct connection to the Pixie switch may beappropriate.

To get started, let’s take a look at the Pixie pinout(Figure 2). The first thing you’ll notice is the Pixie’s thirteenpins arranged in a distinctly nonsocketable arrangement.This is a shame since the Pixie form factor could, in prin-ciple, support a standard 14-pin DIP pinout (I imagine thiswould cause some grief for the Pixie mechanical design-ers-otherwise, wouldn’t they have made this choice inthe first place?). As it stands, the initial challenge (which-ever interface choice is made) is the physical connection tothe switch. A direct wiring scheme won’t work since a PCB

Figure 1 --The Pixie Swi tch co mb ines a n 864 pixel LCD and a p ush-but ton

swi tch .

864 p ixel (24x36) graphic liquid crystaldisplay utilizing super-

twist technology.

,Providing full graphic

Switch

Hoosin

capability or 3 lines of 5x7 alphanumeric

characters.

Low power (40mALED backlightingintegrated into the keycap assuring readabiltyin poor lighting condi-tions.

Custom fC driver

provides all interfacingfunctions to allow up to48 switch modules to bedriven from a singleHD8183OB (Hitachi) or eouivalent control unit.

Ap r il/M ay 199 1 57





(note: Evaluation Kit incl. only 1 Switch)

CPU I

J Ine t v ulu cm o n Kit nee ds only SRAM to make a working prototype circurr.

the way, note that RST andthese five signalsall requireCMOS-level inputs so buff-ers will berequired to drivethe Pixie with the typicalmicro’s TTL-level I/Olines.

Inside the Pixie, LCDdriver chips offer a CRT-

like interface to the outsideworld, though the actualLCD display mechanism iscompletely different fromthat of a CRT.

The Pixie is organizedas 24 rows and 36 columns,thus the Pixie “framebuffer” is 864 bits. SCP(Serial Clock Pulse) corre-sponds to a CRT dot clockand is used to shift each ofarow’s36bitsinto thePixie

you can use your favorite keypad encoder or debouncingalgorithms to interface the switch.

Din lead. At the end of each row, LP (Latch Pulse) latchesthe shifted bits into the row (similar to a CRT HSYNC).

RSTis simple-just give it a 2-ms or so pulse wheneverpower is applied to the Pixie.

Finally, once per “frame” (that is, every 24 rows) FLM

Now we get to the meat of the Pixie LCD interface in(First Line Marker) is pulsed. This is like a CRT VSYNC,

the remaining five signals: SCP, LP, FLM, Din, and DoUt. Bythoughin thePixie it providesAC modulation for the LCDpower.

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watch out for the relatively slow interface timing specs ofthe HD61830B which may call for a wait state or two de-pending on the speed of your micro. Ultimately, after all isconnected, the micro can issue commands/data via theHD61830B to turn individual Pixie pixels on and off.

THE EASY WAY OUT

Don’t have time to fiddle the bits? IEE has the answer

(assuming you’ve got $595) in the form of a small (6” x 6”x 2.5”) box called the Pixie Intelligent Controller.

TheController(shown in Figure41 combines theafore-mentioned HD61830B with an HD64180 MPU subsystemand all the ancillary circuits: CMOSlevel drivers, VLCnegative voltage converter with “contrast” trim pot, evena speaker output jack for adding an audible “click” whena Pixie switch is pushed.

The box connects to your micro via RS-232 which,despite its foibles (how many person-centuries have beenspent wrestling with a stubborn RS-232 port or cable?), isfar easier than either of the previously described schemes.

A50-pinheaderoffersconnectionsforupto 16switches

(you still have to fabricatea Pixie wiring/mountingmecha-nism). This “Pixie Bus” features individual controls foreachof the16switches’backlightsandassumestheswitchesare arranged in a 4 x 4 matrix (the Controller handles thescanning, debouncing, etc.).

Besides handling all the low-level details of the Pixieinterface, theControlleroffers higher level LCD and switchfunctions thereby off-loading the host computer.

The Controller can store 256 Pixie bitmaps: 128 prede-fined and 128 user-defined (note that the user-definedbitmap RAM is battery backed). Once stored in the Con-troller, the host can assign any legend to the switchessimply by sending (via RS-232) a 16-byte “Legend Attrib-

ute Block” in which each byte specifies a legend code for aswitch.

Similarly, the switch backlights are handled with a 16-byte “LED Attribute Block” in which the lower four bits ofeach byte specify the LED status for an individual switch(remember, each switch backlight is individually control-lable). The 16 choices include ON, OFF, and 14 differentblinkrate/pattem combinations (Figure 5). This feature isundoubtedly designed to enhance the user-interface (e.g.,an important or “enabled” switch may blink). Accordingto IEE a forthcoming version of the Pixie will featuretricolor (red, green, and red+green [i.e., yellow]) back-lighting. I recommend moderation when exploiting the

blinking backlights lest your switch array end up lookinglike a Christmas tree.

The switch closures themselves are handled in twouseful ways. First, notification of a switch closure is sent tothe host via RS-232. Alternatively, the Controller includesa connector with 16 lines-one for each switch. A nicefeature is that the Controller performs a mapping betweenthe normally open momentary Pixie switches and the 16output lines. For each switch, the line output polarity andmomentary/continuous action can be specified. Using

Step Motor Controller New SMC20BC CMOS Step Motor Controller outputs a pulse signalfor each step to be taken, and allows programming of direction,base and maximum rates, separate acceleration and decelerationslopes, and distance to be traveled in incremental or absoluteposition. l An internal buffer can be used to store commandsequences for execution of routines on a stand alone basis. Limitswitch, Jog and three programmable inputs and outputs are

provided to make complex operations possible. The controller communicates through an a-bit data bus in either ASCII or binarydata formats.

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COMMUNICATION5 6 I O

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Apr i l/M ay 199 1 6 1



UpTo 16 UpTo 16 UpTo 16 UpTo 16Pixie Switches Pixie Switches Pixie Switches Pixie Switdws Figure6-UUptofouflntelligent Con-

4t ro l ler units ca n be da isy-c hained

f rom a PC or cont ro l com puter ,al lowing as ma ny a s 64 Pi x i e

, 1 swi tches to b e ce ntra l ly co ntro l led.

Cascade Up To 4 intelligent Controllers I I

PC

O d

Computer

these signals and the mapping feature can allow directaction by the Controller in response to Pixie switch presseswithout host computer intervention.

If that wasn’t enough, the Controller also includes adedicated 4-wire RS-422 link which allows up to four units

Contact

Industrial Electronic Engineers, Inc.Component Products Division7740 Lemona Ave.

Van Nuys, CA 92409-9234(818) 787-0321Attn: Louis V. Hronek (x383)

to be daisy-chained thereby increasing switch capacity tosixty-four (see Figure 6).

Right now, such a setup is rather expensive. Neverthe-less, I suggest you keep your eye (not just your finger) onthe Pixie.

Tom Cantrell holdsa B.S. in economicsandan M B A from UCLA. Heowns and operates Microfuture, Inc., and has been in Silicon Valleyforten years involved in chip, board, and system design and marketing.

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tion or “universe” is to be estimated from a few measure-ments, that found by expression (1) may be divided by afactor c that depends on the sample size. A table of thesefactors appears in many books on statistics, such as the“Statistical Quality Control Handbook” (AT&T, Indian-apolis, Indiana) on page 131:

Sample Size c

2 0.56423 0.72364 0.79795 0.84076 0.86867 0.88828 0.90279 0.913910 0.9227

In Figure 1, the value c is plotted against sample size.As expected, c2 rapidly approaches 1.0 as the number ofsamples is increased. The figure also shows a curve of thefunction

a=qr (2)

which, considering the restriction on the fit, is remarkablyclose to the values in the table (the restriction was that itmust use the square root).

Expressions (1) and (2) can easily be combined,yielding

o d (3)

The standard deviation corrected for sample size byexpression 3) differs from that based on the table valuesby less than 1.5%.

Equation 3) correctly indicates that no conclusion canbe reached from a single sample, since the result becomesimaginary (i.e., has no “real” meaning). Since the expres-sion is easy to use and remember, it recommends itself togeneral use in finding standard deviations. e

Charles Boegliispresidentof Randen Corporation inBlanckester Ohio.Randen is a small consulting/engineering company that specializes ininterfacing computers to test and monitoringequipment,and inanalogcircuit design.

4 19 Very Useful420 Moderately Useful421 Not Useful

64 CIRClJ T ELL R INK



Autorouters

06

01

From the BenchWorking with an AutorouterInteg ra t ing a New Too l into a n Esta b lishe d Engineering Routine b y Jeff Bach ioch i

Bringing in the ProsWo rking w ith a Boa rd De sign Firm

b y C urtis Flank/ in Jr.

i..

.





AUTOROUTERS

JACK OF ALL TRADES vs.MASTER OF ONE

will show in the final design, so make going to be a problem. It’s like buyingthe marriage work or switch design- a new pair of pants: you always seemers or design houses. to need the next larger size.

Our design group stays prettybusy with the design aspects of aproduct. This includes not only thecircuitry but often the packaging ofthe product. In this age of specialty, itmakes the most sense to let the spe-

cialists do what they do best. Many ofour more complicated/compact de-signs require additional layers aboveand beyond the double-sided boardstypically in use. This reinforces theneed for specialty houses.

BUDDY CAN YOU SPARE A DIME?

So you say there is more to lifethan justdrawingpictures-you wanttotal creative control? Well, the same

machine that lets me document sche-matics now allows me to lay out PCboards.Two thousand dollarscanbuyyou the minimum hardware, but don’tbe fooled; it’s only the start. A biggermonitor, like the NEC MultiSync 5D,

Let’s step back for a moment andtake a look at how schematic captureand layout/routing share information.Schematics are pictorial representa-tionsofindividualgates,discreteparts,connectors, and so forth. Lines inter-

connecting the pictures represent elec-trical paths. The schematic program’soutput file, called a net list, is a de-scription of each part and each net.The part is defined by name (e.g., re-sistor) and its reference designator

I I

Schematic

t

I/’ I

17 .i”

Net List i: ‘+ Gerber

0 Layalla 0Plot File

II ; .“.I

* RouteEngine

At this time1 can’t conceive tryingtofabricateourownmultilayerboards.I generally don’t get involved withselecting and qualifying a fab house

because, once final films are made, theproject is handed over to the produc-tion department. Prior to final films,however, a close bond between circuitdesignerandlayoutdesignerisamust.As circuit designer, you must conveya sense of flow, as well as nonobviouspit-falls in the circuit design. Partsplacement is critical, affecting bothform and function. If you aren’t mesh-ing well with the layout designer, it

will cost twice that alone. Expanded/extended memory, printer/plotter,mouse, and a UPS will quickly drainyour bank account. I haven’t even

mentioned the cost of software.. .Yes, you can get your feet wetwith a minimum amount of invest-ment. But it won’t be long until thesize of the board being designedreaches the 640K DOS limit. At thispoint you pause in disbelief and startstripping out all of the memory-resi-dent stuff that automatically loads inon power-up! You may have savedthis design, but sooner or later 640K is

(e.g., Rl). A net is a list of all thecomponent pins which are connectedtogether. Net connections are listedby the reference designator followed

by the pin number (e.g., IC1.6 [pin 61).The schematic capture’s outputnet list file is the layout/router’s inpu t

file. The information is the same,however in the layout package theparts are displayed in their physicalform as opposed to their symbolicform (as they are in the schematic).The nets are temporarily displayed assimple”shortestdistance”conncctions(often called a “rat’s nest” display).

Apr i l/ May 1991

6 7



FOUR ON THE FLOOR

The first part of the layout designis the physical mechanics of the circuitboard, including board outline andmounting holes. I save the emptyboard with a file name such asBOARDl. This allows me to use itagain in another design without hav-

ing to redraw it. At this point the netlist can be read in. Parts not in the PCBlibrary are flagged. These should becreated before proceeding.

I don’t find autoplacing of com-ponents very useful. This seems tocause more problems in a design thenthe time it saves. I prefer placing theICs on a board in some logical orderby using the rat’s nest as a visual indi-cation of signal flow. Connections aremade daisy-chain style, in the order inwhich they fall in the net list. For in-stance,anet consistingof IC1.l (pin l),IC2.2 (pin 2), and IC3.3 (pin 3) are allelectrically connected. If ICI is moved,pin 1 will stay connected to IC2.2 evenif it’s physically closer to IC3.3. Asparts are moved around the connec-

tionscrisscrossina jumbled mess.The a new name (BOARD2). If the routeworse the rat’s nest, the more difficult does not go well, I can get back to athe routing will be. clean slate easily.

The best connection pattern isoften the shortest distance and notnecessarily the order in which the listwas read in. Here is where the com-puter can speed things up. Each net isanalyzed to find the shortest connec-

tion path to all points within the net.This is not routing, merely a minimiz-ing of overall net lengths, whichredis-tributes the connections in the daisychain.

WHICH ROUTE TO TAKE?

A constant arranging and rear-ranging of parts is necessary until allparts are placed on the board in sucha way as to minimize rat’s nesting asmuch as possible. Each crossing of anet will most likely require a via. Sincevias take up space, result in a potentialweak point, and increase board costs,I keep them to a minimum.

I spend about 25% of the total PCBdesign time in layout. It is a crucialstep in the outcome of the final prod-uct. When satisfied with the partsplacement, I save the file again, under

Multilayer boards (those withmore than two sides), usually haveinternal power and ground planes, so

routing power and ground is unnec-essary. On double-sided boards,though, they must be routed, and Iprefer to route them first. In general, Iuse 30-50 mil traces. This means atrace will not fit between ICs or othercomponents with 0.1” lead spacing,but they will fit nicely through thechannel beneath ICs. Therefore, keep-ing the ICs in nice even rows makesfor cleaner routes. The ability to selectwhich nets are routed is helpful be-cause there are different algorithmsfor each type of circuitry. Power/ground, memory, digital, and analogcircuitry are all handled differently.

The manual router, which is partof the Schema PCB package, will al-low you to hand route your board.

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AUTOROUTERS

job sit down with thedesigner or go throughcritical placement usingthe placement aid tools.Using the schematicand input from theengineer we will comeup with a final place-ment. We use no autoplacement software onour systems-it justdoesn’t lend itself to agood design. There aresome fairly slick place-ment packages outthere but the humanintervention in partsplacement [is vital].

An lntergra ph System is used to c ontrol the f ina l loser plot t ing of f i lm . t is

l inked to the de sign and rout ing system s by u h igh - spee d loca l a rea

M ore and more peopl e are usi ng

surface mount t echnology. Ar e you

f inding that i t is havinga big

effect

on part s placement?

The problem with surface mountis conversion from standard through-hole technology to surface mount com-ponents. At one time there wasa prob-lem with the footprint for the surfacemount components, but the IPC (In-stitute for Interconnecting and Pack-aging Electronic Circuits) has steppedin and is starting to regulate the sur-face mount footprint pads.

In the early days of surface mount,Hitachi would design an IC and wouldhave their own surface mount pat-tern. In order to lock the customer intothat part they’d have a custom pad.Even the difference between infraredand vapor-phase soldering deter-mined which part you used, how youdesigned a board, and what pad orfootprint you put down for the part.Now, the IPC has stepped in and mostcompanies around the world havestandardized so that you have a uni-

versal pad for any given part. Mostcompanies are submitting their foot-prints to IPC before they put out theirrecommendations and standards.

We are the only service bureau inthe country that is directly associatedwith the IPC. One of the employeeshere is on the IPC committee to re-write Mil Standard 275. In fact, he is inCalifornia now because the IPC is re-leasing the IPC D-275 standard and he

72 C IRCUIT CELLAR INK

has to be there for that release. Thegovernment is getting out of specifi-

cation writing and they are turning itall over to the IPC. Every designer inhere is up to the IPC standards-thenew standards for designing boards.

Af t er t he pl acement phase, what

happens?

After we do placement we thenmanually route in any super-criticallines, restricted areas, or unusual fea-tures. We determine at this pointwhether the board is going to be con-

trolled impedance. Impedance con-trol is becoming more and more com-mon and has to be designed into theboard because a combination of de-sign technology and board fabricationhelps you maintain your impedancein a given line. If you don’t do certainthings [in the design phase] you can’ttest for control impedance-it’s im-possible. Those things are automati-cally factored in. One of the reasonswe can do this is that we have customsoftware here that was written using

data compiled from dozens and doz-ens of production boards, then used toset the parameters for the line require-ments. The line thicknesses take intoaccount the production etch-back fac-tors, process allowances, and otherfactors, so that you can hit the numberright on the head.

After these items have been con-sidered and taken into account, wehaveall critical linesand short runs in,

and all those lines arelocked down, we thengo into our route en-gines. The technologiesand routing strategiesthe designers have de-veloped over the yearsdetermine how well theroute engine works.

THE ROUTE ENGINES

A route engine isnot going to work andgive you a high-qualityproduct unless you in-teract with it on a regu-lar basis-it’s just likeanyothercomputer. An

example is the Cadnetix route en-gine-it’s an extremely sophisticated

route engine. Our designers work onit regularly and spent a lot of time upfront working on the strategies. Theyhave a very good understanding ofhow it works and we get more high-quality, consistent, 100% routesonourengines than a company that hasn‘tspent the time to develop the strate-gies would.

The aesthetic value of a board isalmost as critical as the functionalvalue because your customer is goingto see the end product. If the board

aesthetically looks like a piece of junk,it doesn’t make any difference howwell it works-thecustomer will thinkit’s a piece of junk.

We had a problem with our routeengine and went to one of our custom-ers, an in-house operation, and leasedtime from them. We used their routeengine as it related to the Cadnetixsystem. When we went down and satwith their designers, they were hav-ing a problem routing a board on theirroute engine. These guys were fairly

experienced, but there was a produc-tion “get it through-get it out-get itfast” [mentality] and our designer wasable to educate them on some of thetechnologies. Now, they are gettinghigher percentage routes than everbefore, based on what our designertaught them. The CAD houses can’treally teach you the routing strate-gies-you have to get in there andhack and play and experiment.



AUTOROUTERS

Our special section is on autor A route engine is an off-line com-outingbutI noticeyouusingthephrase puter dedicated to routing boards. Itroute engine. What i s the dif ference runs autorouter software.between a route engine you use and There are several different typesthe autorouters available on PCs? of autorouters. You‘ve got rip up re-

Human intervent ion is an impo rtant par t of the p rocess. from design and rout ing to (shown

here) the phy sica l produc t ion o f fi lm.

place, push and shove, and others.The complexity of the board deter-mines what type of router you use.Basically they are all autorouters be-cause your are not getting in there andstitching each item by hand.

[Routeengineslareextremelyfast.On the Cadnetix, we did a route thatwas 30 ICs and 30discretes-it routed

100% in six seconds.

What addit ional time was spent for the cleanup process?

I think the cleanup took two orthree minutes; not more than that.

Speed is one of the big reasons forthe power that we have in here. Mostof your three- or four-thousand dollarroute packages don’t do the via mini-mization that the big powerful en-gines do. Let’s face it, every hole you

drill on that board is going to cost youmoney. Every via costs you x amount:If you can eliminate 150 vias on aboard infabrication,eachcostingone-half cent apiece, you can save a lot ofmoney if you’re making a hundred

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AUTOROUTERS

thousand boards. Also a via is a weaklink-it’s just anotherlinkin thechainand if you can take that link out andmake a direct connect you have a morereliable board. Via minimization is atough one for these small packages.

After we pull the board out of therouteengineandit’sdoneallitsmagic,we then go in and do interactive clean

up. We eliminate much of the stair-stepping that is automatically put inby route engines. We do additionalvia minimization and we do pad cen-tering.

A lot of the hand work is clean upfor manufacturability-via minimiza-tion and the aesthetic value of theboard. We eliminate the tangent con-nections to a pad wherever we can,primarily because they are weak linksthat could be questioned at any pointin time. You don’t want engineers and

fabricators asking whether or not aconnection is correct-whether it is ashort or a good connection. It’s just alot of visual peace-of-mind not only tothe customer and his engineers but tothe fabricatorsif it’sa good fabricatinghouse.

Once the cleanup is done, we thenplot check prints on a 2:l scale andsubmit them to the customer. Checkplots are thengone over very carefullyby the customer. If he hasanyrequestsfor changes, they are made at no costto the customer at that point. Thereisn’t a printed circuit board designedthat doesn’t have at least one changeto it. Once the changes are completed,we go through and write the book onthe silk screen and do the silk screendrawings. We create the drill tape, fabdrawings,doourlaser-photo plotting,and the job is released.

TIMING IS EVERYTHING

Normal ly , what k i nd of t imes would be inv olv ed in a cycle li ke that ?

Ournormaldeliveryis two to threeweeks.

That is from first informati on in

t he door unt i l t he j ob is rel eased?

Right-and there are stop timesinvolved there. Now [two to three

Pen-p l o t ted ver sions o f t he des ign , a t 2 : en la rge me n t , a re che cked and ap proved b y

c ustom ers b efo re f ina l f ilms a re la ser plot te d .

Laser plot ters an d thei r ope rators wo rk in the c onstant ruby tw ilight of a ligh t -safe area .

The l a t e st Ca l a y

syste m s use Sun

Sp a r c st a t io n s a s

platform s. Eac h sta-

t ion in the system

c osts as muc h a s 10

w e l l - e q u i p p e d

80386ba sed PCs.

74 C /KU/7 CELLAR INK



AUTOROUTERS

weeks] is our normal turn-aroundtime. That gives us a real delivery datethat we can look for. In that two- tothree-week time is a “clock-stopping”mode-actually, two and possiblythree clock stops once we submit theschematic. While that may sound likea lot of dead time, things usuallyproceed pretty smoothly because

we’re building the parts for the boardand the board outline while the engi-neer is checking the schematics.

If the engineer does his job andturns that schematic around, there isno stopping involved. But if we get toa point that we have the parts andboard built, and the engineers are lag-ging behind us, we’re at a dead stan-dstill. We can’t do anything becausewe don’t know whether the net list isany good.

A lot a times we will begin to use

he net list because we’re sure it’s ateast 95-99% correct. We will then takethe unapproved but still pretty goodnet list and load it in. We’ll use it as a“go by” just to start the placement sohat we don’t lose time on the job. The

engineer may have been pulled off todo something else and his prioritieschange for internal reasons. We try togo as far as we possibly can withoutstopping the job.

On many jobs, the engineer re-quires an interface with us in place-ment and critical routing. If he’s avail-able when we are, there is no stopping

involved. If he’s not available, thenthe job will stop because it’s fruitlessto go on without the input. The onlytrue stop point that is built into thisschedule is the check plot stage. Oncewe have sent the customer the checkplot, we do not touch that job againuntil we hear from the customer.

Once we have the customerchanges in hand, within 24-36 hourswe are ready to be in fabrication. I’mnot talking about “working hours,”where 24 hours can stretch over three

or four days, I’m talking about actualhours.

Engineering changes take prece-dence over new work within our envi-ronment. The reason is [that, with] thepower of theequipment we have here,

changes do not take an awful lot oftime. We are cognizant of the fact thatthe engineer has already prototypedand tested, he’s troubleshot and he isready to go to production, and the guythat we’re designing the new boardfor probably doesn’t have all his partsyet because he’s at least two weeksaway, on a normal turn around time,

from being ready to build a prototype.The changes are made almost instan-taneously on the CAD system

What about t he changes that are

made afte-r t he design has been i n

product ion for a w hil e? Do you have

to go back and start over?

We maintain an archive file of allthe boards that are now, or ever havebeen, on the system. Let’s say that,three years ago, we designed a board

for somebody. If the customer changesthat board we can go pull it up on thesystem and make whatever changeshe requires to it. We feel this adds alarge factor of service and conven-ience to our customers. There is a safety

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us that the board could not be fabri-cated as it was laid out.

We started poking into the tech-nology specified in the database andfound that the original designersdidn‘t know how to set the technol-ogy tablesup.Theydesigned theboardat 1.25:1 scale so they could use thedefault technology of their CAD sys-

tem. Then they post-processed at a re-duction scale factor and played gameswith the aperture list so they couldphotoplot it and get a product out

We totally understood now whatthis designer did and we couldn’tbelieve it. We wanted to help the cus-tomer out but there was absolutelynone of the previous design that wasworkable according to our standards.We ultimately redesigned the boardfrom the ground up.

When we redesigned the board

we used the proper technology andtheproperroutingstrategy. Weaddedthree ICs to the board, repackaged it,rerouted it, and ended up using singlepass-through technology instead oftwo-between technology. Since WC put

all the pass throughs on the right sideof the board, we had fewer vias on theboard than the original design. Thecustomer put that board into a pro-duction mode and hasn’t had oneproblem since.

It sounds li ke you’re sayi ng that ,

w hi l e t he rout e engine may be the

fastestpartof thesystem,i t ’snot themost pow erful .

I don’t care how powerful thesystein is-if you don’t have a de-signer that knows how to make thesystem work and knows how to de-sign a board as it relates to productionand manufacturing, the system willdo you no good. When you get downto it, the designer is the power behindthe system.+

Curtis Frunklin, Jr is the Editor-in-Chief of Circuit Cellar INK.


Circuit Cellar INK is looking for qualitymanuscripts on software for embed-ded control, software applications,advanced algorithms, and tutorials ontools and techniques for developingsoftware.

These manuscripts will be consideredfor publication in Circuit Cellar INK .

The Computer Applications J ournal.and in a planned series of books to be

published by CCINK.Circuit Cellar INK offers writers andengineers a technically sophisticatedaudience and professional editorialguidance.

The CCINK Author’s Guide is availablefor downloading from the CircuitCellar BBS. Prospective authors maysend mail to “Curt Franklin’ on theBBS, or send proposals for manuscriptsand requests for Author’s Guides to:

Curtis Franklin, J r.Editor-in-Chief Circuit Cellar INK 4 Park StreetVernon, CT 06066

PROJECT COMPONENTS AT BLOWOUT PRICES

Item/Chip CCC Project Blowout PriceIS-32 Optic RAM Micro D-Cam $25.00

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SN76832AN IR REC IR Remote Control $1 .oo

9Y-3-3350 Synthesizer Whim&Bell $3.50TMS9918AN Sprite Gen. Color Video Display $5.00

TMS9118AN Sprite Gen. 3 Chip Color Vieo Display $9.00

TMS99532AN Modem Single chip 300 bps Modem $5.00

TMSll21 Real Time Ctl. Chip RTC-4 Timer/Controller $6.00

SPIOOO Voice Recog. Chip Lis’ner Voice I/O $10.00

HD6802P Processor HCS - 6802 Processor $1.50NCR5380 SCSI Controller COMM80/SBl8O-SCSI $15.00

ADCO831 8-bit A/D Lis’ner Voice IK $2.00

Ceramic Mike Acoustic Modem $1 .oo

Acoustic Modem Rubber Cups Acoustic Modem $2.00 pair

4.032 MHz Xtal For TMS99532 Modem Chip $0.7510.738 MHz Xtal For Sprite chips $0.757.16 MHz Resonator For SPlOOO Chip $0.75

BT450 Video DAC GTl8O-Analog Video Driver $25.00

Z8613RS Z8 Protopac Piggyback EPROM Z8 Chip $15.00

Minimum order $25.00.Prices do not include shipping.

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The EC-32TM is a versatile 8OC32 microcontrollerboard. It is ideal for quickly developing products,prototypes or test fixtures.

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Apr i l /May 19 9 I 77



FEATURE ARTICLE R tiottcoppenmitf

A Pa ra lle l-C om m unic a t io n Lig ht ing B ZYh --

M IDI Po te nt ia l

This project started when a bandsked me to build a low-cost lighthow that could be interfaced withheir MIDIequipment. The basic stageayout they wanted to use is shownn Figure 1. They wanted a con-roller for eight 300-500-W floodamps: This controller would

onnect to both their com-puter and their musical in-truments. The project has

ControlModule

Computer Table

ince evolved into ‘this 8hannel light show con-rolled by a PC parallel

port, direct audio source,r a combination of both.

The hardware is di-vided into three sections.The first is the control

P1 Q15A 120VAC Wall Outlet

=S12

Tree

Power Module

15A 120VAC Wall Outlet

5 64=

7 6

Tree

panel that interfaces di- Lights

to the PC and audio

ource. The second is thepower module thatcontains

and most of the ACwiring. The third consists ofwo 4-outlet 110-VAC poweroxes, each with its own power

plug. The separate power plugsmake it possible to double the avail-ble wattage usable by the system.

CONTROL PANEL

The schema tic for the control panel

s shown in Figure 2. The computernterface is straightforward. Connec-or Pl goes to the computer’s parallel

port. Pins 2-9 are data lines DO-D7.Pin 1 (*STROBE) latches the data intohe 74LS573 and is also tied to pin 10

Pin 11 (BUSY) is tied todigitalground along with pins 18-25. Pins

2-17 are not used. The 74LS541 isused as a buffer and as one more

Lights

I

Floor Lights

Figure 1 -A ba si c ayou f for stag e l ight-

ing ca n be c ont ro lled wi th the simp le

co nt ro l ler de sc r ibe d he re. Cont ro l can

be d i rec ted via PC pa ra l le l pot f , m usic

source , or both.is the voltage source

for the LED bargraph dis-

layer ofprotection

input. This input

for the computeragainst the various high volt-ages in the system.

The other input to the controlpanel is a standard l/4” phone jack.This input is for the audio source. Theaudio output from a drum machinecan connect directly to this input withapatchcord.Theoutputfromamicro-

phone preamp will also drive this

play driver UAA180. The UAA180 ismanufactured by Siemens, and is usedin some automotive graphic equaliz-ers. There are other choices for thisdriver, depending on how you wantthe lights to operate. Drivers are avail-able with either linear or log outputs,and single LED or multiple LED con-figurations. I chose the UAA180 be-

Ap r i l / M a y 1 9 9 1 7 9



iPower Tabla

Figure2--The control pa ne l for the l igh t ing c ontrol ler . Eight l igh t ing c han nels are g roup ed into two sets of four for contro l purposes. An LED ba rg r aph prov ides visual feed ba ck .

cause I had a broken graphic equalizer invert the signals. A 74LS541 can be front panel and is used to select thelying around that I could use for parts. substituted if you don’t want the sig- channel limits for this option.The 74LS540 is used to buffer the nals inverted. A gain control (VRl) for The eight channels are groupeddriver’s outputs, and in this case to the audio source is mounted on the into two sets of four. Two 74LS157s

Figure me po we r mod ule of the l ight ing c ont ro ller. Fi lter ing a nd g rounding a re impo r tant c onside rat ions when l ight ing a nd a udio

equ ipmen t a re be ing po wered f rom co mm on c i rcu i ts.

a0 C IRCU/T CELLAR INK





FEATUREARTICLEErnest tier

Working withZeropower SRAM

A s programmable devicetypes have flduri~hed, engineers havebeen faced with a dilemma: The newdevices offer new capabilities and (of-ten) important advantages, but theyseldom work with existing deviceprogrammers. This article presents asimple three-chip circuit that reads

and,most importantly, writes theSGS-Thomson Zeropower static RAMS, asthese devices are not supported onmost EPROM programmers. In the

Build ing ZM EM , The Ze ro p ow e r M em o ry C hip

Prog rammer

process, we will show some tradeoffsbetween hardware and software de-sign.

For background, the ZeropowerRAM, SGS-Thomson part numberMK48Z02, is a 2K x 8 static memorychip with an integral lithium battery.This chip has the characteristics of a

CMOSstaticRAM with thebonusthatit retains its data when not powered. Itamounts to a fast, infinitely repro-grammable 2716 EPROM.

In this application, the host CPUis a dedicated 280 system that bringsthe RD*, WR*, data lines, and the loweraddress lines out to the external inter-face. In addition, an external deviceselect line, ES*, decodes I/O portsCO-CF.

A BASIC DESIGN

The basic design increments anll-bit counter through all states to

P o we r T a b le

280

I n t e r f a c e i

tlgure 1 -A simp le three -ch ip c i rc u i t, wi th an interfac e to a b asic Z80 c o ntro lle r, is a / / the hara luare req u ired to prog ram the Zeropow er

SRAM .

4 C lRCUlT CELLAR INK





CONNEC-TIME

Condu c t e d b y

Ken Davidson

Excerpfs from the C irc uit Ce lla r BBS

We’ve had a ve y active discussion going on lately aboutcomputer-controlled theatrical lighting. Smce we have acompanion article on the same subject in thus issue (page79), I thought it appropriate to share what‘s been going onon the BBS. There is more on the BBS than would fz t here,so feel free to call and add your two cents’ worth.

Msg :36721

From: DAVID MEED To: ALL USERS

I was just wondering if anyone knows anything about theatricallighting controllers. The ones that I have looked at commerciallyare quite expensive. Does anybody know what is m them?

I figured that an 8051 could monitor zero crossmgs on the AC power line and turn on a triac at the appropriate time to dim thelight. It would receive info by serial line about how bright thelight should be.

What kind of rating do you need for a triac in this instance? Thelights are quartz halogen rated at 500 watts. Would a 6-amp triacdo the trick or do you need to allow for a 3-5 times current surgewhen turning the lamp on from cold?

Msg :36729

From: JEFF BACHIOCHI To: DAVID MEED

Zero-crossing is a good idea for turning things on as long as youwant it on for a full half cycle (the next zero crossing is the onlyway a triac will shut off).

The sta.ndard Opto (OACx) modules are zero-crossmg switches.

You can simulate dimming by the ratio of on/off cycles, but theflicker makes it ugly!

Fortunately Gordos makes a random turn-on module (suffix -

RN) which allows you to turn the triac on anywhere m the cycle,then it goes off at the zero-crossing. Yes, you can have iarge in-rush currents, but that’s the tradeoff!

Msg :36733

From: ALAN SANDERS To: DAVID MEED

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You’re on the right track. I’ve been doing it for years. 1 can get back to you on the details but of the top of my head...

1 Correct about catching the zero crossing; I’m sure the 8031 cando it in time, but you have to get It going both ways.

2) The switching end of my dimmers are modeled after those of

the big guys. For a 2.2-kW dimmer channel, I use a 40-A triac. It’sa little conservative, discs or SCRs would be better. They handleline transients more gracefully. Must have filtering on each load.

3) A 6-A triac could do 500 W, but remember that it’s vulnerableto line transients (it will latch), and (got it right again) in-rushcurrent if your filament is cold will blow it.

4) That’s why we use “lamp warming.” Always flow a littlecurrent. Nothing visible, lust enough to keep things warm.

5) The eye is not a linear device! There are special gamma tablesof one form or another in most professional lighting systems. This provides an apparent linear change in brightness for a linear

change in control voltage.

Msg :36756

From: DAVID MEED To: ALAN SANDERS

Looks like you know all about these animals. Are there commer-cial units that you are aware of that don’t cost an arm and a leg?Is 11 worth “rollingyour own” using an 8051 and a triac with somekind of RF inductor filter? Or would it be cheaper in the long runto get commercial units?

It looks too simple, so I expect that there are all kinds of things inthe basic design that start to get complicated after you make one.

1 am curious why you would mention SCRs. Don’t they onlywork one way? Or do you use a pair of them?

Msg :36865

From: ALAN SANDERS To: DAVID MEED

Professional gear s all pretty expensive. You’ll still spend moneyonyourown,butdependingonyourneedsyouwillsave.ItreallyIS pretty simple. Generate an mterupt on each zero crossing. Start



a delay loop for each channel. When your timers expire, fire your triacs. The longer the delay, the dimmer the lamp.

As a side line I run sound for a local rock and roll band. Thelighting system was put together by myself and an old partner.We have a big box with 32 channels at 2.2 kW each. This residesnext to the stage along with a fire extinguisher (have not neededit yet!) with cables running out to each fixture. It’s a lot of power so you have to be careful (kids don‘t try this at home!).

It’s intesting you mention using a micro. The design describedabove is approximately seven years old and I have been meaningto convert it to digital. If I ever get enough time together I will.

In another message I saw a reference to having the dimmer at thelamp. As other messages suggest, this may not be a good idea.

MS@:36778

From: GREG MILLER To: DAVID MEED

Actually, a lot of the questions have already been answered.Especially note comments about cold-filament in-rush current,and gamma curve relating to eye sensitivity. No, you don’t needa zero-crossing device (in fact, you don’t want one; you need toturn on at a varying point in the cycle, to change the brightnessof the lamp). You use two SCRs back-to-back, and get muchbetter results than with one triac.

However, in your question, you said “theatrical” lighting con-trollers. I’vedone theatrical lighting on and off (no pun intended)since 1974, and I can tell you that the last thing I’d want is adimmer module at each lamp hanging 25 feet in the air over thestage (or out on the balcony rail in the house) when the dimmer failsinthemiddleoftheshow.Thedimmersshould bebackstageat the lighting board, so if something dies I can try to patcharound it without stopping the show in the middle of the act. Soif you’re really thinking about theatrical applications, I’d have

my doubts about that approach. (Also, you’d then have to run ahuge feeder cable to each light pipe, to supply enough current for all the lighting instruments on that pipe, and tap into that cableevery 18”or so to connect another dimmer module; it seems morepractical to do it the way it’s done now.)

Msg :37037

From: DAVID MEED To: GREG MILLER

My particular application is in our church for the Christmas play,Easter cantata, and plays that the day school puts on. What wehave now is a dozen light dimmers and 150-W floodlights fromthe local hardware store. It does work, but isn’t real pretty, and

not terribly bright. I am looking into the feasability of gettingsome real lights and that is why the “theatrical” title. This wassupposed to be for Christmas. It now looks likeit will be a while...

My initial idea was to have a panel of dimmers backstage, but itappears more costly, although being able to patch around a baddimmer makes a lot of sense.

It seems that we should have lights in front of the stage, over thefront of the stage and at the back of the stage, and possibly somefootlights. Running a separate circuit from backstage to each

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April/May 199 I 87





Another technique is to always keep the dimmer turned onlightly, so that the filaments are always glowing dimly; thiseeps their resistance high, so that when you turn them up bright,he in-rush current is less.

Gamma table is the same no matter what lamp you use (at leastn practice, if not in theory). It’s analogous to using log taper potsn an audio circuit, rather than linear taper, so that pot rotationeems to be proportional to perceived loudness. In fact, if you

want to control your dimmers manually, you could probably

nd an appropriate taper control that would solve the problem.

m sure 256 steps would be adequate, and you could control eachimmer with one &bit number. I started to breadboard a similarystem (only for control of slide projector lamps) years ago, asollows: built a 555 timer, locked it to power line crossing, usedto drive a linear ramp generator (from a current source circuit

with an LM3900, I think). Then the ramp went to one input of aomparator, and the &bit word to the other input (after goinghrough DAC). The comparator output turned on the SCRimmer. It was actually not a digital dimmer, but a hybrid, and

was easy to build with the technology at that time. You could done now without all the analog mess, given available (i.e., afford-ble) technology today.

Keep in mind that your ramp (whether digital or analog) doeseed to be in synch with the same phase of the power line thatowers that dimmer, otherwise, you’ll have all kinds of strangetrobing effects.

Good luck...hope you make it by Easter. By the way, there may be

a lot of used lighting equipment on the market, if your ultimateinterest is in a lighting system, rather than in a project, per se.

MS@:37695

From: GREG MILLER To: DAVID MEED

By the way, I was just looking over the specs for a commerciallymade theatrical dimmer rack. Here’s what they say about theirSCRs: These dimmers are rated at 3.0 kW, so that’s a nominal

current of 25 amps. “individual silicon-controlled rectifiers car-rying load current shall...have peak nonrepetitive surgecurrent...of 350 amps....” This dimmer is for use at 120 VAC.

The specs also mention the inductive filter to “limit objectionableharmonics; limit radiated radio frequencies; modify the steepwave front...to reduce acoustical noise in lamp filaments.” (Yes,

I forgot to warn you about the acoustically audible “buzzing”noise the filaments make when you feed them with a steep wavefront.) So you see the folks who have been making these thingsfor a while have encountered the same problems you‘refacing...only they’ve already solved them, while you’re justbeginning to think about them!

Msg :37895From: DAVID MEED To: GREG MILLER

That peak nonrepetitive surge current is not the rating of the SCRunless I am mistaken. The only question is, what is the nominalcurrent rating of that SCR?

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A p r i l / M a y 7991 89







Documents

Circuit.cellar.020.Apr May.1991