China Semiconductor Technology InternationalChina SemiconductorTechnologyInternational Conference 2011 (CSTIC2011) Editors: H.Wu SemiconductorManufacturing International Corporation

China Semiconductor Technology International

Conference 2011 (CSTIC 2011)

Editors:

H.Wu

Semiconductor Manufacturing International

CorporationShanghai, China

C. Glaeysimec

Leuven, Belgium

Y.Kuo

Texas A&M UniversityCollege Station, Texas, USA

K.Lai

IBM, Thomas J. Watson Research Center

Yorktown Heights, New York, USA

A. PhilipossianThe University of Arizona

Tucson, Arizona, USA

T. JiangMaxim Integrated Products Inc.

Sunnydale, California, USA

S. Xiaopingimec

Leuven, Belgium

Q. Lin

IBM, Thomas J. Watson Research Center


D. HuangPraxair

Danbury, Connecticut, USA

R. HuangPeking UniversityBeijing, China

Y. ZhangYorktown Heights, New York, USA

R.Liu

Fudan UniversityShanghia, China

P. SongIBM, Thomas J. Watson Research Center


The EllectroiiheiniGal SocietyHIMtransaCtlDllS

65 South Main Street, Building D ii-i *

Pennington, NJ 08534-2839, USA WUI. OH IVU. I

tel 609 737 1902

fax 609 737 2743

www.electrochem.org

ECS Transactions, Volume 34, Issue 1

China Semiconductor Technology International Conference 2011 (CSTIC 2011)

Table of Contents

Preface

Chapter 1

Design and Device Engineering

Embedded Non-Volatile Memory Technologies 3

D. Shum (Infineon Technologies Taiwan Co. Ltd.)

ANovel High Programming Efficiency and Highly Scalable Flash Memory 9

Cell Based on Tunneling FET (TFET)S. Qin, P. Tang, Y. Cai, Q. Huang, Y. Tang, andR. Huang(Peking University)

Design ofa l-T Image Sensor by Simulation 17

X. Liu, S. Zang, X. Lin, C. Cao, P. Wang, andD. Zhang(Fudan University)

Deposition ofZnO Films by Sputtering and its Resistive Switching Properties 25

F. Wang, K. Zhang, B. Yang, L. Wang, andK. Song(Tianjin University ofTechnology)

Leakage Engineering Enabling PDSOI Ring Oscillators Operating in 31

Sub-100pA/|im Iofr RegimeZ. Ren (IBMSemiconductor Research & Development Center), J. Cai

(IBMResearch Division), R. R. Robison, B. Jagannathan(IBMSemiconductor Research & Development Center), D. Park, and

T. H. Ning (IBM Research Division)

v

Ultra-Thin Body and BOX (UTBB) Device for Aggressive Scaling of 37

CMOS TechnologyQ. Liu (STMicroelectronics), A. Yagishita (Toshiba), A. Kumar (IBM),N. Loubet (STMicroelectronics), T. Yamamoto (RENESASElectronics),P. Kulkarni (IBMResearch), F. Monsieur (STMicroelectronics),A. Khakifirooz, S. Ponoth, K. Cheng, B. Haran (IBM), M. Vinet

(CEA-LETI), J. Cai (IBM Research Division), P. Khare, S. Monfray,F. Boeuf(STMicroelectronics), S. Mehta, J. Kuss (IBM), E. Leobandung

(IBMResearch), M. Bane (RENESAS Electronics), H. Bu

(IBMResearch), K. lshimaru (Toshiba), T. Skotnicki, W. Kleemeier

(STMicroelectronics), M. Takayanagi (Toshiba), T. Hook (IBM), M. Khare

(IBM Research), S. Luning (GLOBALFOUNDRIES), B. Doris

(IBMResearch), andR. Sampson (STMicroelectronics)

Simulations ofFDSOI CMOS with Sharing Contact between Source/Drain 43

and Back Gate

M. Xu, Q. Liang, H. Zhu, H. Yin, Z. Luo, D. Chen, and T. Ye

(Chinese Academy ofSciences)

Scaling MOSFETs with Self-aligned Super-Steep-Retrograded Halo (3SRH) 49

B, Wu, W. Xiao, H. Zhu, Q, Liang, H. Wu, H. Yin, Z. Luo

(Chinese Academy ofSciences), H. Yu (Nanyang TechnologicalUniversity), D. Chen, and T. Ye (Chinese Academy ofSciences)

Electrostatic Discharge (ESD) Protection Challenges ofGate-All-Around 55

Nanowire Field-Effect Transistors

W. Liu, J, Liou (University ofCentral Florida), N. Singh, G. Lo

(Agencyfor Science, Technology and Research), J. Chung, and Y. Jeong

(Pohang University ofScience and Technology)

Characterization ofRandom Telegraph Signal Effects for 0.18um Technology 61

Y. Ji, S. Dai, M. Wei, X, Lu, S. Zhang, and D. Xu

(Grace Semiconductor Manufacturing Corporation)

Effect of AlGaN Barrier Thickness on the Noise ofAlGaN/GaN High 67

Electron Mobility Transistors

R. Yahyazadeh and Z. Hashempour(Islamic Azad University ofKhoy Branch)

Extraction and Analysis ofSubstrate Parameters in On-Chip Spiral Inductor 75

Model

X. Li (East China Normal University), Z. Ren

(Shanghai Integrated Circuits Research & Development Center), D. Chen,

and Y. Shi (East China Normal University)

vi

Opportunities andChallenges of FinFET as a Device Structure Candidate for 81

14nmNode CMOS TechnologyT. Yamashita, V. Basker, T. Standaeri, C. Yeh, J. Faltermeier

(IBMResearch), T. Yamamoto (RENESAS Electronics), C. Lin, A. Bryant(IBMResearch), K. Maitra (GLOBALFOUNDRIES), P. Kulkarni,

S. Kanakasabapathy (IBMResearch), H. Sunamura

(RENESASElectronics), J. Wang, H. Jagannathan (IBMResearch),A. Inada (RENESASElectronics), J. Cho, R. Miller

(GLOBALFOUNDRIES), B, Doris, V. Paruchuri, H. Bu, M. Khare,J. O'Neill, and E. Leobandung (IBMResearch)

Structural effects of Channel Cross-Section on the Gate Capacitance of 87

Silicon Nanowire Field-effect Transistors

S. Sato, K. Kakushima, P. Ahmet (Tokyo Institute ofTechnology),K. Ohmori (University ofTsukuba), K, Natori

(Tokyo Institute ofTechnology), K. Yamada (University ofTsukuba), andH. Iwai (Tokyo Institute ofTechnology)

Process Impact and Design Optimization on the Soft Yield of 25nm FinFET 93

SRAM Cells

M. Li, Q, Liang, H. Zhu, E Zhong, D. Chen, and T, Ye


TiN/W/La203/Si High-k Gate Stack for EOT below 0.5nm 99

P. Ahmet, D. Kitayama, T. Kaneda, T. Suzuki, T. Koyanagi, M. Kouda,

M. Mamatrishat, T. Kawanago, K, Kakushima, K. Tsutsui, A, Nishiyama,N. Sugii, K. Natori, T. Hattori, and H. Iwai

(Tokyo Institute ofTechnology)

PMOS Source/Drain Extension Dopant Species effect on Device and SRAM 103

Performance

J. Liu, J. Zhou, W. Wang, R. Guo, L. Zhang, Z. Shen, B. Wang, A. Zhou,H. Hao, J.Cui, andJ. Ning(Semiconductor ManufacturingInternational Corporation)

ANovel Tunnel Oxide Based Tunnel FET 107

H. Wang, Z. Luo, H. Yin, H. Zhu, J. Liu, and Z. Zhu


STI CMP: Exploration ofaColloidal SilicaBased Slurry System 113

P. Song, D. Yaoying, andJ. Daw Sun

(Anji Microelectronics (Shanghai) Co., Ltd.)

Linearity Improvement on MIM Capacitors 119

T. Chu, P. Yang, E. S. Kho, Y. Ang, andS. Tia (X-FAB Sarawak Sdn. Bdn.)

vii

Modeling of Electron Transport in HI- Nitride Compound Semiconductors for 125

Low Field and Low Temperature ApplicationsS. Chakrabarti, S. Gupta Chatterjee, D. Chattopadhyay, andS. Chatterjee(Techno India)

Fast Flexible Electronics Based on Printable Thin Mono-Crystalline Silicon 137

Z. Ma, K. Zhang, J. Seo, H. Zhou, L. Sun, H. Yuan, G. Qin, H. Pang(University ofWisconsin Madison), and W. Zhou

(University ofTexas Arlington)

HHNEC 0.18um BCD Technology for High Density Power Integration 143

Z. Shuai, Q. Wensheng, and D. Ke

(Shanghai Hua Hong NEC Electronics Company, Limited)

Performance Improvement ofSi-NC Memory Device by Using aNovel 149

Junction Assisted Programming Scheme

D. Jiang, Z. Huo, M. Zhang, Q. Wang, J. Liu, Z. Yu, X. Yang,Y. Wang (Chinese Academy ofSciences), B. Zhang(Grace Semiconductor Manufacturing Corporation), J. Chen

(Anhui University), andM. Liu (Chinese Academy ofSciences)

Dual Floating Gate Flash Cell Using Single Poly Processes 155

X. Lin (Fudan University), L. Liu (Oriental Semiconductor Co. Ltd.),X. Liu, S. Zanga, C. Cao, P. Wang, andD. Zhang (Fudan University)

Anomalous Behaviors ofCubic GalnN Ternary Alloys 161

N. Tit (United Arab Emirates University)

0.18um Scalable 7-45V pLDMOS for Smart Power Application 167

Z. Liu, S. Tang, J. Shen, and C. Shao

(Grace Semiconductor Manufacturing Corporation)

0.18 Micron BiCMOS Process with Novel Structure SiGeC HBT 173

D. Liu, W. Qian, X. Chen, F. Chen, J. Hu, S. Xiao, Y. Wang, and T. Chiu

(HHNEC)

Temperature Insensitive Clock Buffer and Its Application on Clock Tree 183

M. Tie andX. Li (IBMSystems & Technology Group)

Low-Power Design ofDouble Edge-Triggered Static SOI D Flip-Flop 189

W. Xing, J. Song, and D. Gang (Peking University)

Effects ofOxygen Flow Ratios and Annealing on TiOx Deposited by 195

Reactive Magnetron SputteringL. Wang, K. Zhang, Q. Wang, F. Wang, and X. Wei

(Tianjin University ofTechnology)

viii

•

Chapter 2

Lithography and Patterning

Robustness Enhancement in Optical Lithography: From Pixelated Mask 203

Optimization to Pixelated Source-Mask OptimizationN. JiaandE. Y. Lam (The University ofHong Kong)

Mask Synthesis for Aerial Image Fidelity in Optical Lithography Using a 209

Coarse-Grid-Approximation Level-Set ApproachY. Peng, J. Zhang, Y. Wang, andZ. Yu (Tsinghua University)

A Fast OPC Algorithm for IC LayoutBased on 1-D Cells after Optimization 215

ofGap Distribution

B. Lin, C. Xie, andZ. Shi (Zhejiang University)

Extension Use ofImmersion Lithography for the 22nm Half-Pitch and 223

BeyondR. Kanaya (Nikon Corporation)

Cymer LPP EUV Source System Development Status 231

B. Lin (Cymer SoutheastAsia Ltd.), B. La Fontaine, D. Brandt, and

N. Farrar (Cymer Inc.)

Advanced Packaging Stepper for 300mm Wafer Process 237

Z. Chang and H. Ling (Shanghai Micro Electronics Equipment Co., Lid.)

Foundry Efficiency Gains Through Common Photolithography Themes 243

/. E. Lamb III, C. Chris, Z. Zhu, D. Drain, and D. Sullivan

(Brewer Science, Inc.)

Use ofDBARCs Beyond Implant 249

C. Washburn, J. A. Lowes, andA. Guerrero (Brewer Science, Inc.)

Development ofUnder Layer Material for EUV Lithography 257

R. Sakamoto, B. Ho, N. Fujitani, T. Endo, and R. Ohnishi

(Nissan ChemicalIndustries, Ltd.)

Evaluation of 193 nm Photoresist Material at Advanced Immersion Nodes 263

/. Hao, Y. Xu, and C. Liu

(Semiconductor Manufacturing International Corporation)

Limit ofLine End Shortening Correction under Single Exposure in 193 nm 269

Immersion LithographyQ. Wu, Y. Xu, J. Hao, C. Liu, X. Shi, and Y. Gu

(Semiconductor ManufacturingInternational Corporation)

ix

248nm Process Is Capable for sub 0.09 um Groundrules 277

L. Wang, X. Guo, Y. Tong, H, Meng, B. Su, andS. Xiao

(Shanghai HuaHong NEC Electronic Company Ltd.)

Study to Transfer 0.11 um DRAM ArF Process to KrF Process in Litho 285

J. Liu, E. Yao, E. Fan, K. Chang, T. Lv, J. Zhang, L. Liang, J. Hong, and

M. Li (Semiconductor ManufacturingInternational Corporation)

Studying Photoresist Type for Sub-32nm Node Dense SRAM 2nd GT Layer 303

Y, Xu, J. Hao, C. Liu, X. Shi, Q. Wu, and Y. Gu


Chapter 3

Dry and Wet Etch and Cleaning

Selective Removal ofHigh-k Dielectrics 311

D. Shamiryan and V. Paraschiv (imec)

Active Area Width and Topography Effects on Sub 45nm Poly Gate CD 319

M. Shen, X. Meng, Y. Huang, H. Zhang, S, Chang, K. Lee, and Y. Gu


Reverse Phase Solution for Mesa ChamberUniformity Improvement 325

Q. Ge, Y. Huang, andX. Tang (Semiconductor Technology Group AppliedMaterials China Globe Account)

PlasmaEtch Challenges for Porous Low k Materials for 32nm and Beyond 329

C. Labelle (GLOBALFOUNDRIES), R. Srivastava

(GLOBALFOUNDRIES Singapore), J. C. Arnold, Y. Yin (IBMResearch),M. Ishikawa (Toshiba America Electronic Components, Inc.), Y. Mignot(STMicroelectronics), H. Yusufj(IBMMicroelectronics), J. Linville

(GLOBALFOUNDRIES), D. Horak, N Fuller (IBMResearch), R. Patz,

A. Darlak, K. Zhou, Y. Zhou, andJ. Pender (Applied Materials)

Dry Etch Process Effects on Cu/low-k Dielectric Reliability for Advanced 335

CMOS TechnologiesJ. Zhou, W. Sun, H. Zhang, M. Hu, F. Li, X. Song, S. Chang, andK. Lee


New Al Post-Etch Residue Remover with Al Surface Passivation Function 343

J. C. Wei andM. Huang (DuPont Electronics and Communications)

x

WAT and VBD Distribution Improvement on Low-K Trench All-in-one 349

Process

J. Hendrianto, H. Zhijie (Lam Research Corporation), andA. Liu


Clean Mode Al Etch ProcessDevelopment for Defect Reduction 355

F. Qiang, C. Huang, J. Hendrianto (Lam Research Corporation), J. Song,M.Lv.K. Wang, and C. Shi


Dummy Poly Silicon Gate Removal by Wet Chemical Etching 361

T Young, H. Yin, Q. Xu, C. Zhao, J. Li, andD, Chen


Theoretical And Experimental Development OfAdvanced Dopant-Sensitive 365

SystemsP. Zhang (Qingdao Feiyang Vocational & Technical College), L. Zhang(China Electronics Technology Group Corporation), Y. Ye

(Nanjing University), and Y. Yang(China Electronics Technology Group Corporation)

Ultrapure Water-Related Problems and Waterless Cleaning Challenges 371

T. Hattori (n/a)

Dry Etch Fin Patterning ofa Sub-22nm Node SRAM Cell: EUV Lithography 377

New Dry Etch ChallengesE. Altamirano-Sanchez (imec), Y. Yamaguchi, J. Lindain (Lam Reseach),N. Horiguchi, M. Ercken, M. Demand, and W. Boullart (imec)

Effect of02/Ar Ratio on Etching ofDiamond Films by MPCVD 383

S. Wang, K. Zhang, Z. Taofeng, and J. Ren

(Tianjin "University ofTechnology)

Porous SiOCH Integration: Etch Challenges with a Trench First Metal Hard 389

Mask ApproachN. Posseme, T. David (CEA-LET1), T. Chevolleau, M, Damon

(CNRS-LTM), P. Brun, M. Guillermet (CEA-LETI), J. Oddou

(STMicroelectronics), S. Barnola (CEA-LETI), F. Bailly, R. Bouyssou(STMicroelectronics), J. Ducote (CNRS-LTM), R. Hurand (CEA-LETI),C. V&rove (STMicroelectronics), and O. Joubert (CNRS-LTM)

Plasma Etching Parameters Impact To Low-k Damage 395

J. Zhang, H, Pei, and L. Cheng (Lam Research Corporation)

xi

Prevention of AlCu Line Galvanic Corrosion after Fluoride Containing 399

Stripper Cleaning: A Case StudyV. Luo, J. Chang, K. Shi

(Semiconductor Manufacturing International Corporation),B. Liu, L. Peng, A. Wang, and J. Sun

(AnjiMicroelectronics (Shanghai) Co., Ltd.)

Highly Selective Etching Solutions for Advanced Logic Technologies 405

X. Wang, H. Zhang, S. Chang, andK. Lee


Discovering Practical Use of Sensor Wafers in CCP Reactors 409

A. Milenin, M. Demand, W. Boullart (imec), and P. Arleo (KLA-Tencor)

Study on Silicon Sieve Holes Array for Future Lithography Application 415

W. Si, M. Yin (Tsinghua University), J. Qin (Hunan University), and Z. Liu

(Tsinghua University)

Controlled Etching ofIII-V Materials with Optical Emission Interferometry 421

(OH)C. Johnson, D. Johnson, R. Westerman, D. Geerpuram, L. Martinez, and

J. Plumhoff(Plasma-Therm LLC)

Low Silicon and SiGe Loss in High Dose Implant Resist Strip 427

X Meng, M. Shen, Y. Huang, H, Zhang, S. Chang, andK. Lee


Effluent Management forNon-Oxidizing Plasma Strip Processes 433

S. Luo, C. Waldfried, 0. Escorcia, I. Berry, P. Geissbilhler, A. Srivastava,andD. Roh (Axcelis Technologies, Inc.)

Wafer Backside Particle Reduction By Optimizing AC3 Coating for Poly 439

Etch Chamber

B. Ma, W. Liu (Lam Research Co., Ltd), F. Niu, J. Xia

(Semiconductor Manufacturing International Corporation), L. Cheng(Lam Research Co., Ltd), andK. Liang


The Study ofDry Etching Process on Plasma Induced Damage in Cu 445

Interconnects Technology/. Zhou, H. Zhang, W. Sun, X. Wang, M. Hu, F. Li, L. Fu, S. Chang, and

K. Lee (Semiconductor Manufacturing International Corporation)

xii

Chapter 4Thin Film Technology

Selective Epitaxial Growth: Trends in aModern TransistorDevice 455

Fabrication

A. Y. Hikavyy, W. Vanherle, J. Dekoster, L. Witters, T. Hoffmann, andR. Loo (imec)

Electron States at Interfaces ofSemiconductors and Metals with Insulating 467

Films

V. V. Afanas'ev, M. Houssa, andA. Stesmans (University ofLeuven)

Atomic-Layer Deposition ofLutetium Aluminate Thin Films for 473

Non-Volatile Memory ApplicationsC. Adelmann, J. Swerts, T. Conard, B. Brijs, A, Franquet (imec), A, Hardy(Hasselt University), H. Helens, K. Opsomer, A. Moussa (imec),M. K. Van Bael (Hasselt University), M. Jurczak, J. A, Kittl, andS. Van Elshocht (imec)

Evolution ofSTI Gap Fill Technology 479

J. C. Chen, Y. Chen, R. Gao, C. Cheng, X. Li, G. Zhao

(Applied Materials China), D. Chan, and T. Lee (Applied Materials)

Annealing Effect on the Electrical Properties ofLa203/InGaAs MOS 483

CapacitorsT. Kanda, D. Zade (Tokyo Institute ofTechnology), Y. C, Lin

(National Chiao-Tung University), K. Kakushima, P. Ahmet, K. Tsutsui,

A. Nishiyama, N. Sugii (Tokyo Institute ofTechnology), £ Y. Chang(National Chiao-Tung University), K, Natori, T. Hattori, and H, Iwai


Metal Inserted Poly-Si Stacks with La203 Gate Dielectrics for Scaled EOT 489

and Vfb Control by Oxygen IncorporationT. Kawanago, K, Kakushima, P. Ahmet, K. Tsutsui, A, Nishiyama,N. Sugii, K. Natori, T. Hattori, andH. Iwai


Characteristics of HfSiAlON Gate Dielectric Prepared by Physical Vapor 495

DepositionG. Xu and Q, Xu (Chinese Academy ofSciences)

Deposition of VOxFilms by Reactive Sputtering and its Properties 503

X. Wei, K. Zhang, W. Fang, L. Wang, Y. Zhang, andK. Song(Tianjin University ofTechnology)

xiii

ALD Ru and its Application in DRAM MIM-Capacitors and Interconnect

M. Schaekers, J. Swerts, L. Altimime, and Z. Tokei (imec)

Evaluation ofMetallization Options for Advanced Cu Interconnects

ApplicationN. Jourdan, L. Carbonell, N. Heylen, J. Swerts, S, Armini, A, Cam,S. Demuynck, K. Croes, G. Beyer, Z, Tdkei, S, Elshocht, and E. Vancoille

(imec)

Fine Pitch Micro-Bump Interconnections for Advanced 3D Chip StackingW. Zhang, P. Limaye, A. La Manna, E. Beyne, andP. Soussan (imec)

Temperature and Stress effects on IMC Behavior ofThin Film Cu-Al Systemin Wire Bond

X, Ming (CETC 58th Research Institute) andK. Fan

(ASMPacific Technology)

Review ofSiliconNanowire Oxidation

X. Shi, R. Kurstjens, I. Vos, J. Everaert, andM. Schaekers (imec)

Effect ofFilm Thickness on Resistance Switching Characteristics for

Cu/NiO/Pt Structure

Y. Zhang, K. Zhang, W. Fang, X. Wei, andJ. Zhao

(Tianjin University ofTechnology)

Optical Constants ofZnO Films

B. Huang andH. Yang (Jinan University)

Influence ofthe Pressure on ZnO:Al Film Deposited by DC MagnetronReactive Sputtering

S. Yu, H. Yang, B. Huang, J. Shi, and L. Zeng (Jinan University)

Study ofthe Electrical and Optical Properties ofthe Silicon Carbide Thin

Film

R. Luo, H. Yang, B. Huang, and B. Y. Xu (Jinan University)

Influence of Vacuum-Annealing Temperature on the Properties ofDirect

Current (DC) Magnetron Sputtered ZAO Thin Films

/. Shi, H. Yang, B, Huang, B. Xu, andS. Yu (Jinan University)

Study ofPhosphorus Out-Diffusion from High Density Plasma CVD

Phosphosilicate Glass Process

L. Min, Z, Ying, and Q, Xu(Semiconductor ManufacturingInternational Corporation)

xiv

Effects of Substrate Temperature on Resistive Switching of TiOx Thin Film 571

L. Wang, K. Zhang, W. Fang, and K. Song(Tianjin University ofTechnology)

Electrical and Optical Properties ofZinc Oxide ThinFilms Deposited by 577

Magnetron SputteringX. Ding and Y. Lai (Fuzhou University)

A Highly Conductive Bimodal Isotropic Conductive Adhesive and Its 583

ReliabilityD. Li, H. Cui, S. Chen, Q. Fan, Z. Yuan (Shanghai University), L, Ye

(SHTSmart High TechAB), and,J. Liu (Shanghai University)

Chapter S

CMP and Post-CMP Cleaning

Challenges and Mechanisms ofCMP Slurries for 32nm and Beyond 591

H. Morinaga and K. Tamai (Fuj'imi Incorporated)

A Study on Optimized Conditioner for Soft Pad in Cu Barrier Removal 597

S. Yoon and J. H. Lee (Ehwa Diamondlnd. Co, Ltd.)

Overcome Challenges in TSV CMP via Slurry Formulation 603

K. Luo, C. Wang, J. Jing, andS. Xu

(Anji Microelectronics (Shanghai) Co., Ltd.)

Investigation on the Correlationship between Process Performances and 609

Composition ofCMP Slurry Designed for GST Alloy PolishingK. Pang (Anji Microelectronics (Shanghai) Co., Ltd.), F. Chen, L. Jiang,M. Li, andM. Zhong(Semiconductor Manufacturing International Corporation)

Fundamental Characterization Studies ofCondensed Chemical Mechanical 615

Polishing Waste SlurryY. Yamada, M. Kawakubo, S. Watanabe, and T. Sugaya (Hitachi, Ltd.)

Correlation of Pad Topography, Friction Force and Removal Rate during 621

Tungsten Chemical Mechanical Planarization

Y. Sampurno, A. Rice, Y. Zhuang, andA. Philipossian(The University ofArizona)

xv

Tribological and Kinetical Analysis ofBarrier Metal Polishing for Next 627

Generation Copper Interconnects

R. Duyos Mateo, X. Gu, T. Nemoto, S. Sugawa (Tohoku University),Y. Zhuang (Araca Incorporated), Y. Sampurno, A. Philipossian(The University ofArizona), and T. Ohmi (Tohoku University)

Finite Element Analysis (FEA) ofPad Deformation Due to Diamond Disc 633

Conditioning in Chemical Mechanical Polishing (CMP)E. Baisie (North Carolina Agricultural & TechnicalState University),B. Lin (Tianjin University), X. Zhang (Seagate Technology), and Z. Li

(North Carolina Agricultural & Technical State University)

Data Driven CMP Manufacturing Modeling for Process and Design 639

OptimizationL. J. Song and V. Mehrotra (Ascertin LLC)

Ge- and III/V-CMP for Integration ofHigh Mobility Channel Materials 647

P. Ong, L. Witters, N. Waldron, andL. Leunissen (imec)

Advanced Direct-Polish Process on Organic Non-Porous Ultra Low-k 653

Fluorocarbon Dielectric on Cu Interconnects

X. Gu, T. Nemoto, Y, Tomita, R. Duyos Mateo, A. Teramoto, S. Kuroki,S. Sugawa, and T. Ohmi (Tohoku University)

Effect of Slurry Application/Injection Methods and Polishing Conditions on 659

Bow Wave Characteristics

X. Liao, Y. Sampurno, Y. Zhuang (The University ofArizona), F. Sudargho(Araca, Inc.), A. Rice, andA. Philipossian (The University ofArizona)

Evolution ofPost CMP Cleaning Technology 665

G. Banerjee (Air Products)

Cleaning Aspects ofNovel Materials after CMP 671

jR. Vos (imec), M. Wada (Dainippon Screen Mfg. Co.), S. Arnauts,

H. Takahashi, D. Cuypers, H. Struyf andP. Mertens (imec)

Study on the Ring Type Crater Defect Reduction in Cu CMP Process 677

J. Xu, P. Lin, C. Xing, P. Li, andZ. Ma


New Application ofOptical Endpoint System: In Situ Cu Residue Detection 683

W. Zhang, X. Wang, C. Tan, S. Wang (AppliedMaterials China), W. Shen

(AppliedMaterials USA), and G. Ge


xvi

The Mechanism ofOrganic Base and Surfactant in Silicon Wafer CMP 691

Process

L. Weiwei (Hebei University ofTechnology)

Modeling Copper Chemical Mechanical Polishing Processes Using Linear 699

System MethodL. Wu and C, Yan (Lanzhou University ofTechnology)

Effect ofpH on CMP of VOx Thin Films for RRAM 705

Y, Liguo, K. Zhang, W. Fang.X. Wei, andZ. Taofeng(Tianjin University ofTechnology)

Study ofInhibition effects on Copper CMP Slurry Performance 711

J. Jing (Anji Microelectronics (Shanghai) Co., Ltd.), Z. Ma, P. Li, C. Lu,

P. Lin (Semiconductor ManufacturingInternational Corporation),J. Zhang, andX. Cai (Anji Microelectronics (Shanghai) Co., Ltd.)

Chapter 6

Materials and Process Integration for Device and Interconnection

SiON Gate Dielectric Optimization for NBTI Improvement 719

Y. Chen, Y. He, W. Wang, R. Guo, Z. Tang, J. Liu, J. Wu, and J. Ju


Analysis ofthe Temperature Dependence ofTrap-Assisted-Tunneling in 725

Ge pFET Junctions

M. Bargallo Gonzalez, G. Eneman, G. Wang, B. De Jaeger, E. Simoen,and C. Claeys (imec)

eSiGe Global and Micro Loading Effect Study in High Performance 45nm 731

CMOS TechnologyY. He, H. Tu, J. Lin, H. Song, J. Wang, G. Ma, W. Xu, B. Ye, T. Yu, andJ. Wu (Semiconductor ManufacturingInternational Corporation)

Investigation of Laser Spike Anneal Dwell Time and It's Compatibility with 737

Embedded-SiGe

Y. He, Y. Chen, J. Lu, J. Wu, C. Xu, T. Yu

(Semiconductor Manufacturing International Corporation),D. M. Owen, Y. Zhang, andS. Shetty (Ultratech)

A Robust Shallow Trench Isolation High Density Plasma Chemical Vapor 743

Deposition Void Free Process for 0.13um CMOS TechnologyG. Ning, P. Lin, C. Xing, A. Bian, H. Zhao, and Y. Cao


xvii

CMP-Less Planarization Technology with SOG/LTO Etchback for Low Cost

70nm Gate-Last Process

H. Yin, L. Men, T. Yang, G. Xu, Q. Xu, C, Zhao, andD. Chen


Etch and Wet Clean Challenges and Joint OptimizationB, Yen, J. Lin, C. Lee, M. Hegarty, and P. Loewenhardt

(Lam Research Corporation)

Growth and Processing Defects in CMOS'Homo- and Hetero-Epitaxy

E. Simoen, M. Bargallo Gonzalez, G. Eneman, E, Rosseel, A. Y. Hikavyy,D. Kobayashi, R. Loo, M. Caymax, and C. Claeys (imec)

Precise Control of Spike Anneal Process for Advanced CMOS

Z. Zhao, J. Tang, and G. Zhao (Applied Materials China)

Improving Copper Interconnect Reliability via Ta/Ti Based Barrier

X. Hu, P. Lin, J. Ma, J. Jiang, and P. He


Glue Layer Study ofInter Via between Cu and Al Metal Lines

J. Chen, C. Qiao, L. Yang, and K. Chang(Semiconductor Manufacturing International Corporation)

The Influence ofThe SIN Cap Process on The Voltage Breakdown and

Electromigration Performance ofDual Damascene Cu Interconnects

Y. Cao, C. Xing, N. Xu, H. Zhou, A. Bian, and P. Lin


Effect ofRF Power on Carbon Nanotubes Synthesized at Low Temperatureby RF PECVD

X. Lin, K, Zhang, K. Hu, X. Qiang, andS. Wang(Tianjin University ofTechnology)

Improving Yield with High-Performance Cables

P. Warren (W. L. Gore & Associates)

Study on the Reliability ofFast Curing Isotropic Conductive Adhesive

W. Du, H. Cui, S. Chen, Z, Yuan (Shanghai University), L. Ye

(SHTSmartHigh Tech AB), and J. Liu (Shanghai University)

The Effect ofFunctionalized Silver on Rheological and Electrical PropertiesofConductive Adhesives

Q. Fan, H. Cui, C. Fu, D. Li, X. Tang, Z. Yuan (Shanghai University),L. Ye (SHTSmart High TechAB), and J. Liu (Shanghai University)

xviii

Chapter 7

Packaging and Assembly

Microstructural Evolution of Sn3.0Ag0.5Cu3.OBi0.05Cr/Cu Solder Joints 819

During Thermal Aging and Its Effects on Mechanical PropertiesF. Lin, W. Bi, G. Ju, andX. Wei (Shanghai University)

Study ofEMC for Cu Bonding Wire Application 825

T. Takeda, H. Seki, S. Itoh, andS. Zenbutsu (Sumitomo Bakelite Co., Ltd.)

Corrosion of Gold and Copper Ball Bonds 831

C. D. Breach (ProMat Consultants), H. Hg, T. Lee (ITE College Central),andR. Holliday (World Gold Council)

Cost-effective Use ofGold Wire in Semiconductor Packaging 843

C. J. Vath III (ComSol Consulting Pte. Ltd.) andR. Holliday(World Gold Council)

Copper Wire Bonding in High Volume Manufacturing 857

B. K. Appelt, A. Tseng, Y. Lai, and C. Chen (ASE Group)

MUF Technology Development for SiP Module 865

Y. Kweon, J. Ha, K. Kim, M. Jangi J. Boh, C. Lee, andD. Yoo

(SamsungElectro-Mechanics Co.)

Multi Beam Grooving and Full Cut Laser Dicing ofIC Wafers 873

J. V. Borkulo and R. Hendriks

(AdvancedLaser Separation International NV)

Advanced Bump Structure for Improving the Board Level Characteristics of 879

WLCSP

C. Lee, J. Choi, J. Kim, S. Choi, D. Yoo, S. Park, and Y. Kweon

(Samsung Electro-Mechanics Co.)

Plasma Cleaning Effect on Automotive Devices 887

Y. P. Chew and T. Aw (Infineon Technologies Sdn Bhd)

PackagingIssues for High-Voltage Power Electronic Modules 893

S. S. Ang, T. Evans, J. Zhou, K. Schirmer, H. Zhang, B. Rowden, J. Balda,andA. Mantooth (University ofArkansas)

xix

Chapter 8

Metrology, Reliability and Testing

IDDQ Test Practice in NanotechnologiesS. X. Ye, C. Shen, Z. Liu, and Q. Liyun (Availink, Inc.)

Cost-Effective and Accurate Solution for Jitter Performance Test in

High-Speed Serial Links

M. Lu (Verigy)

Plasma Etching for Failure Analysis ofIntegrated Circuit Packages/. Tang, J. Schelen, and C. Beenakker (Delft University ofTechnology)

Process Optimization ofContact Module in NOR Flash Using HighResolution e-Beam Inspection

H. C. Liao, C. L. Hung, T. Luoh, L. Yang, T. Yang, K. Chen, and C. Lu

(Macronix International Co., Ltd.)

Verification ofSystematic Defects Using e-Beam DefectReview SystemT. Luoh, L. Yang, T. Yang, K. Chen, andC. Lu

(Macronix International Co., Ltd.)

Determining Coherence length ofX-ray Beam Utilizing Line GratingStructures

H. Lee, C. L. Soles, and W. Wu

(National Institute ofStandards and Technology)

TSV/3DIC Profile Metrology Based on Infrared Microscope Image/. Tang (Southern Taiwan University), Y. Lay, L. Chen, and L. Lin

(National Cheng Kung University)

Endpoint Detection in Plasma Etching Using Principal Component Analysisand Expanded Hidden Markov Model

M Kim, S. Kim, S. Zhao, S. Hong, and S. Han (Myongji University)

Improvement ofIn-line SCD Metrology on BEOL Copper CMP Erosion

Layers for 65nm Technology Node Logic Production ApplicationC. Rong, Z. Wang, Z. Yin

(Semiconductor ManufacturingInternational Corporation),Z. Tan (KLA-Tencor FaSTDivision), and L. Zhao

(KLA-Tencor China)

Spectral Sensitivity Analysis of OCD Based on Muller Matrix Formulism

S. Yaoming, Z. Zhensheng, L. Guoxiang, L. Zhijun, andX. Yiping(Raintree Scientific Instruments (Shanghai) Corp.)

xx

A Method to Determine Process Capability Cpk and Corresponding 961

Percentage ofNon-Conforming for Non-Normally Distributed and Limited

Production Data

S. F. Yang (Semiconductor Manufacturing International Corporation)

High Voltage Device Negative Bias Temperature Instability Improvement 967

with Different Process Conditions

P. Sim, S. Koo, andD. Pal (X-FAB Sarawak Sdn. Bhd.)

Study The Mixed-Mode Delamination of The Epoxy/Cu Interface 973

Y. Liu andJ. Wang (Fudan University)

LDMOS Thermal SOA Investigation ofa Novel 800V Multiple RESURF 979

with Linear P-top RingsA. P. Herlambang, G. Sheu (Asia University), Y. Guo

(Nanjing University ofPosts and Telecommunications), and H. Wasisto

(Asia University)

Investigation ofLateral Die Crack Failure at Reliability Test 985

Y. Soh, C. Tan, X. Chen (Infineon Technologies (Wuxi) Co. Ltd.),K. Chua (Infineon Technologies (Malaysia) Sdn. Bhd.), R Du, Y. Xi

(Infineon Technologies (Wuxi) Co. Ltd.), and T. Lim

(Infineon Technologies (Malaysia) Sdn. Bhd.)

Study on the Reliability ofNano-Stvuctured Polymer-Metal Composite for 991

Thermal Interface Material

L. Zhang, X. Luo, X. Lu, andJ. Liu (Shanghai University)

Failure Mechanism and Testing ofPCB Pad Cratering 997

D. Xie (Flextronics International USA), M. Cai, B, Wu

(Flextronics Manufacturing Zhuhai), D. Geiger, D. Shangguan(Flextronics International USA), and I. Martin (Flextronics)

Chapter 9

Emerging Semiconductor Technologies

FPGA Design with Double-Gate Carbon Nanotube Transistors 1005

M. Ben Jamaa, P. Gaillardon (Commissariat a I'Energie Atomique),S. Fregoni.se (Universite Bordeaux), M. De Marchi, G. De Micheli

(Ecole Polytechnique Federate de Lausanne), T. Zimmer

(Universite Bordeaux), I. O'Connor

(Institut des Nanotechnologies de Lyon), andF. Clermidy(Commissariat a I'Energie Atomique)

xxi

Three-Dimensional (3D) Integration TechnologyT, Ohba (The University ofTokyo)

1011

Electrical Quality ofIII-V/Oxide Interfaces: Good Enough for MOSFET 1017

Devices

G. Brammertz, A. Alian, H. Lin, L. Nyns, S. Sioncke, C. Merckling,

W, Wang, M. Caymax, and T. Hoffmann (imec)

Low Temperature Bonding with Thin Wafers for 3D Integration 1023

T. Matthias (EV Group), B. Kim (EV Group Inc.), P. Kettner,

M. Wimplinger, andP. Lindner (EVGroup)

Vertical LED with Diamond-Like Carbon Interface for High-Power 1029

Illumination

J. C. Sung, K. Kan, andM. Sung (SinoDiamond LED)

Alumina Abrasives for Sapphire Substrate Polishing 1035

D. Merricks (Ferro Electronic Materials)

Experimental and Modeling onAtomic LayerDeposition Al203/n-InAs 1041

Metal-Oxide-Semiconductor Capacitors with Various Surface Treatments

H. Trinh, E. Chang (National Chiao Tung University), G. Brammertz

(imec), C. Lit, H. Nguyen, and B. Tran (National Chiao Tung University)

Effects of Surface Pretreatments onp-GaN/GZO Contact by rfMagnetron 1047

SputterW. Wang, X. Li, J. Zhang, and J, Zhang (Shanghai University)

A Phase Change Memory Device Fabrication Technology Using Si2Sb2Te6 1053

for Low Power Consumption ApplicationY. Li (Chinese Academy ofSciences), X. Wan

(Semiconductor Manufacturing International Corporation),Z, Song (Chinese Academy ofSciences), J. Xie

(Semiconductor Manufacturing International Corporation),B. Chenc (Silicon Storage Technology, Incorporated),B. Liu (Chinese Academy ofSciences), G. Wu, N, Zhu

(Semiconductor ManufacturingInternational Corporation),M, Zhong (Chinese Academy ofSciences), J. Xu

(Semiconductor ManufacturingInternational Corporation), andY. Chen (Chinese Academy ofSciences)

Smart Systems 1059

T. Gessner, M. Vogel, T. Otto, S. Schulz, andR Baumann

(FraunhoferInstitutefor Electronic Nano Systems)

xxii

Electrical Characterization ofthe MOS (Metal-Oxide-Semiconductor) 1065

System: High Mobility Substrates

D. Lin, G. Brammertz, S. Sioncke, L. Nyns, A. Allan, W, Wang, M. Heyns,M. Caymax, and T. Hoffmann (Imec)

Characterization and Optical Properties ofCdS Thin Films Grown by 1071

Chemical Bath DepositionW. ZhangandS. Cheng (Ftizhou University)

Electroluminescence ofEnd-Capped Poly[9,9-di-(2'-ethylhexyl)fluorenyl-2!7- 1077

diyl] Blended with F8BT

Q. Zhang (University ofElectronic Science and Technology ofChina) and

S, Zhang (Xihua University)

Enhancement ofLuminance via Blending F8BT with 1087

Tetraphenyldiaminobiphenyl-Containing Hole TransportPolymerQ. Zhang (University ofElectronic Science and Technology ofChina)

Chapter 10

Silicon Materials for Electronic and Photovoltaic Applications

Improvements on the Uniformity ofa-Si Solar Thin Films by Using Auxiliary 1097

Magnetic Field

L. C, Hit, Y. P. Chen, J. Chang, J. J. lee, 1. Chen,-and T. T. Li

(National Central University)

Hydrogenated Silicon Thin Film and Solar Cell Prepared by Electron 1103

Cyclotron Resonance Chemical VaporDeposition MethodC. Lee, J, Chang, Y. Chu, C. Lien, I, Chen, and T, Li


Properties of Multicrystalline Silicon Wafers Based on UMG Material 1109

T. Jiang, X. Yu, X. Li, X. Gu, P. Wang, andD, Yang (Zhejiang University)

Defect Evaluation by Photoluminescence for Uniaxially Strained Si-On- 1117

Insulator

D. Wang, K. Yamamoto, H, Gao, H, Yang, andH. Nakashima

(Kyushu University)

Effects of Transverse Magnetic Field on Thermal Fluctuations in the Melt of 1123

a Cz-Si Crystal Growth

X. Liu, L. Liu, and Y. Wang (Xi'an Jiaotong University)

xxiii

Light Trapping for High Efficiency Heterojunction Crystalline Si Solar Cells 1129

Q. Wang, Y. Xu, E. Iwaniczko, andM. Page(National Renewable Energy Laboratory)

Fabrication and Quantum Confinement Investigation of Ge Multiple 1135

Quantum Wells with Si3N4 Barriers

J. Chen, S. Lee, andS. Huang (University ofNew South Wales)

Structural and Optical Properties ofPorous SiGe/Si Multilayer Films 1145

B. Zhou, X. Li (Minjiang University), S. W. Pan, S. Y. Chen, and C. Li

(Xiamen University)

On the Impact ofHeavy Doping on Grown-In Defects in Czochralski-Grown 1151

Silicon

X. Zhang, W. Xu, J. Chen, X. Ma, D, Yang (Zhejiang University), L. Gong,D. Tian (QL Electronics), and J. Vanhellemont (Ghent University)

The Influence OfSilicon Orientation On Surface Blistering Behaviors for 1159

Molecular Hydrogen Ion ImplantationY, Hsiao, J. Liang (National Tsing Hua University), and C. Lin

(National Hsinchu University ofEducation)

Very High Deposition Rate of a-Si:H Thin Films by ECRCVD 1165

H. F. Chiu, Y. S. Chang (National Tsing Hua University), J. Y. Wu,Y. S. Li, J. Chang, C. C. Lee, I. Chen (National Central University),C. C. Su (Chung-Shan Institute ofScience & Technology), and T. T. Li


Author Index 1173

xxiv

Documents

China Semiconductor Technology InternationalChina SemiconductorTechnologyInternational Conference 2011 (CSTIC2011) Editors: H.Wu SemiconductorManufacturing International Corporation