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CPU arch. CPU nameData widthLogical address width Current instruction register(s) Physical address width Special mode 8-bit 6502 MOS bit data16-bitPC16-bit (64 kB) 16-bit x86-16 x86 Intel bit data bitCS:IP20-bit (1 MB) Intel bit data Examples of CPU Architectures
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CHARLES UNIVERSITY IN PRAGUE
http://d3s.mff.cuni.cz/~jezek
faculty of mathematics and physics
Principles of Computers11th Lecture
Pavel Ježek, [email protected]
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
Examples of CPU Architectures
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
16-bitx86-16x86
Intel 8088 8-bit data 16 + 16 bit CS:IP 20-bit(1 MB)
Intel 8086 16-bit data
Examples of CPU Architectures
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
16-bitx86-16x86
Intel 8088 8-bit data 16 + 16 bit CS:IP 20-bit(1 MB)
Intel 8086 16-bit data
Intel 80286 16-bit data 16 + 16 bit CS:IP 24-bit(16 MB)
protected 16(+ real) mode
Examples of CPU Architectures
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
16-bitx86-16x86
Intel 8088 8-bit data 16 + 16 bit CS:IP 20-bit(1 MB)
Intel 8086 16-bit data
Intel 80286 16-bit data 16 + 16 bit CS:IP 24-bit(16 MB)
protected 16(+ real) mode
32-bitx86IA-32INTEL32
Intel 80386 32-bit data 32-bit EIP 32-bit(4 GB)
protected 32mode
Examples of CPU Architectures
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
16-bitx86-16x86
Intel 8088 8-bit data 16 + 16 bit CS:IP 20-bit(1 MB)
Intel 8086 16-bit data
Intel 80286 16-bit data 16 + 16 bit CS:IP 24-bit(16 MB)
protected 16(+ real) mode
32-bitx86IA-32INTEL32
Intel 80386 32-bit data 32-bit EIP 32-bit(4 GB)
protected 32mode
Intel Pentium Pro 64-bit data 32-bit EIP 36-bit(64 GB)
PAE
Examples of CPU Architectures
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
16-bitx86-16x86
Intel 8088 8-bit data 16 + 16 bit CS:IP 20-bit(1 MB)
Intel 8086 16-bit data
Intel 80286 16-bit data 16 + 16 bit CS:IP 24-bit(16 MB)
protected 16(+ real) mode
32-bitx86IA-32INTEL32
Intel 80386 32-bit data 32-bit EIP 32-bit(4 GB)
protected 32mode
Intel Pentium Pro 64-bit data 32-bit EIP 36-bit(64 GB)
PAE
64-bitx64x86-64AMD64INTEL64EM64T
AMD Opteron(Intel Pentium 4)
64-bit data 64-bit RIP 40-bit(1 TB)
long mode
Examples of CPU Architectures
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
16-bitx86-16x86
Intel 8088 8-bit data 16 + 16 bit CS:IP 20-bit(1 MB)
Intel 8086 16-bit data
Intel 80286 16-bit data 16 + 16 bit CS:IP 24-bit(16 MB)
protected 16(+ real) mode
32-bitx86IA-32INTEL32
Intel 80386 32-bit data 32-bit EIP 32-bit(4 GB)
protected 32mode
Intel Pentium Pro 64-bit data 32-bit EIP 36-bit(64 GB)
PAE
64-bitx64x86-64AMD64INTEL64EM64T
AMD Opteron(Intel Pentium 4)
64-bit data 64-bit RIP 40-bit(1 TB)
long mode
2015 current(e.g. Core i7)
64-bit data 64-bit RIP AMD: 48b → 256 TBIntel: 46b → 64 TB
Examples of CPU Architectures
CPU arch.
CPU name Data width Logical address width
Current instructionregister(s)
Physical address width
Special mode
8-bit6502
MOS 6502 8-bit data 16-bit PC 16-bit(64 kB)
16-bitx86-16x86
Intel 8088 8-bit data 16 + 16 bit CS:IP 20-bit(1 MB)
Intel 8086 16-bit data
Intel 80286 16-bit data 16 + 16 bit CS:IP 24-bit(16 MB)
protected 16(+ real) mode
32-bitx86IA-32INTEL32
Intel 80386 32-bit data 32-bit EIP 32-bit(4 GB)
protected 32mode
Intel Pentium Pro 64-bit data 32-bit EIP 36-bit(64 GB)
PAE
64-bitx64x86-64AMD64INTEL64EM64T
AMD Opteron(Intel Pentium 4)
64-bit data 64-bit RIP 40-bit(1 TB)
long mode
2015 current(e.g. Core i7)
64-bit data 64-bit RIP AMD: 48b → 256 TBIntel: 46b → 64 TB
Examples of CPU Architectures
32-bit ARM 64-bit ARM 32b MIPS MIPS64 PowerPC (PPC) 32b Motorola 68000 (68k)
program PascalProgram;
type PProc = procedure;
procedure P1;begin
αend;
procedure P2;begin
βend;
var i : word; ptr : PProc; j : word;
begin
γ1 ptr := @P1;
ptr; P2;
γ2end.
program PascalProgram;
type PProc = procedure;
procedure P1;begin
αend; jmp back
procedure P2;begin
βend; jmp back
var i : word; ptr : PProc; j : word;
begin
γ1 ptr := @P1;
ptr; indirect jump P2; direct jump
γ2end.
A
B
C1
C2
...
$00007A00
B ...$00002100
A ...$00002000
C2????????
JMP E9 $00001306????????
JMPindir
25FF $00001300
C1 ...
$00001000...
procedure P2
procedure P1
main program
program PascalProgram;
type PProc = procedure;
procedure P1;begin
αend; jmp back
procedure P2;begin
βend; jmp back
var i : word; ptr : PProc; j : word;
begin
γ1 ptr := @P1;
ptr; P2;
γ2end.
A
B
C1
C2
...
0000 $00007A08
00 (00)00 (00)00 (20)00 (00) $00007A04
0000 $00007A020000 $00007A00
B ...$00002100
A ...$00002000
C2????????
JMP E9 $00001306????????
JMPindir
25FF $00001300
C1 ...
$00001000...
variable j
variable ptr
padding
variable i
procedure P2
procedure P1
main program
program PascalProgram;
type PProc = procedure;
procedure P1;begin
αend; jmp back
procedure P2;begin
βend; jmp back
var i : word; ptr : PProc; j : word;
begin
γ1 ptr := @P1;
ptr; P2;
γ2end.
A
B
C1
C2
...
0000 $00007A08
00 (00)00 (00)00 (20)00 (00) $00007A04
0000 $00007A020000 $00007A00
B ...$00002100
A ...$00002000
C200002100
JMP E9 $0000130600007A04
JMPindir
25FF $00001300
C1 ...
$00001000...
variable j
variable ptr
padding
variable i
procedure P2
procedure P1
main program
program PascalProgram;
type PProc = procedure;
procedure P1;begin
αend; jmp back
procedure P2;begin
βend; jmp back
var i : word; ptr : PProc; j : word;
begin
γ1 ptr := @P1;
ptr; P2;
γ2end.
A
B
C1
C2
$00002100
$00007A04
...
0000 $00007A08
00 (00)00 (00)00 (20)00 (00) $00007A04
0000 $00007A020000 $00007A00
B ...$00002100
A ...$00002000
C200002100
JMP E9 $0000130600007A04
JMPindir
25FF $00001300
C1 ...
$00001000...
variable j
variable ptr
padding
variable i
procedure P2
procedure P1
main program
program PascalProgram;
type PProc = procedure;
procedure P1;begin
αend; jmp back
procedure P2;begin
βend; jmp back
var i : word; ptr : PProc; j : word;
begin
γ1 ptr := @P1;
ptr; P2;
γ2end.
A
B
C1
C2
$00002100 ← $00002100 – ($001306 + 5)
E9 = relative jump
$00007A04
...
0000 $00007A08
00 (00)00 (00)00 (20)00 (00) $00007A04
0000 $00007A020000 $00007A00
B ...$00002100
A ...$00002000
C200000DF5
JMP E9 $0000130600007A04
JMPindir
25FF $00001300
C1 ...
$00001000...
variable j
variable ptr
padding
variable i
procedure P2
procedure P1
main program
program PascalProgram;
type PProc = procedure;
procedure P1;begin
αend; jmp back
procedure P2;begin
βend; jmp back
var i : word; ptr : PProc; j : word;
begin
γ1 ptr := @P1;
ptr; P2;
γ2end.
A
B
C1
C2
$00002100 ← $00002100 – ($001306 + 5) = $00002100 – $0000130B = $00000DF5
E9 = relative jump
$00007A04
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