Characterization Methods of Semiconductors

Impact of Ionizing Radiation on 4H-SiC Devices

Doctoral Thesis

by

Muhammad Usman

Microelectronics and Applied Physics School of Information and Communication Technology (ICT)

KTH Royal Institute of Technology Stockholm, Sweden 2012

Impact of Ionizing Radiation on 4H-SiC Devices A dissertation submitted to KTH Royal Institute of Technology, Stockholm, Sweden, in partial fulfillment of the requirements for the degree of Teknologie Doktor (Doctor of Philosophy) ©2012 Muhammad Usman KTH Royal Institute of Technology, School of Information and Communication Technology (ICT), Electrum 229, Kista, SE-16440 Sweden TRITA-ICT/MAP AVH Report 2012:02 ISSN 1653-7610 ISRN KTH/ICT-MAP/AVH-2012:02-SE ISBN 978-91-7501-225-4

To my family

Muhammad Usman: Impact of Ionizing Radiation on 4H-SiC Devices, Microelectronics and Applied Physics, School of Information and Communication Technology (ICT), KTH Royal Institute of Technology, Stockholm 2012. TRITA-ICT/MAP AVH Report 2012:02, ISSN 1653-7610, ISRN KTH/ICT-MAP/AVH-2012:02-SE, ISBN 978-91-7501-225-4 Abstract Electronic components, based on current semiconductor technologies and operating in radiation rich environments, suffer degradation of their performance as a result of radiation exposure. Silicon carbide (SiC) provides an alternate solution as a radiation hard material, because of its wide bandgap and higher atomic displacement energies, for devices intended for radiation environment applications. However, the radiation tolerance and reliability of SiC-based devices needs to be understood by testing devices under controlled radiation environments. These kinds of studies have been previously performed on diodes and MESFETs, but multilayer devices such as bipolar junction transistors (BJT) have not yet been studied.

In this thesis, SiC material, BJTs fabricated from SiC, and various dielectrics for SiC passivation are studied by exposure to high energy ion beams with selected energies and fluences. The studies reveal that the implantation induced crystal damage in SiC material can be partly recovered at relatively low temperatures, for damage levels much lower than needed for amorphization. The implantation experiments performed on BJTs in the bulk of devices show that the degradation in device performance produced by low dose ion implantations can be recovered at 420 oC, however, higher doses produce more resistant damage. Ion induced damage at the interface of passivation layer and SiC in BJT has also been examined in this thesis. It is found that damaging of the interface by ionizing radiation reduces the current gain as well. However, for this type of damage, annealing at low temperatures further reduces the gain.

Silicon dioxide (SiO2) is today the dielectric material most often used for gate dielectric or passivation layers, also for SiC. However, in this thesis several alternate passivation materials are investigated, such as, AlN, Al2O3 and Ta2O5. These materials are deposited by atomic layer deposition (ALD) both as single layers and in stacks, combining several different layers. Al2O3 is further investigated with respect to thermal stability and radiation hardness. It is observed that high temperature treatment of Al2O3 can substantially improve the performance of the dielectric film. A radiation hardness study furthermore reveals that Al2O3 is more resistant to ionizing radiation than currently used SiO2 and it is a suitable candidate for devices in radiation rich applications. Key words: Silicon carbide, ionizing radiation, bipolar junction transistors, reliability, surface passivation, high-k dielectrics, MIS, radiation hardness

Acknowledgements I would like to start my acknowledgements with all praise and thanks to the Almighty, who gave me the power and courage to accomplish this dissertation.

I would like to express my gratitude to my supervisor Prof. Anders Hallén, who kindly agreed to consider me as his PhD student. I feel very lucky to have him as a supervisor. His positive attitude and continuous support kept me motivated throughout my stay at KTH. During all these years, his door was always open to discuss anything. I do not remember any day when he was at KTH and we did not have time to talk about something.

Thanks to the groups in the University of Helsinki for ALD depositions, and to Prof. Bengt G. Svensson’s along with his group in Oslo University for providing the opportunity for me to complete TDRC measurements in his lab. I also want to say thanks to Accelerator laboratory staff at the Ångström laboratory for their help to perform ion beam analysis. Dr. Muhammad Nawaz is also thanked for his continuous support and encouragement, and introducing me to new dimensions of the field.

I would like to thank our department secretaries in the first year Marianne Widing and in later years Gunilla Gabrielsson for their valuable help in administrative matters.

I am obliged to everybody in EKT group for providing a nice working atmosphere. Furthermore, I must acknowledge all who have helped me during all these years. Specifically to; Dr. Martin Domeij for his help regarding BJT studies, and Dr. Henry Radamson for discussions on all issues. For their support in different scientific matters, Prof. Mikael Östling, Prof. Carl-Mikael Zetterling, Prof. Gunnar Malm, Dr. Per-Erik Hellström, Dr. Margareta Linarsson are also thanked. Special thank goes to Dr. Jiantong Li, my office mate during the last three and half years, I learned a lot from him. To Benedetto Buono, Luigia Lanni, Eugenio Dentoni Litta, Oscar Gustafsson, Dr. Christoph Henkel, Dr. Valur Guðmundsson, and many others......, who have been part of my life at KTH, I also give thanks.

My special thanks for Mohsin Saleemi for the very nice time we spent together at KTH and outside. That was a part of my life, which I will never forget. Terrance Burks, Naeem Shahid and Shagufta Naureen are also thanked for sharing time and thoughts especially at lunch. I would also like to say thanks to my friends outside KTH for helping me to relax during my stay in Sweden.

I also want to thank Dr. Reza Ghandi, Dr. Mohammadreza Kalahdouz Esfahani and Dr. Jun Luo for all scientific and non-scientific discussions. I spent very good time with them.

Lastly, I want to send my gratitude to my parents and sweet sister Hina, for their prayers, continuous support and encouragement throughout my stay in Sweden. They were always with me, even though there were large distances between us.

Muhammad Usman Stockholm, January 2012

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Appended Papers

I. M. Usman, M. Nour, A. Yu. Azarov, and A. Hallén, “Annealing of ion implanted 4H-SiC in the temperature range of 100-800 oC analysed by ion beam techniques”, Nuclear Instruments and Methods in Physics Research B, vol. 268, no. 11-12, p. 2083-2085, 2010

II. M. Usman, M. Nawaz, and A. Hallén, “Position dependent traps and carrier compensation in 4H-SiC bipolar junction transistors”, IEEE Transactions on Electron Devices (submitted)

III. M. Usman, A. Hallén, R. Ghandi, and M. Domeij, “Effect of 3.0 MeV helium implantation on electrical characteristics of 4H-SiC BJTs”, Physica Scripta, vol. T141, p. 014012, 2010

IV. A. Hallén, M. Nawaz, C. Zaring, M. Usman, M. Domeij, and M. Östling, “Low-temperature annealing of radiation-induced degradation of 4H-SiC bipolar transistors”, IEEE Electron Device Letters, vol. 31, no. 7, p. 707-709, 2010

V. M. Usman, B. Buono, and A. Hallén, “Impact of ionizing radiation on the SiO2/SiC interface in 4H-SiC BJTs”, IEEE Transactions on Electron Devices (submitted)

VI. M. Usman, T. Pilvi, M. Leskelä, A. Schöner, and A. Hallén, “Characterization of Al-based high-k stacked dielectric layers deposited on 4H-SiC by atomic layer deposition”, Materials Science Forum, vols. 679-680, p. 441-444, 2011

VII. M. Usman, A. Hallén, T. Pilvi, A. Schöner, and M. Leskelä, “Toward the understanding of stacked Al-based high-k dielectrics for passivation of 4H-SiC”, Journal of Electrochemical Society, vol. 158, no. 1, p. H75-H79, 2011

VIII. M. Usman, and A. Hallén, “Radiation-hard dielectrics for 4H-SiC: A comparison between SiO2 and Al2O3”, IEEE Electron Device Letters, vol. 32, no. 12, p. 1653-1655, 2011

IX. M. Usman, A. Hallén, K. Gulbinas, and V. Grivickas, “Effect of nuclear scattering damage at the SiO2/SiC and Al2O3/SiC interface – A radiation hardness study of dielectrics”, Materials Science Forum, To be published in 2012 (accepted)

Other papers, not appended

X. M. Usman, A. Nazir, T. Aggerstam, M. K. Linnarsson, and A. Hallén, “Electrical and structural characterization of ion implanted GaN”, Nuclear Instruments and Methods in Physics Research B, vol. 267, no. 8-9, p. 1561-1563, 2009

XI. A. Pinos, S. Marcinkevičius, M. Usman, and A. Hallén, “Time-resolved luminescence studies of proton-implanted GaN”, Applied Physics Letters, vol. 95, no. 11, p. 112108, 2009

XII. K. Gulbinas, V. Grivickas, H. P. Mahabadi, M. Usman, and A. Hallén, “Surface recombination investigation in thin 4H-SiC layers”, Materials Science (MEDŽIAGOTYRA), vol. 17, no. 2, p. 119-124, 2011

Conference contributions i) M. Usman, A. Nazir, T. Aggerstam, M. K. Linnarsson, and A. Hallén,

“Electrical and structural characterization of ion implanted GaN”, 16th International conference on ion beam modification of materials (IBMM), Dresden, Germany, September 2008 (Poster)

ii) A. Hallén, M. Nawaz, C. Zaring, M. Usman, M. Domeij, and M. Östling, “Radiation hardness of 4H-SiC bipolar junction transistors”, 7th European conference on silicon carbide and related materials (ECSCRM), Barcelona, Spain, September 2008 (Poster)

iii) M. Usman, A. Hallén, R. Ghandi, and M. Domeij, “Effect of 3.0 MeV helium implantation on electrical characteristics of 4H-SiC BJTs”, 23rd Nordic semiconductor meeting (NSM), Reykjavik, Iceland, June 2009 (Oral presentation)

iv) A. Pinos, M. Usman, S. Marcinkevičius, and A. Hallén, “Time-resolved photoluminescence studies of proton implanted GaN”, 15th Semiconductor and insulating materials conference (SIMC-XV), Vilnius, Lithuania, June 2009 (Oral presentation)

v) V. Venkatachalapathy, M. Usman, A. Galeckas, A. Hallén, and A. Yu. Kuznetsov, “Intrinsic defect evolution resulted from II/VI ratio variation in MOVPE ZnO”, 25th International conference on defects in semiconductors (ICDS), St. Petersburg, Russia, July 2009 (Poster)

vi) M. Usman, M. Nour, A. Yu. Azarov, and A. Hallén, “Annealing of ion implanted 4H-SiC in the temperature range of 100-800 oC analyzed by ion beam techniques”, 19th International conference on ion beam analysis (IBA), Cambridge, UK, September 2009 (Poster)

vii) M. Usman, T. Pilvi, M. Leskelä, A. Schöner, and A. Hallén, “Characterization of Al-based high-k stacked dielectric layers on 4H-SiC by Atomic Layer Deposition”, 8th European conference on silicon carbide and related materials (ECSCRM), Oslo, Norway, September 2010 (Poster)

viii) M. Usman, and A. Hallén, “Ion implantation studies on SiC BJTs”, 1st SPIRIT Workshop on new detector technologies for advanced materials research using ion beam analysis, Croatia, October 2010 (Oral presentation)

ix) M. Usman, M. Nawaz, and A. Hallén, “Position dependent traps investigation in 4H-SiC bipolar junction transistors”, 24th Nordic semiconductor meeting (NSM), Aarhus, Denmark, June 2011 (Oral presentation)

x) M. Usman, A. Hallén, K. Gulbinas, and V. Grivickas, “Radiation hard dielectrics for 4H-SiC”, 14th International conference on silicon carbide and related materials (ICSCRM), Cleveland, USA, September 2011 (Poster)

Summary of Appended Papers and Author’s contribution

PAPER I

The main focus of the paper is the damage production and annealing in 4H-SiC as a result of relatively high doses of argon implantation. The analysis of the implanted and annealed SiC has been conducted with ion beam techniques (RBS and NRA) by studying Si and C sublattices individually. It is observed that a considerable amount of relatively low concentration of damage in SiC can be annealed up to 800 oC temperature treatment. However, the damage in the range of atomic density, i.e. amorphization level, is not possible to recover in this temperature range.

AUTHOR’S CONTRIBUTION

The author was involved in the planning of experiments and sample preparation, RBS measurements on some samples and all NRA measurements. Also responsible for the data analysis and manuscript writing.

PAPER II

The degradation of the electrical properties of SiC-based bipolar junction transistors due to carrier traps at different positions in the device has been investigated in this paper. The study has been conducted by using TCAD device simulator and some results have been qualitatively compared with the experimental results obtained after ion implantation in the collector region of BJTs. The results show that the base region in BJT is very sensitive to the traps, whereas, similar concentrations of traps in emitter and collector regions produce less degradation in the device properties.


The study was planned on author’s own initiative, and the author conducted all TCAD simulations, sample preparation, conducted all experimental measurements and data analysis, and also wrote the manuscript.

PAPER III

The paper deals with the collector damage due to high energy and high fluence helium implantations in BJTs. A clear degradation of the electrical properties of the device has been observed. In addition, it has been observed that ion implantation in the bulk of the device produce a layer of damaged material, which has negative implications on device output characteristics. An annealing of these devices does not result in full recovery of the devices for such high damage levels, however, a partial improvement due to low temperature damage recovery of the material is observed.


The author was involved in planning the study, samples preparation, performing all measurements and data analysis, and also responsible for the manuscript writing.

PAPER IV

Low temperature annealing and recovery of the electrical properties of BJTs after low fluence ion implantation has been studied in this paper. It has been observed that a temperature treatment as low as 420 oC can fully recover the ion implantation induced degradation in the device due to relatively low concentration of damage. The annealing behavior has been correlated with previous DLTS studies as well.


The author participated in sample preparation, ion implantation, and data analysis.

PAPER V

In this paper, the SiO2 interface with SiC, between the emitter and base contact region and beyond, in SiC-based BJTs has been bombarded with helium ions and the degradation of the device is studied. The results indicate that roughly 15% degradation in device characteristics appears after high doses of ionizing radiation. The primary cause of the degradation, analyzed by TCAD device simulations, is the production of ionization-induced positive charge in the oxide. The annealing of ion implantation induced defects further degrades the performance of the device.


The study was planned on author’s own initiative. The author prepared all samples, performed all electrical measurements and data analysis, participated in simulations, and wrote the manuscript.

PAPER VI

The paper deals with different types of Al-based stacked dielectrics for 4H-SiC, with a main focus on AlN. It has been found that ALD-deposited AlN forms a polycrystalline structure that leads to current leakage through the dielectric, however, the introduction of thin SiO2 layer prevents this leakage to a certain extent. In this stack, addition of Al2O3 layers further improves the CV and IV characteristics of the dielectric by forming a multi-layer dielectric stack.


The author was fully involved in planning, sample preparation and processing, all measurements, data analysis, and manuscript writing.

PAPER VII

Aluminum-based multi-layer dielectric stacks with alternating layers of AlN and Al2O3 on top of a thin layer of SiO2 have been investigated and compared in this paper. A current leakage through AlN layer, due to its polycrystalline structure, is prevented by adding an amorphous layer of Al2O3. The high temperature stability and annealing behavior are also investigated. It has been observed that a significant difference in the electrical properties of the whole stacked dielectrics appears by altering the sequence of deposited layers. However, both types of the stacked dielectrics are reliable and can present an alternate solution for the passivation of 4H-SiC.


The author was fully involved in planning, sample preparation and processing, all measurements, data analysis, and manuscript writing.

PAPER VIII

In this paper, ion implantation induced degradation of the dielectric/SiC interface has been investigated for the first time. A comparison between existing dielectric, i.e. SiO2, and a potential replacement Al2O3, has been studied with respect to their radiation hardness. It has been revealed that the interface of Al2O3 with SiC shows less degradation than the interface of SiO2 in terms of interface trap density as a function of ionizing radiation. A comparison of same dielectrics on Si has also been presented. In addition to that, it has been observed that the current leakage and breakdown of the dielectrics are not sensitive to the ionizing radiation damage and remain relatively unaffected even after high doses.


The study was planned on the author’s own initiative. Sample preparation and processing were done by the author, as well as all measurements, data analysis, and responsible for manuscript writing.

PAPER IX

The influence of nuclear scattering damage on the interface of SiO2 and Al2O3 with SiC has been studied with the help of capacitance-voltage (CV) and optical free carrier absorption measurements (FCA). It has been observed that the defects induced by ion implantation at the interface between the dielectric and SiC result in degrading the average lifetime in the epi-layer due to enhanced surface recombination. The trend observed for the average lifetime of carriers in the epi-layer for different fluences of ions follows the same trend as obtained from CV measurements.


The author was involved in planning, sample preparation and processing, all electrical measurements, data analysis, and responsible for manuscript writing

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Contents

1 Introduction 1!

2 Ionizing radiation and SiC 5!2.1 Radiation environments ...................................................................................... 5!2.2 Ion implantation and irradiation .......................................................................... 8!2.3 Radiation effects in microelectronics .................................................................. 9!

2.3.1 Bipolar junction transistor ...................................................................... 10!2.3.2 MOS-based devices ................................................................................ 10!

2.4 Silicon versus silicon carbide ............................................................................ 11!2.5 Implantation-induced defects and damage in SiC ............................................ 11!2.6 Radiation hardness studies of SiC devices and device passivation .................. 15!

3 Characterization techniques and simulation tools 17!3.1 Structural analysis techniques ........................................................................... 17!

3.1.1 Ion beam analysis .................................................................................... 17!3.1.2 X-ray diffraction ..................................................................................... 19!3.1.3 Scanning probe microscopy (SPM) ........................................................ 20!

3.2 Free carrier absorption (FCA) ........................................................................... 21!3.3 Electrical measurements for BJTs .................................................................... 22!

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3.4 Electrical characterization of dielectrics ........................................................... 22!3.4.1 Capacitance–Voltage (CV) ..................................................................... 22!3.4.2 Current–Voltage (IV) .............................................................................. 24!3.4.3 Thermal dielectric relaxation current (TDRC) ....................................... 25!

3.5 Simulation tools ................................................................................................ 25!3.5.1 SRIM ....................................................................................................... 25!3.5.2 TCAD simulation tool ............................................................................ 26!

4 4H-SiC BJTs subjected to ionizing radiation 29!4.1 Device structure ................................................................................................ 29!4.2 Device simulations ............................................................................................ 30!

4.2.1 Ionization studies .................................................................................... 30!4.2.2 Bulk traps ................................................................................................ 32!

4.3 Ion irradiation of BJTs – Experimental results ................................................. 37!4.3.1 Implantation in dielectric passivation layer ............................................ 37!4.3.2 Ion induced damage in the collector ....................................................... 40!

5 Dielectrics for 4H-SiC – Passivation and radiation hardness 45!5.1 Processing of MIS structures ............................................................................ 46!

5.1.1 Dielectric formation ................................................................................ 47!5.2 Characterization of the MIS structures ............................................................. 48!

5.2.1 AlN .......................................................................................................... 48!5.2.2 Al2O3 ....................................................................................................... 49!5.2.3 Ta2O5 ....................................................................................................... 51!5.2.4 Dielectric stacks ...................................................................................... 51!

5.3 Thermal stability ............................................................................................... 55!5.4 Radiation hardness ............................................................................................ 57!

6 Conclusions and future outlook 61!

References 65!

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Symbols and Acronyms MIS Metal insulator semiconductor MOS Metal oxide semiconductor MOSFET Metal oxide semiconductor field effect transistor MISFET Metal insulator semiconductor field effect transistor MESFET Metal semiconductor field effect transistor BJT Bipolar junction transistor IGBT Integrated gate bipolar junction transistor RBS Rutherford backscattering NRA Nuclear reaction analysis XRD X-ray diffraction AFM Atomic force microscopy SPM Scanning probe microscopy SSRM Scanning spreading resistance microscopy FCA Free carrier absorption ALD Atomic layer deposition PECVD Plasma enhanced chemical vapor deposition CMP Chemical mechanical polishing SRIM Stopping and range of ions in matter TRIM Transport of ions in matter TCAD Technology computer aided design SRV Surface recombination velocity CV Capacitance voltage IV Current voltage Cox Oxide capacitance Qeff Effective oxide charge Dit Interface trap density Lt Traps layer Ic Collector current Ib Base current Vbe Base-emitter voltage Vce Collector-emitter voltage β Current gain εr Dielectric constant ΔEc Conduction band offset Ec Critical field τ Carrier lifetime

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Chapter 1 Introduction Electronic components are often exposed to various types of radiation. The radiation can alter the electrical performance, or even lead to permanent failure of electronic components deployed in radiation environments. The effect of radiation on devices depends on the type of radiation; for example, gamma radiation mostly induce ionization in the dielectric layers of the device, whereas energetic particles mainly create crystal damage in the semiconductor by the process of elastic scattering.

In the present world, silicon is a dominant electronic material for device manufacturing. However, it is not an ideal material for high power, high temperature, and radiation rich environments due to its relatively small bandgap and low thermal conductivity [1, 2]. In many applications, such as radiation environments, very high electric power applications, or very high temperature usage, larger bandgap, higher thermal conductivity and higher displacement energy are required. Wide bandgap semiconductor materials provide an alternate solution with a capability to perform better in such extreme environments. These materials include Silicon carbide (SiC), Gallium nitride (GaN), Zinc oxide (ZnO) and a few others. Silicon carbide is particularly interesting because it has been studied and developed to a larger extent than its competitors. Improvements in SiC material have provided an opportunity to offer a viable replacement for Si in power devices, and devices for harsh environment applications.

The effect of ion implantation or irradiation in SiC material has been extensively studied both electrically and structurally [3-5]. However, studies for SiC devices, subjected to ion implantation or irradiation, are also needed to understand the mechanisms involved in the degradation of the electrical performance. Such studies provide information on device tolerance and threshold radiation doses, and they are important for rating devices and to improve the device design for specific applications. Previously, the effects of radiation on SiC diodes [6, 7], MESFETs [8] and radiation detectors [9] have been studied, and it has been observed that SiC-based devices are highly resistant to radiation and generally give higher threshold for their degradation in comparison to conventionally available Si devices. The SiC bipolar junction transistor

Introduction

2

(BJT) presents itself as a contender for next generation of high voltage switches for high power and harsh environment applications. Successful BJTs have already been demonstrated with high current gain values, and they are available commercially [10]. However, reliability issues, such as radiation hardness for BJTs, are now becoming important.

In the present thesis, the effects of ionizing radiation on SiC material, dielectrics and SiC-based BJTs have been studied by using ion implantation, or irradiation at multiple energies and doses in a controlled accelerator environment. The ion species chosen for these studies are hydrogen (protons), helium (α-particles), carbon and argon. Ions in the high energy range have high non-linear energy transfer both for elastic and non-elastic events, but the main effect of these ions comes from the accumulation of point defects, particularly around the end of the ion path. Therefore, it has a high value of interest to understand the effects of ion radiation on the overall performance of the device due to the radiation damage effects in different areas of a BJT. It has been observed that higher doses of radiation produce more resistant damage in the device, which is not recoverable at low temperatures. However, the degradation produced by low doses shows full recovery of device parameters already up to 420 oC annealing temperature.

Dielectrics are an essential part of electronic devices in the form of passivating material, or gate dielectric in MOSFETs. For semiconductor power devices, passivation of surfaces and sharp edges plays a critical role in determining the overall performance and long-term stability of the device. Dielectrics are also vulnerable to the radiation effects and therefore, special attention is required for this part of the device. Silicon dioxide (SiO2), which is a natural oxide of SiC, is currently used as a passivation material in SiC-based devices. It has a relatively low dielectric constant and limits the performance of devices and thereby it needs to be replaced with some other high-k material, which is compatible with SiC. Several studies have been conducted in this area, in an effort to find an alternate passivating dielectric for SiC [11]. Potential high-k dielectrics for SiC such as Al2O3, AlN and Ta2O5, are studied in this thesis, both individually and also as alternate layers in a stacking geometry. Based on promising initial results, Al2O3 is further investigated with respect to its thermal stability and radiation tolerance in comparison to existing SiO2. The results of this thesis indicate that the Al2O3 is stable at higher temperatures compared to SiO2, both structurally and electrically, and is also able to resist higher fluences of ionizing radiation.

To summarize, the main focus of this thesis is the effect of ionizing radiation on SiC-based devices, mainly BJTs. In addition, MIS structures are prepared on SiC and the radiation hardness of the dielectrics for passivation and gate dielectrics is analyzed. The thesis is organized in five main chapters. In Chapter 2, a description of different forms of natural radiation present in the cosmic ray spectrum, as well as in man-made environments is given. The fundamental properties of SiC in comparison to Si are briefly touched upon, and the concept of electronic and nuclear stopping of energetic ions in matter is described. Additionally, the defect production and defect annealing in relatively low temperature ranges in SiC is presented. Chapter 3 deals with characterization techniques used during the whole work. In addition to that, a brief description of the SRIM [12] simulation tool for ion implantation studies and Sentaurus TCAD device simulator [13] is provided. In Chapter 4, along with an introduction to

3 Introduction

BJT, TCAD-based simulation studies of traps in different regions of a SiC-based BJT are presented. Key results from BJT ion implantation and irradiation studies in comparison to unimplanted device results, are also presented. The impact of low temperature annealing on these implanted devices is also presented in this chapter. Chapter 5 focuses on different high-k dielectrics for 4H-SiC. The fabrication processes of MIS structures for different dielectrics are described. The studies are extended from individual dielectric to stacked dielectrics to improve the overall performance. The thermal stability for these dielectrics is also examined. Moreover, the defects produced at the dielectric and SiC interface due to ionizing radiation are investigated to find better and radiation hard dielectric. Finally, some concluding remarks from the thesis and a future outlook of the current work are given in Chapter 6.

Introduction

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Chapter 2 Ionizing radiation and SiC The term ionizing radiation refers to the type of radiation that have enough energy to remove the electrons from the lattice atoms and break the chemical bonds between atoms of a material. This radiation consists of charged particles such as heavy ions, alpha particles (helium nuclei), protons, neutrons, electrons (beta particles), gamma radiation and other more exotic particles. These types of radiation affect the performance of electronic devices working in environments where such radiation exist. A description of these environments and the abundance of various types of radiation are given in next section. In the following sections of this chapter, the effect of radiation on material and devices with a special focus on SiC will be discussed in comparison to Si. Our main interest is on radiation effects caused by our processing, i.e., ion implantation and controlled experiments with ions.

2.1 Radiation environments The spectrum of radiation may vary significantly in different environments. The radiation environments can be classified as Upper Space, Aviation, Natural environment, and some artificial environments such as, High energy physics experiments, Nuclear industry and Device processing [14].

In space environment, ionizing radiation exist in the form of high energy charged particles. The main sources for these radiation are the trapped protons and electrons in the so called Van Allen belts, heavy ions trapped in the magnetosphere, and protons and heavy ions from solar flares. Further away from the earth, various types of ionizing radiation ubiquitously exist in cosmic background radiation, which consist of about 87% protons, 12% helium nuclei, and 1% of electrons and other heavier ions [15]. The energies of these cosmic rays range from 107 eV to 1018 eV. The cosmic radiation can be classified according to the origin as solar, galactic, or extra galactic radiation and have different energy ranges. The energy of solar cosmic radiation lies in the range of 107 to 1010 eV and they have the highest flux. Galactic cosmic radiation have typical energy in the range from 1010 to 1015 eV and the extra galactic cosmic radiation lies in

Ionizing radiation and SiC

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higher energy range i.e. up to 1018 eV [16]. A typical cosmic radiation spectrum is shown in Figure 2.1, which summarizes the overall intensities of the cosmic rays with particle energies. The intensity of cosmic rays outside the Earth’s atmosphere is much larger and this fact needs to be considered in the design of electronics for satellites and aircrafts. However, the lifetime of such devices is still a critical issue.

Figure 2.1: Cosmic ray flux versus particle energy [17].

The cosmic rays present in space are primary cosmic rays, which are converted to secondary cosmic rays when they collide with the particles in earth’s atmosphere, generating cosmic ray showers. When cosmic ray particles enter the earth’s atmosphere, the probability for their collision with molecules, such as oxygen and nitrogen, is increased and ionization occurs. An initial collision produces pions, which quickly decay into muons and some of them decay into electrons, positrons and neutrinos. A typical cosmic shower and its reactions are shown in Figure 2.2. For being highly interacting particles, electrons and positrons produce further ionization into the atmosphere and normally annihilate before reaching the surface of the earth. On the contrary, muons are highly non-interacting particles and can reach the surface of the earth by losing part of their energy in more ionization processes. The resulting form of cosmic rays that appears at the surface of earth is mostly muons. A rough estimate for an average flux of muons at sea level is as 1 muon/cm2-min.

7 2.1 Radiation environments

Figure 2.2: Development of cosmic ray shower in the earth's atmosphere [18].

In Natural environment, which is typical for the electronics used in our everyday life, a major source of radiation affecting the electronic devices comes from the decay of radioactive materials, which consists of mainly alpha and beta particles. In addition, decay products of cosmic rays exist abundantly in natural environment.

In high energy physics experiments, high intensity and rate of radiation are present, which affect the detectors around the reaction point negatively. Typical examples are huge particle detectors installed at the Large Hadron Collider (LHC) in CERN, such as CMS, ATLAS, ALICE and LHC-b. These detectors suffer very high doses of multiple types of radiation, which is referred as luminosity. The luminosity level for particle detectors at LHC is 1033-1034 cm-2s-1, which will be upgraded to 1035 cm-2s-1 for super LHC in near future [19]. In these experiments, highly energetic protons, electrons, or heavy particles are used to study elementary particles, e.g. hadrons, bosons, muons and quarks. Electromagnetic radiation are also produced as a result of particle interactions, which affect the performance of semiconductor detectors.

Nuclear reactors are a major source of energy these days. The types of radiation generated in these reactors are mostly gammas and neutrons, but also heavy and light ions. The by-products of nuclear reactions consist of energetic ions; however, their penetration in the surroundings is relatively low. In comparison to other radiation environments, radiation flux in nuclear applications is enormously high, and can easily lead to the degradation of electronic devices placed at, or near such installations.

Semiconductor device fabrication involves multiple processing steps, which can induce radiation damage at different locations in the device. The important processing procedures that can be harmful for state of the art device, from a radiation viewpoint, involves ion implantation, dry etching, photo-resist stripping, sputtering of metals, lithography, plasma enhanced chemical vapor deposition (PECVD), high temperature treatment etc. The effect of these processes on devices is considerable and therefore special annealing and cleaning processes must be developed to limit the effects. One


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example is the interface between the dielectric and the semiconductor surface, which needs to have low density of electronic states and defects. A number of etching processes, involved in the processing, severely damage the surface of the semiconductor leading to a high level of surface states [20], and a degradation of the device performance follows.

Summing up the natural and artificial radiation environments, it is clear that the semiconductor devices are constantly subjected to some kind of radiation. The radiation can alter the performance of a device by affecting its different regions. In this thesis, we have studied the effects of ionizing radiation on 4H-SiC material and in different regions of its devices. In this effort, a controlled ion beam with different energies and ions is used to implant or irradiate the material, or devices.

2.2 Ion implantation and irradiation In laboratory environments, the ion radiation effects on electronic devices are studied by using ion implantation with different energies to produce defects in different regions of the device. Ions in the keV to MeV range produce ionization and crystal damage in semiconductor materials and devices, and different fluences of ions can simulate the effect of radiation flux. For this purpose, an ion accelerator is used in a controlled environment, which provides an opportunity to probe different depths in a material. In a semiconductor device, consisting of dielectrics or semiconducting multilayer of material, the damaging effect of ionizing radiation on the performance and reliability of the device can be understood with the help of these kinds of experiments.

Ion implantation is performed by directing a focused mono-energetic beam of accelerated ions onto a target and is normally used to alter the properties of the target by introducing other elemental species in the target, i.e. doping. The word implantation refers to the process when ions stop in the target at a certain depth depending on the energy of impinging ions. However, when the energy of the implanting ions is sufficiently high so they pass through the target, the process is named irradiation. In this thesis, the term, ion irradiation, is used when the projected range of ions is beyond the region of interest, i.e., when ion implantation is performed on a device structure with adequately higher energy so the ions pass through the active area of a particular device, and stop in the substrate.

During the process of ion implantation, each ion undergoes scattering events with electrons and nucleus of the atoms in the target material and loses its energy due to electronic and nuclear stopping interactions, and as a result, several types of defects are introduced in the target. In electronic stopping, the traversing ions interact with the electronic system of the target, i.e. electrons orbiting around the nucleus of the crystal atoms, and consequently, electrons are knocked out from the atoms producing ionization damage. Meanwhile, energetic ions also scatter from the nucleus and lose their energy in elastic collisions. This process is known as nuclear stopping and it becomes the dominant process around the end of ion range. The nuclear stopping results in displacement damage, when the energy transferred to the target atoms is larger than its binding energy. The electronic and nuclear stopping powers or the energy loss of the incoming particles per unit path length determine the depth of implanted ions in a particular material. The average depth of implanted ions in a target

9 2.3 Radiation effects in microelectronics

is referred as projected range of ions, Rp, and it depends on the angle of incidence of ions in a crystalline material, ion type and its energy. Due to the stochastic nature of the collision events, the stopped ions are distributed around their projected range and the phenomenon is called straggling, which is the standard deviation of the projected ion range, ΔRp.

2.3 Radiation effects in microelectronics Radiation induced effects play an important role in limiting the lifetime and reliability of microelectronic devices. The semiconductor components typically consist of a semiconductor material, dielectrics/insulators, various metallization and packaging materials. The operation of these components in the radiation environments, described previously, is affected by energetic particles and electromagnetic radiation with a wide range of energies. These energetic particles, or photons, lose their kinetic energy by interacting with the atoms of the material in different ways, while traversing through it. The influence of radiation on insulating and conductive parts of the device is very different. The general description of known effects on these parts is summarized in Table 2.1. Table 2.1: A comparison of radiation effects in different materials, commonly used in a semiconductor device, due to electronic and nuclear stopping.

Material Electronic stopping (ionization)

Nuclear stopping (crystal damage)

Insulators Charge build up [21] Not so problematic

Semiconductors Could affect devices under operation, not important

Crystal damage leading to leakage, compensation and lifetime alteration

Metals No effect No effects unless very high doses

Radiation induced errors in semiconductor devices can be classified in the

following way:

1) Single event upset (SEU), create soft errors 2) Single event latchup (SEL), single event gate rupture (SER), and single event

burnout (SEB), create permanent damaging effects resulting in catastrophic failure of the device.

In many space applications, high power and high voltage devices are required. In silicon technology, large area and bias conditions in power devices make them more susceptible to radiation effects. For such applications, power metal oxide field effect transistor (MOSFET), isolated gate bipolar transistor (IGBT) and bipolar junction


10

transistor (BJT) are often employed for high speed, high frequency and very large power or current applications. Some of these commercially available Si-based power devices have been tested with respect to their radiation response under the influence of neutrons, protons and heavy ions’ fluxes [22, 23]. In this thesis, the focus is on ion radiation effects on the performance of BJTs and the passivating dielectrics, and a full description of radiation effects in microelectronics is beyond the scope. In the context of the present work, general effects of ionizing radiation in BJTs and MOS structures are discussed in following sections.

2.3.1 Bipolar junction transistor Bipolar junction transistors are prone to degradation of device properties, caused by ionization and displacement damage in the passivating oxide and the semiconductor material. The BJT properties that are mainly affected are current gain (β=Ic/Ib) and the leakage current. Current gain is reduced due to the introduction of recombination centers in the semiconductor material due to displacement damage, but also from ionizing effects in the dielectrics, and the interface between semiconductor and dielectric. The effects of radiation on Si-based BJTs have been studied widely in last few decades [24, 25]. Radiation induced recombination centers in the emitter, the emitter-base space charge region, the base, or in the collector can all increase the base current, resulting in degradation of the current gain. Displacement damage in the semiconductor can increase the number of recombination centers and increase the reverse leakage through the device. The surface of the semiconductors, and the interface properties are also important for controlling current gain values of the device. Ionizing radiation can induce charges in the oxide [26] and/or increase the number of interface states, resulting in an increased base current. In addition to these effects, radiation such as electrons or heavy ions can produce doping compensation, affect the mobility (in case of high damage), increase the leakage current or alter the lifetime of carriers in different regions of the device. In the present work, SiC-based BJTs are studied with respect to their radiation tolerance.

2.3.2 MOS-based devices Dielectrics such as SiO2 are used as passivation in most devices, or a gate dielectric in MOSFET applications. Ionizing radiation induce trapped charges in the oxide/dielectric layers in semiconductor devices. This creates a major concern for the reliability of the devices. The induced charges in the oxides degrade the performance of the device by shifting the threshold voltage, increasing the noise level and affecting the channel mobility in MOSFETs. The induced charges are stored in trap sites (pre-existing or radiation induced) for some time, and released subsequently under bias conditions of the device, affecting its operation. The radiation affects in dielectrics are mostly studied by fabricating metal oxide semiconductor (MOS) structures. In the present thesis, MOSFET is not discussed; however, a central part of these devices, which has strong influence on device performance, i.e. MOS, has been studied with respect to ionizing radiation affects due to heavy ions.

11 2.4 Silicon versus silicon carbide

2.4 Silicon versus silicon carbide Silicon carbide is considered to be a promising candidate material for high temperature, high power, high frequency, and radiation rich environment applications [27]. This is due to its large bandgap, high thermal conductivity, high breakdown field, and higher radiation resistance. With its potential use in radiation rich environments, wide bandgap and high displacement energy for both Si and C lattice atoms are particularly interesting properties that offer a significant advantage over conventional semiconductor materials and classify it as a radiation hard semiconductor material. Some basic properties of SiC, which are of interest in radiation applications, in comparison to Si, are listed in Table 2.2. Table 2.2: A comparison of basic properties of Si and 4H-SiC [26-30].

Property Si 4H-SiC

Bandgap (eV) 1.12 3.26

Dielectric constant (εr) 11.9 9.7

Critical field Ec (MV/cm) 0.3 2.2

Atomic displacement Energy (eV) 13-20 Si=35, C=20

Atomic density (g/cm3) 2.33 3.21 Thermal Conductivity (W/cm-s) 1.5 3.7

Electron-hole pair production energy (eV) 3.6 7.8-9

2.5 Implantation-induced defects and damage in SiC Various types of point defects normally exist in as-grown semiconductor materials, but they can also be introduced externally by various processes of irradiation or ion implantation. Also larger structural defects, such as micropipes or stacking faults are introduced during bulk or epitaxial growth. However, with improving growth technology, the material quality has improved considerably. The total amount of point defects produced by irradiation or implantation is referred as damage. Point defects have significant influence on electrical and optical properties of the material depending on their position in bandgap, capture cross-section, and their concentration. The interaction of these defects results in reduced charge carrier lifetimes, carrier compensation or deactivation of dopants, and also elevated diffusion of dopants, which has strong impact on the fabricated device performance.

By the process of ion implantation, mainly vacancies, interstitials, di-vacancies and their combinations thereof are introduced. The defects and their effect on the material can be characterized with the help of different electrical or structural techniques such as, deep level transient spectroscopy (DLTS), ion beam techniques (RBS, NRA) and scanning spreading resistance microscopy (SSRM). The analysis techniques are normally chosen by considering the implantation doses and the resultant defect


12

concentrations in the material. For very low doses DLTS is more favorable and for higher doses RBS, NRA and SSRM are employed.

Most commonly discussed defects in SiC are the Z1/Z2 defects, which exist both in as-grown and irradiated material. DLTS studies on these defects suggest that the Z1/Z2 defects are positioned at Ec-0.68 eV level in the bandgap [31] and are thermally stable at temperatures even beyond 1500 oC [32], which is a typical defect annealing temperature for SiC [33]. In addition, the EH6/EH7 [34] defect complex at Ec-1.5 eV in 4H-SiC, are also important to mention. These defects have relatively large charge carrier capture cross-sections and have been pointed out as two major recombination and generation centers in 4H-SiC [35]. In addition, it has been shown by DLTS that a handful of electrically active defects exist in the upper part of the bandgap after low dose irradiation of 4H-SiC [36]. Many more defects [37-39] have been reported but the origin and identity of most of the defects is still unknown and a lot of research is on the way for their understanding.

In SiC, with high displacement energies, even higher fluences (ions/cm2) of implantation ions produce relatively less amount of damage. However, the higher implantation doses produce considerable damage in the material, which can be conveniently studied with the help of ion beam techniques. A detailed description of these techniques is provided in Chapter 3 of this thesis. The studies of the damage accumulation and its annealing in SiC are conducted for relatively high doses of Ar ions in SiC. Figure 2.3 shows Rutherford backscattering analysis of SiC epitaxial layers implanted with different fluences of argon ions with energy of 200 keV. It is clear from the figure that the low fluence (4×1014 cm-2) produces a damage peak around the projected range of ions whereas higher fluence (2×1015 cm-2) amorphize the whole region, where the ions have passed, and produce higher concentration of damage in this regions. The spectra show only Si damage in the material.

240 250 260 270 280 290

0.2

0.4

0.6

0.8

1.0

2x1015 cm-2

4x1014 cm-2

Rel

ativ

e di

sord

er

Channel No.

2.0 1.5 1.0 0.5 0.0Depth (µm)

Surface

Figure 2.3: RBS damage profile of 200 keV Ar+ implanted SiC. The profiles have been extracted using Schmid algorithm [40].

13 2.5 Implantation-induced defects and damage in SiC

0 200 400 600 800

1

2

3

4

5

6

Si

Inte

grat

ed D

amag

e (x

1017

atom

s/cm

2 )

Temperature (oC)

10

20

30

40

Inte

grat

ed Y

ield

(x10

00)

C

Figure 2.4: Damage annealing of Si and C sublattices [Paper I]. Since SiC contains 50% of carbon atoms, it is also important to understand the

damage formation in the carbon sublattice. The carbon signal in RBS spectra of SiC is normally buried under the silicon signal. To enhance signals from carbon atoms in SiC, carbon resonance reactions are considered. In the present study, 12C(α,α)12C at 4.26 MeV is used to enhance the yield from the carbon sublattice in implanted SiC by using high energy helium ion beam.

Annealing of this damage, studied with the help of RBS (Si sublattice) and NRA (C sublattice), reveals that the low concentration of damage is possible to anneal at relatively low temperatures both for Si and C sublattices, however, the highly damaged SiC crystals are not possible to recover with low temperature annealing, up to 800 oC. Figure 2.4 shows that the sublattices of Si and C in SiC, implanted with lower fluence of ions, can be annealed at relatively low temperatures. However, full recovery of this implantation-induced damage requires higher temperatures [33].

The electrical impact of high radiation dose induced damage in SiC has been widely discussed at material level by using SSRM [4, 41]. These studies suggest that the irradiation or implantation induces crystal defects, which reduce the carrier flow

Figure 2.5: SSRM image of 330 keV He+ implanted SiC. An average resistance profile extracted from the image is also presented [Paper II].


14

through the damaged region, and consequently create a highly resistive layer in the material. An example of a cross-sectional SSRM scan on a SiC epitaxial layer, implanted with 330 keV helium ions with a dose of 3×1010 cm-2, is presented in Figure 2.5. An extracted averaged resistance profile is overlaid on the SSRM image. The analysis suggests that this fluence of ion implantation creates a localized damage region resulting in an increased resistance around Rp. The annealing behavior of the electrical properties of ion implanted SiC in low temperature range has been previously studied by SSRM [4].

The main difference of the Ar+ and He+ implantation (discussed in this section) is the shape of damage profile and depth of the damage under the surface of the sample. In the case of helium, the damage is more localized and more deeply located due to higher energy, whereas Ar ions, with higher mass, create more scattering damage along its entire track inside the material. Figure 2.6 shows a SRIM simulation [12] analysis of vacancies produced by the Ar and He ions in SiC. The distribution of implanted ions as a function of depth is also presented. Based on the results presented before (Figure 2.3), it is obvious that the high dose of Ar ions produces amorphous layers, and the vacancies produced in this case are of the order of atomic density of SiC. This amount of damage is not possible to recover at low temperatures, whereas low fluence Ar+ implanted SiC is recoverable in the same range of temperature. On the other hand, even four orders of magnitude lower concentration of vacancies in SiC show electrical effects, with an increased resistance around the end of ion range (Figure 2.5).

0.0 0.2 0.4 0.6 0.8 1.0 1.2

1014

1016

1018

1020

1022

1024

Vacancies in SiC 2x1015 cm-2 Ar+

4x1014 cm-2 Ar+

3x1010 cm-2 He+

Vac

anci

es/c

m3

Depth (µm)

0

2

4

6

8

10

12Atomic density of SiC

330 keV He+

distribution

Ions

x10

4 /cm

200 keV Ar+

distribution

Figure 2.6: SRIM vacancy and implanted ion's profile distribution versus depth in SiC.

The lattice damage produced by ion fluences results in point defects. It is well know that the elastic energy deposition forms primary defects, such as Si and C vacancies and interstitials. A substantial part of these defects, however, recombines or forms electrically neutral defects. Only 5–10% form electrically active stable defects [5] that influence the electrical properties of SiC, and is clearly visible in SSRM studies.

15 2.6 Radiation hardness studies of SiC devices and device passivation

2.6 Radiation hardness studies of SiC devices and device passivation Silicon carbide based devices such as radiation detectors, Schottky diodes and MESFETs have been previously studied with respect to their radiation hardness. The studies of radiation detectors i.e. diodes have been performed by the irradiation of neutrons [42], protons, gamma rays [43], electrons [44], light ions [45] and pions [46], and Schottky diodes by proton, neutron [47] and heavy ion [48] irradiation. In addition, studies on MESFETs have been carried out by energetic electron irradiation [49] and high dose irradiation of gamma rays [8]. All these studies provide a clue to the superior properties of SiC-based basic devices in radiation environments. For more complex devices such as bipolar junction transistors and MOSFETs there is no literature available.

The growth, or deposition of passivation material plays an important role in the radiation response of the device that can be different for differently grown oxides [26]. Therefore, for radiation point of view, passivation is one of the important issues to be addressed. In this respect, different studies have been reported to enhance the radiation hardness of the devices [50]. In addition, the choice of dielectric material for passivation, its deposition, processing and post processing treatments along with appropriate geometry requires special attention to improve the passivation quality and make the devices radiation hard.

In the present thesis, the main focus has been on the radiation tolerance of BJTs in Chapter 4, and MOS capacitors (a basic building block of MOSFET) structures in Chapter 5, to understand the impact of ion radiation on the performance of the device.


16

Chapter 3 Characterization techniques and simulation tools In this thesis, several characterization techniques have been employed that can be grouped in two categories, i.e. structural and electrical analysis techniques. The main techniques considered for structural analysis are ion beam analysis techniques, such as Rutherford backscattering (RBS) and nuclear reaction analysis (NRA), x-ray diffraction (XRD), scanning electron microscopy (SEM) and atomic force microscopy (AFM). The electrical analysis has been performed by using mainly capacitance-voltage (CV) and current-voltage (IV) measurements, but also thermal dielectric relaxation current (TDRC) and scanning spreading resistance microscopy (SSRM) have been used. In addition to that, novel optical analysis method by using free carrier absorption (FCA) has also been introduced to perform surface recombination analysis at oxide/semiconductor interfaces.

Simulations provide detailed information about the materials and devices in operation. Therefore, some important simulation tools are also used, to understand the ion implantation in materials (SRIM) [12], RBS data analysis (SIMNRA) [51] and device simulations (Sentaurus TCAD) [13]. The most important techniques and simulation tools for this thesis are described in detail in the following sections.

3.1 Structural analysis techniques

3.1.1 Ion beam analysis Ion beam analysis (IBA) techniques present a powerful tool for material analysis. These techniques are mainly based on energetic ions’ interaction with material. In IBA techniques, energetic ions are directed on a target material; when a charged particle with high speed strikes the target, it interacts and loses energy both with the electronic system of the material and also with nuclei of the material atoms. The interactions lead to scattering of the incident ions and the emission of secondary particles, where the

Characterization techniques and simulation tools

18

emitted particles, their energy and direction reflect the characteristics of the target material. In particular, by studying backscattered particles, information about the elemental composition (stoichiometry) of the material and depth distribution in near surface layers in the material is obtained. Ion beam analysis is a broad term used for several different techniques named as Rutherford backscattering (RBS), nuclear reaction analysis (NRA), elastic recoil detection analysis (ERDA) and particle induced x-ray emission (PIXE). In the present work, RBS and NRA have been utilized extensively. The measurements were performed at the Ion Technology Center in Uppsala, Sweden using 5 MV pelletron accelerator.

a) Rutherford backscattering

Rutherford backscattering spectroscopy (RBS) is a commonly used technique for material analysis. It is performed by using light ions such as proton or helium for the analysis of a material containing heavier elements. It is a well-suited analytic tool to determine the trace elements present in the target. The main principle of RBS involves the elastic collision of light energetic ions with heavier target elements. The energy of backscattered particles provides information about the mass and depth of the elements present in the material under investigation.

A specialized form of RBS is called channeling RBS, which is used to determine the crystal damage distribution in a crystalline material. In channeling mode, the incoming ion beam is aligned with the crystal orientation to reduce the scattering events with the lattice. In this way, information regarding amount and depth distribution of lattice disorder is obtained.

In the present thesis, RBS is utilized to characterize the ion implantation damage in channeling geometry for implanted SiC samples, and in standard (random) mode to characterize the ALD deposited high-k dielectrics. Figure 3.1 shows an RBS spectrum of 4H-SiC in random direction, fitted with SIMNRA simulations. In addition, channeling spectra of as-implanted and unimplanted 4H-SiC is added. A beam of 2 MeV He ions is mostly used for RBS analysis presented in this thesis.

50 100 150 200 250 3000

200

400

600 Random spectra Simulated spectra 4x1014 cm-2 Ar+

Virgin

Yie

ld

Channel No.

Channeled spectra

Damage peak

SiSi

C

0.4 0.6 0.8 1.0 1.2 Energy (MeV)

Figure 3.1: RBS analysis of 4H-SiC in random and channeling geometry. Channeling RBS on 200 keV Ar+ implanted 4H-SiC with 4×1014 cm-2 fluence of ions is also added.

19 3.1 Structural analysis techniques

b) Nuclear reaction analysis

Nuclear reaction analysis (NRA) is a specialized technique used to enhance the yield from lighter elements in a heavier matrix. It can provide the concentration and depth information of the target element. This technique is based on specific nuclear reactions between the incoming ions and target nuclei, occurring at resonance energy. The incoming ion interacts with the target nuclei in a non-Rutherford event with enhanced cross-section. The nuclei are excited and then decay to a stable form by emitting secondary particles, which provide characteristics of the target elements. Figure 3.2 demonstrates a resonance reaction 12C(α,α)12C at 4.26 MeV [52], which is utilized in the present thesis to examine the carbon lattice damage and recovery at low temperatures in 4H-SiC (Figure 2.4).

50 100 150 200 250 3000

1000

2000

3000

4000

Non-Rutherford effectsin high energy RBS

Yie

ld

Channel No.

12C(α,α)12C resonance peak @ 4.26 MeV

Si

Figure 3.2: Resonance reaction 12C(α,α)12C at 4.26 MeV showing an enhanced yield from carbon atoms in SiC.

c) SIMNRA

SIMNRA is a software package to simulate the backscattering spectra for Rutherford and non-Rutherford cross-sections [51]. The experimental data obtained from RBS or NRA is fitted with simulated spectra by providing the experimental conditions i.e. scattering geometry, incident particle and target information. It offers a quantitative analysis of the material properties. The program has been used to analyze and simulate the RBS/NRA spectra in the present thesis. An example of such kind of analysis is already provided in Figure 3.1.

3.1.2 X-ray diffraction X-ray diffraction (XRD) is a versatile non-destructive analytical method to determine the crystallographic structure, chemical composition of materials, lattice dimension, crystal orientation in crystalline films, and grain size determination in polycrystalline samples. The basic principle of XRD is based on the interference of scattered x-rays from different planes of the material under investigation as a function of incident and


20

scattered angle, wavelength, and polarization of the incident beam. The output signal from the diffracted beam is obtained when Bragg’s condition is satisfied, which is:

θλ sin2dn =

where n is an integer, λ is wavelength of the incident beam, d is the distance between crystal planes and θ is the angle of incidence between the incident beam and crystal surface.

In the present thesis, the technique is utilized to analyze the crystallographic structure of the ALD deposited thin films. In Figure 3.3, an XRD spectrum for AlN film is presented. A dominant peak of AlN in [002] direction is observed with relatively low intensity, which depicts the polycrystallinity of AlN film. The grain size for this particular polycrystalline film is calculated to be 32 nm using Scherrer formula [53].

35.0 35.5 36.0 36.5 37.0

100

200

300

400

Inte

nsity

2θ−ω (deg)

[002] AlN

Figure 3.3: XRD spectrum for AlN deposited by ALD on SiC. AlN shows a polycrystallinity with a dominant peak at [002]. The low intensity of the peak represents a polycrystalline structure of the deposited film [Paper VII].

3.1.3 Scanning probe microscopy (SPM) Surface quality of deposited or grown films is very important in microelectronics. Scanning probe microscopy (SPM) is a unique tool that can provide multiple types of surface analysis. The technique uses a small probe tip at the end of a cantilever to get high resolution three-dimensional surface analysis. The tip is brought into close proximity of the surface of the sample while monitoring the tip deflection, which gives surface roughness, and measuring the current-voltage between tip and the sample provides information about the electrical properties of the surface. SPM operates in different modes depending on the application. Atomic force microscopy (AFM) is based on monitoring tip deflection due to the force between tip and the sample surface atoms, whereas scanning spreading resistance microscopy (SSRM) measures the resistance variation on the surface using a conductive tip. In the present thesis, tapping mode AFM is utilized for surface roughness analysis of epitaxial layers prior to the

21 3.2 Free carrier absorption (FCA)

oxide depositions, and layer surfaces after ALD depositions. The surface roughness of the SiC epitaxial layer on chemical-mechanical polished (CMP) and unpolished surfaces are also studied. Figure 3.4 shows an AFM scan on an unpolished SiC surface.

SSRM is considered for cross-sectional analysis of the implanted SiC epitaxial layers to assess the effects of implantation damage on the resistance variation in the material. An example of such analysis has been shown in Figure 2.5. The equipment used for these analyses was Nanoscope dimension 3100 equipped with an SSRM module.

3.2 Free carrier absorption (FCA) Optical free carrier absorption (FCA) has been used in this thesis as a non-destructive coaxial pump-probe technique for carrier lifetime mapping in semiconductors. The technique is based on the detection of free carrier absorption transients by a low energy probe laser beam following the excitation of electron-hole pairs, generated by a high energy pulsed laser beam. In semiconductors, the average lifetime of the excited carriers depends on the bulk recombination lifetime in the epi-layer, the diffusion coefficient for carriers and the recombination at surfaces and interfaces. In our samples, consisting of SiC substrate, SiC epitaxial layer, and a dielectric; the bulk lifetime in epi-layer and diffusion coefficient are roughly the same, therefore the average lifetime is mostly affected by the surface recombination velocity (SRV). In the present thesis, the technique is utilized to analyze the effects of average lifetime in SiC due to surface defects. A typical experimental carrier transient is shown in Figure 3.5a, which is used to measure the effective epi-layer lifetime. The bulk lifetime values in SiC have improved due to improvement in SiC growth technology and high quality epi-layers; however, the surface recombination directly influences the recombination in SiC and the effect is strongly dependent on the epi-layer thickness. The measured effective lifetime provides a way to extract SRVs from these measurements. The dependence of the effective carrier lifetime on epi-layer thickness is shown in Figure 3.5b. In our samples, the epi-layer thickness is in a range where the surface recombination on both sides of the layer, i.e., interface with dielectric (S1) and interface with substrate (S2), influence the lifetime in epi-layer. This provides an opportunity to explore the SRV at

Figure 3.4: AFM topographic image of SiC epi-layer grown on an unpolished wafer. The step bunching in the growth direction can also be seen. The RMS value for the surface is 3 nm.


22

the dielectric interface by establishing the other parameters, i.e. τn,p, Dn,p, S2. The area of interest for such kind of analysis using FCA is highlighted in Figure 3.5b.

0.0 0.2 0.4 0.6 0.8 1.0

10-2

10-1

100

1 10 100100

101

102

103

(b)

τsubstrate

Δα (c

m-1

)

Time (µs)

τepi

Epi-layersused

S2

S1=S2=S

S=2×103

S=2×104

S=1×106

S1=1×106 > S2

S2=1×104

S2=3×104

S2=1×105

τbulk

τ (n

s)

Epi-layer thickness (µm)

substrateepi

dielectricS1

(a)

Figure 3.5: (a) Experimental carrier transient with characteristic lifetime values shown for the sample with surface passivated with SiO2. Exponential lifetime in the substrate and the effective lifetime in the epi-layer are also indicated. (b) Simulated monograms for various SRV values are shown for effective carrier lifetime as a function of epi-layer thickness. The values for S1 and S2 are given in cm/s [54].

3.3 Electrical measurements for BJTs In the present thesis, a major part of the work is devoted to the radiation effects in bipolar junction transistors (BJTs). The main characteristics that are studied for BJTs are collector current versus collector-emitter voltage. It provides information about the on-state resistance and collector saturation current. Current gain (β), which is the ratio of collector current to the base current, is an important parameter for BJTs and is studied by so called Gummel measurements [55]. The measurements are performed by sweeping base-emitter voltage (0–5 V) at a fixed collector voltage of 6 V. The aim with a higher collector voltage is to put the collector-base diode in reverse bias. These types of measurements provide an insight into the individual current behavior for all three terminals. All electrical measurements for BJTs have been performed by using HP 4156 parameter analyzer and a probe station.

3.4 Electrical characterization of dielectrics Electrical characterization of dielectrics for passivation of SiC is extensively conducted in this thesis. The dielectrics are characterized mainly by using CV, IV, but also TDRC techniques. A brief description of these techniques is given in following section.

3.4.1 Capacitance–Voltage (CV) The quality and reliability of dielectrics strongly influence the electronic device output. CV measurement technique is by far most common method to characterize the electrical performance of dielectrics and their interface with semiconductors. It can provide information about the dielectric thickness, semiconductor doping

23 3.4 Electrical characterization of dielectrics

concentration, density of interface states (Dit), effective fixed oxide charge density (Qeff), and work function or barrier height. The method is based on capacitance monitoring against varying applied voltage. The measurements utilize a small AC bias signal superimposed on the DC bias. The magnitude and frequency of the AC voltage is kept constant while DC voltage is swept in the time domain. The purpose of the AC voltage is to allow sampling of charge variation in the device, whereas sweeping of the DC voltage allows the capacitor to form accumulation, depletion and inversion in the semiconductor. The oxide charges are estimated by the voltage shift of the CV curve in relation to an ideal behavior, and the slope of the curve during depletion indicates the presence of interface states.

In the present thesis, the CV method is used to characterize all dielectrics, and the Dit values are extracted from high frequency CV curve by using Terman method [56]. This method utilizes a comparison of ideal CV to the experimentally measured CV and the trap density is calculated by using following relation:

22 1qC

ddV

qC

D s

s

Goxit −−= ""

#

$%%&

'

ϕ

where Cox and Cs are oxide and semiconductor capacitances respectively, VG is applied DC bias, ϕs is the surface potential for the ideal CV and q is the charge.

All CV measurements, presented in this thesis have been performed on a probe station by using HP 4284A LCR meter in darkness and the sweep rate was set to 0.1 V/s. Figure 3.6 shows a comparison of an ideal CV curve with a SiO2 grown on SiC by using N2O oxidation and a PECVD deposited oxide with post-oxide anneal in N2O.

-4 -2 0 2 4

0.0

0.2

0.4

0.6

0.8

1.0

Negative chargein oxide

PECVD+N2O anneal N2O grown Ideal

Nor

mal

ized

cap

acita

nce

(C/C

ox)

Gate voltage (V)

Positive chargein oxide

Figure 3.6: CV curve for SiO2 grown (i) in N2O at 1250 oC and (ii) PECVD deposited and N2O post-oxide annealed at 1150 oC. Ideal CV curve calculated by Sentaurus TCAD is also presented for comparison. Shift in the CV curve towards positive voltage shows negative oxide charges, whereas positive oxide charges shift CV curve towards negative voltage.


24

3.4.2 Current–Voltage (IV) The leakage current through dielectrics and estimation of their breakdown field is highly desirable in reliability studies of dielectrics. For this purpose, current-voltage (IV) characterization allows a simple way of judging the quality of the dielectric. The shape of the typical IV characteristics provides details about the leakage phenomenon happening inside the dielectric, prior to final breakdown. The tunneling of electrons through the oxide layer, known as Fowler-Nordheim tunneling [57] and the current conduction through Frenkel-Poole emission of electron, which is associated with electron trapping at defect sites in the dielectric [58], can be characterized by utilizing this method. After applying a strong electric field across the dielectric, the breakdown value for the dielectric can be assessed, although this is a destructive measurement. Figure 3.7 shows a typical breakdown curve of SiO2 on SiC, highlighting different phenomena that can be studied using IV measurements. The breakdown field of dielectrics can be different for different devices on the same chip area. The main cause for this non-uniformity is the quality of the dielectric layer, but also the surface properties of the epitaxial layer. In addition, the contact metal [59] and its formation may also influence the breakdown characteristics of a dielectric film. To evaluate the quality and reliability of the dielectrics, statistical methods using Weibull distribution function are utilized. With this, it is possible to distinguish between the extrinsic or intrinsic breakdown in a cluster of several measured device results. In the distribution, the sharpness of the slope gives information about the oxide reliability and type of breakdown (Figure 5.11).

In the present thesis, SiO2 is grown or deposited by PECVD and the high-k dielectrics are deposited by ALD. The leakage and breakdown studies have been conducted by using HP 4156, and Weibull statistical distribution is employed to some of the dielectrics.

0 2 4 6 8 1010-10

10-8

10-6

10-4

10-2

100

102

Cur

rent

Den

sity

J (A

/cm

2 )

Electric Field (MV/cm)

Fowler-Nordheimtunneling region

Frenkel-Pooleemission of electrons

Oxide Breakdown

Figure 3.7: Typical breakdown (IV) characteristics of SiO2 on SiC.

25 3.5 Simulation tools

3.4.3 Thermal dielectric relaxation current (TDRC) The thermal dielectric relaxation current (TDRC) is a unique technique used to study the interface traps’ energy level distribution close to the majority carrier band edge. The method is based on monitoring the current produced by the majority carriers that are thermally emitted from interface traps. During the measurement of MIS structures, the capacitor is brought to accumulation region (charging bias) at room temperature to fill the traps with majority carriers [60]. The capacitor is then cooled under charging bias conditions. At minimum cooling temperature, the applied bias is shifted from accumulation to inversion, i.e. discharging bias, and the temperature is slowly raised at a constant rate. At sufficiently high temperatures, electrons are released from the filled interface traps and move to the conduction band in the presence of an electric field (discharging bias). The emitted electrons are then monitored as a current signal. The emission of electrons from the filled traps can depend on heating rate (Figure 3.8). The current versus temperature is measured while heating, which gives the small current signal due to the emission of carriers from the traps. The temperature provides the information about the energy levels. Finally, the interface traps at different energy levels are determined. In the present thesis, TDRC measurements are performed on a limited number of MIS structures. The measurements have been performed at the Center for Materials Science and Nanotechnology, Oslo University.

50 100 150 200 250 3000.0

0.5

1.0

1.5

Cur

rent

(pA

)

Temperature (K)

12 K/sec 10 K/sec 8 K/sec

Figure 3.8: TDRC spectrum for Al2O3 at 22 V of charging voltage at different heating rates.

3.5 Simulation tools

3.5.1 SRIM Stopping and range of ions in matter (SRIM) [12] is a well-known software package used to calculate the stopping and range of energetic ions into matter. It is based on Monte Carlo simulations by taking into account the binary collision approximations. SRIM mainly uses transport of ions in matter (TRIM) code to calculate the stopping powers for different ions in a target material [12]. The target material can be chosen


26

from a single layer to a combination of several target layers. The main information that one can get from these simulations is as under:

1) Ion range and straggling in materials. 2) Three-dimensional distributions of implanted ions in the target. 3) Lattice damage distribution in the form of vacancies produced by ions and

recoils. 4) Ionization produced due to traversing ions through the material.

In the present thesis, SRIM is widely utilized to estimate the depth of implanted ions in SiC and dielectrics, and ionization and vacancies produced by these ions. The output of the program for vacancies produced by the ions and recoils is in units of vacancies/Å-ion, which is converted to vacancies/cm3 by multiplying with ion fluence (ion/cm2), used in experiments. An example of such analysis is provided in Figure 3.9 for 3 MeV helium ions in SiC for three different doses

0 2 4 6 8 10

0.4

0.8

1.2

1.6

Vac

anci

es(x

1017

)/cm

3

Depth (µm)

1x1011 cm-2

3x1010 cm-2

1x1010 cm-2

Beam direction

Figure 3.9: Vacancies calculated by using SRIM for different fluences of 3 MeV He+ in SiC.

3.5.2 TCAD simulation tool Several physical device simulation tools have been designed to understand the device operation. Synopsis Sentaurus technology computer aided design (TCAD) is one of the commercially available tools used for process and device simulations of semiconductor devices [13]. It utilizes physical models based on basic semiconductor theory and simulates the electrical behavior of semiconductor devices. In this thesis, TCAD is used to calculate the ideal CV curve, to extract dielectric parameters from CV curves, and full BJT device simulations to understand the influence of bulk traps at different positions in the device. In general, BJT simulations are performed by using a device with geometry and doping of the actual BJT used in experiments, and considering room temperature conditions. Steady state simulations are executed by including Shockley-Read-Hall (SRH) [61, 62] and Auger recombination models for the bulk and interface. Doping and field dependent mobility, incomplete ionization and bandgap narrowing models were also incorporated in the simulations [63]. Fermi-Dirac statistics are considered for the carrier concentrations. All simulations for BJTs are based on a

27 3.5 Simulation tools

model presented in Ref. [64]. Figure 3.10 presents an example of simulated electrostatic potential distribution within the device at 5 V as a bias voltage between the base and emitter contact, and collector voltage at 6 V.

Figure 3.10: Simulated electrostatic potential distribution in BJT. The data presented here is in log scale.


28

Chapter 4 4H-SiC BJTs subjected to ionizing radiation Bipolar junction transistors (BJTs) have a potential for operating at high current densities with low power losses and high voltage capability. However, in many power electronic applications, BJTs have been replaced by insulated gate bipolar junction transistors (IGBTs) and power metal oxide semiconductor field effect transistors (MOSFETs), due to relatively low current gain at typical operating current levels. With the introduction of SiC as a wide bandgap semiconductor and suitable for harsh environments, SiC-based BJTs are considered for high power applications due to fast switching capabilities and low on-state resistance.

In this chapter, the degradation of BJTs due to the formation of crystal defects as a result of interactions with energetic particles is investigated. The crystal defects result in deep states in the SiC forbidden energy gap where carriers recombine, thereby affecting the electrical properties of the device. The impact of ionizing radiation on the SiC BJT performance is studied by implanting ions of various energies and doses on fully functional devices. Due to the different stopping mechanisms for ions in matter (described in Chapter 2) it has been possible to introduce a certain amount of defects at a specific location in the device. By analyzing the degradation of the electrical performance of the devices exposed to protons, helium and carbon ions, with selected energies and doses, it is possible to identify different mechanisms involved in the degradation.

4.1 Device structure The devices used in the present work are epitaxially grown npn BJTs designed for 2700 V breakdown voltage and an active area of 0.04 mm2 [65]. Figure 4.1 shows a cross-sectional view of the BJT. The devices are composed of N+ emitter with thickness of 1.33 µm and doped with nitrogen at 1×1019 cm-3 level. An additional 200 nm layer with higher doping level (Nd = 4×1019 cm-3) is used for low resistive emitter

4H-SiC BJTs subjected to ionizing radiation

30

contact. The aluminum doped epitaxial base layer is 730 nm thick with Na = 3×1017 cm-3. The collector epitaxial layer with N- doping (Nd = 3×1015 cm-3) is grown on a highly doped (Nd = 1×1018 cm-3) substrate. A SiO2 passivation layer was used to cover the area between the emitter and base contact. The same passivation was used for the edges beyond the emitter and base contacts to avoid early breakdown of the device. The SiO2 passivation is processed by growing ~50 nm high quality SiO2 in N2O environment, and then 2 µm SiO2 is deposited by PECVD to protect the thin oxide layer. The devices were fabricated in house with a highest current gain value of 50.

Figure 4.1: Schematic cross-sectional view of 4H-SiC bipolar junction transistor.

4.2 Device simulations A theoretical analysis using Sentaurus TCAD is conducted to understand the effects of ionizing particle radiation on SiC-based BJTs. As explained in detail in Chapter 2 of this thesis, the ionizing particles lose energy due to electronic stopping, that induce ionization and excitation in the electronic system, and nuclear stopping, which leads to non-uniform generation of crystal defects. The devices are modeled both with respect to the ionization effects in the passivating oxide by considering surface concentrations of positive charges, and nuclear scattering damage by introducing bulk traps in different regions of the device.

4.2.1 Ionization studies Dielectric passivation in BJT is a critical area that directly affects the device performance. Ionizing radiation affect the passivating oxide by producing positive charge [66], which leads to the degradation of current gain. SRIM simulations show that the electronic stopping process in the energy range where ions stop at, or around the SiO2/SiC interface, produce ionization in the oxide that results in increased positive charge concentration inside the dielectric and leads to the degradation of the device. The stopping processes and ionization effects in SiO2/SiC layers are shown in Figure 4.2. The effect of positive charge on device performance is studied with the help of device simulations to understand the degradation of current gain (β=Ic/Ib), i.e. increase of base current. The effects of trapped oxide charge are modeled by varying the positive surface charge density from 5×1011 to 1×1012 cm-2 at the SiO2/SiC interface.

31 4.2 Device simulations

600 400 200 0

10-1

100

101

dE/d

x (e

V/Å

)

Ion Energy (keV)

Electronic Stopping Nuclear Stopping

0.0 0.5 1.0 1.5 2.0

100

102

104

Beam direction

Depth (µm)

Num

ber o

f Hel

ium

ions

SiO2 SiC

Ionization

Figure 4.2: Electronic and nuclear stopping calculated by TRIM, and numerically simulated ionization produced in the material (left y-axis). The statistical distribution of ions is also simulated by SRIM (right y-axis) [Paper V].

Device simulations reveal that the positive charge in the oxide can strongly influence the device performance. The simulation results show that a low concentration of charges, such as 5×1011 cm-2, slightly increase the current gain, but a further increase in the amount of surface charge starts reducing the maximum current gain of the device. The results are presented in Figure 4.3a. Further investigation into the device characteristics by simulating Gummel plots uncovers the fact that the drop in the current gain is due to a large increase in the base current while the collector current is less influenced. The increase in the base current can be understood by analyzing surface recombination. Lower surface recombination, due to lower hole concentration caused by the positive fixed charge, increases the current gain for a concentration up to 5×1011 cm-2. But, when the charge concentration is increased to 1×1012 cm-2, although the surface recombination decreases, the electron concentration becomes larger than the ionized acceptor concentration, and this creates an inversion layer between the

2.6 2.8 3.0 3.2

10-9

10-8

10-7

10-6

10-5

10-4

10-3

2.6 2.8 3.0 3.20

10

20

30

40

IB

Cur

rent

(A/µ

m)

Vbe

(V)

No charge 5x1011 cm-2

7x1011 cm-2

1x1012 cm-2

IC

Gai

n (β

)

Vbe

(V)

No charge 5x1011 cm-2

7x1011 cm-2

1x1012 cm-2

(a) (b)

Figure 4.3: (a) Current gain versus base-emitter voltage with no charge and with three different concentrations. (b) Simulated base and collector currents after introducing surface charge at the SiO2/SiC interface [Paper V].


32

emitter region and the base contact [67]. Therefore, the base current largely increases (Figure 4.3b), leading to gain degradation due to positive charges in the passivating oxide.

4.2.2 Bulk traps In addition to ionization in the oxide, ionizing particles produces material defects mainly around their end of range due to the dominance of nuclear scattering processes. These defects lead to deep states in the forbidden energy gap where carriers recombine. It has also been shown that nitrogen donors in SiC are deactivated [68], as a result of energetic ions’ induced defects. Both of these effects lead to a reduction of charge carrier densities. Higher concentration of defects may also lead to reduced carrier mobility. As a result, a highly resistive layer in the material is produced, which has also been confirmed by SSRM analysis in Figure 2.5.

The material defects can also be introduced during device fabrication (described in Section 2.1). These defects also have a negative influence on the device performance. In the device simulator, material defects can be modeled by introducing traps in the device to obtain an insight into the device behavior in the presence of defects/traps. Additionally, bipolar degradation could be understood from this type of study, which is mainly caused by stacking faults already present in the material. Stacking faults can also be induced due to ion irradiation and lead to the degradation of the device. A theoretical investigation is conducted to quantify the effect of traps located at different positions in a SiC BJT. The study is specified by introducing a 500 nm thick layer of traps (Lt) at different positions in:

1) emitter at different distances from base-emitter junction. 2) collector at different distances from base-collector junction. 3) base.

The study is conducted for different values of capture cross-sections for electrons and holes (σn,p = 1×10-14, 1×10-15 and 1×10-16 cm2), and traps concentrations in Lt, ranging from 1×1015 to 9×1015 cm-3. The capture cross-section values are taken from previous experimental studies [34, 69, 70]. The results from simulations for different regions of BJT are summarized in the following sections.

a) Emitter

Degradation due to traps in the emitter is dependent on their position in the emitter region. A maximum reduction in current gain occurs when the traps are introduced near the emitter-base interface. In the present study, Lt was positioned at 5, 20, 100 and 500 nm distance from the base interface in the emitter. A maximum current gain drop, i.e. 20%, appears when the traps are in 5 nm proximity to the interface. The effect reduces when the position of traps is moved away from the emitter-base interface, i.e. towards the emitter contact. Figure 4.4a shows IV characteristics of the emitter with trap layers (Lt) at different locations in the emitter for acceptor type trap concentration of 5×1015 cm-3 with capture cross-section of 1×10-15 cm2. The IV characteristics show that the traps in the emitter region do not strongly affect the on-state resistance. Simulations are performed for acceptor and donor type traps, but the degradation in device performance


appears only due to acceptor type traps. The concentration of traps has also been observed as an important parameter that controls the device output. Moreover, the impact of electron and hole capture cross-sections on the collector saturation is very evident, and the gain drops more for larger cross-section values, shown in Figure 4.4b. The excess carriers (electrons) flowing through the emitter at a certain bias voltage are trapped in Lt, giving rise to recombination rate in the trapped region (Figure 4.8e) and increasing the local concentration of electrons. As long as the trapped electrons are close to the base, the increased recombination rate in Lt gives rise to the base current, which leads to the degradation of current gain. In a similar way, when the concentration of traps is increased, i.e. more trapped electrons, a drop in the current gain occurs due to an increased rate of recombination in Lt. An important factor for the low degradation in gain is the emitter doping level which is of the order of ~1019 cm-3. Therefore, it can be deduced that the emitter region is less sensitive for the degradation of the BJT due to the presence of traps.

0 1 2 30.00

0.02

0.04

0.06

0.08

I c (A/µ

m)

Vce

(V)

Reference 500 nm 100 nm 20 nm 5 nm

(a) (b)

2 3 4 5

10

20

30

40

50

60G

ain

(β)

Vbe

(V)

Reference 1x10-16 cm2

1x10-15 cm2

1x10-14 cm2

Figure 4.4: (a) IV characteristics for different distances of Lt in emitter. 4 mA of base current used in these simulations. (b) Gain versus base-emitter voltage for 5×1015 cm-3 concentration of traps for different cross-section values for Lt at 5 nm in emitter [Paper II].

b) Collector

The collector layer in a BJT plays an important role for the current-voltage properties of the device, for instance, for determining the on-state resistance. Therefore, carrier traps in this layer can influence the overall characteristics of the device. The traps at different location in the collector have different influence, specifically the effect of traps near the base-collector junction is important to understand. For this purpose, Lt with different concentrations is studied at 5, 10, 20, 100, 500 nm and 1, 2 and 5 µm distance from the base-collector interface in the collector. The study reveals that the traps near the base-collector interface do not strongly affect the device characteristics by trapping electrons. However, as Lt is moved away from the interface, a region with increased resistance appears before saturation of the collector current at a certain base current appears, and the effect becomes more prominent at the depth of 2 µm (Figure 4.5a). Figure 4.5b shows the effect of concentration of traps at 1 µm distance from collector-base junction. The main reason for this behavior is the barrier in the flow of electrons due to trapped electrons in accepter type traps in Lt, which increases the local


34

recombination rate (Figure 4.8e). Again the effect of donor traps is negligible, since the excess carrier are only electrons. The gain of the BJT is not affected in this case by the location of traps, however, the trap concentration have a considerable effect on the forward voltage drop.

0 1 2 3 4 5 60.00

0.02

0.04

0.06

0.08

0 1 2 30.00

0.02

0.04

0.06

0.08

Reference 1x1015 cm-3

3x1015 cm-3

5x1015 cm-3

7x1015 cm-3

9x1015 cm-3

I c (A/µ

m)

Vce

(V)

Increase inresistance

(b)(a)

I c (A/µ

m)

Vce

(V)

Reference 20 nm 100 nm 500 nm 1 µm 2 µm 5 µm

Figure 4.5: (a) Traps at different depths in collector. (b) Effect of increasing concentration of traps at 1 µm deep in collector with σn,p=1×10-15 cm2 (capture cross-section for electrons and holes has been considered to be same in all simulations). The base current used in these simulations is 4 mA [Paper II]. For comparison with experimental results (discussed in Section 4.3.2) of implantation in the collector, two separate simulations are performed:

1) Introducing a 2 µm thick lowly doped n-type region (5×1013 cm-3) in the collector around the projected range, as estimated by SRIM [12]. This simulates the deactivation mechanism of nitrogen donors [68].

2) Introducing various trap concentrations in the same region with different electron capture cross-sections. This simulates the compensation mechanism.

0 1 2 30

5

10

15

20

25

I c (µA

)

Vce

(V)

σn,p

= 5x10-15 cm2

Nt = 4x1015 cm-3

Reference

Reduced doping in collector(5x1013 cm-3)

Figure 4.6: Comparison of simulation 1 and 2. Simulation 2 shows results for the capture cross-section of 5×10-15 cm2 and traps concentration of 4×1015 cm-3. The base current used in all simulations is 1 µA [Paper II].


The results from simulations, presented in Figure 4.6 indicate that the trap concentration of 4×1015 cm-3 with electron and hole capture cross-section of 5×10-15 cm2 [34] follow the same trend as it can be obtained by introducing a lowly doped (5×1013 cm-3) layer in the collector. This comparison suggests that the carrier concentration in the highly damaged region in the collector is reduced after introducing traps, although it is not possible to say if the lower carrier concentration is due to the deactivation of nitrogen dopants, or a high concentration of traps resulting in increased trapped electrons in Lt and producing compensation of carriers. It has been seen in the simulations that the region, where traps are introduced (or the doping is reduced), the flow of current through the collector is reduced and limits it to a certain level. As a result, a higher resistance is observed in the transistor characteristics.

c) Base

A lightly doped thin base layer is a very sensitive region of the BJT and it has direct influence on the gain of the device. In addition to the surface affects, which have been studied previously [71], the bulk defects also have a strong influence on the overall properties of the device. When there are some intrinsic defects such as material defects, introduced during growth, or extrinsic defects produced in the base during device processing or as a result of radiation exposure, the current gain of the device is negatively affected. In the present work, the effects of both acceptor and donor type traps with the same parameters as used for the emitter and collector study, are studied by introducing traps in the whole base region. Unlike the emitter and collector, donor and acceptor type traps show approximately the same degradation effect for the gain of the device. The concentration of traps (shown in Figure 4.7) and capture cross-section of the traps in base region strongly affect the output. The influence of the capture cross-section for the carriers is even stronger in the base compared to the emitter and collector, and a strong degradation appears for smaller cross-sections. The results show that the highest concentration of the traps (9×1015 cm-3) reduces the gain down to about 67%. In general, when the base is filled with traps, the trapped carriers increase the recombination rate in the base (Figure 4.8e). As a result, the flow of current is reduced, which results in the degradation of the current gain.

10-6 10-5 10-4 10-3 10-2 10-1 1000

10

20

30

40

50

60

Gai

n (β

)

Ic (A)

Reference 1x1015 cm-3

3x1015 cm-3

5x1015 cm-3

7x1015 cm-3

9x1015 cm-3

Figure 4.7: Gain reduction due to increasing traps concentration in base. The value for capture cross-section (σn,p) for the present simulation is chosen to be 1×10-15 cm2 [Paper II].


36

Recombination due to traps at different locations a) b)

Lt at 5 nm in emitter Traps in base

c) d)

Lt at 10 nm in collector Lt at 2 µm in collector

(e)

Figure 4.8: (a)-(d) Total recombination in BJTs by introducing Lt in different regions of the device. The recombination rate, shown in (e), has been extracted by taking vertical cut for simulated structures, at a position mentioned in the inset of (e) for a reference device. The concentration of traps was fixed at 5×1015 cm-3 and the capture cross-section at 1×10-15 cm2 [Paper II].

37 4.3 Ion irradiation of BJTs – Experimental results

4.3 Ion irradiation of BJTs – Experimental results The bipolar junction transistor (BJT), as shown in Figure 4.1 (schematics), comprises of at least three epitaxial layers, where the top n-epi is etched down to the p-base, leaving emitter mesas. There are also various metallization and passivation layers involved in the BJT fabrication. These different layers will have different stopping powers for the ionizing particles, which limit the precision in controlled ion beam experiments. However, the effect of radiation on passivation layer can be understood with the help of such experiments, since dielectrics are the top most layers in BJTs and the energy of the implantation ions can be tuned with the help of SRIM simulations [12], to produce damage in the passivation or at the interface. However, since the collector is relatively thick (20 µm), the effects of ionizing radiation damage can also be studied in this region of the device, although with some loss in precision due to the different thickness of top layers.

In these experiments, different chips processed on a same wafer are used for different doses, and each chip contained different geometry of devices. However, the measurements are performed on the same type of devices on the chip to acquire better statistics and to see the real impact of ionizing radiation on BJTs. The results from these experiments are summarized in the following sections.

4.3.1 Implantation in dielectric passivation layer Ionizing radiation effects in SiO2 passivation layers of BJT are studied by implanting 600 keV helium ions in fully fabricated devices on different chips. A wide range of ion fluences, 1×1012 to 1×1016 cm-2, is used to see the dose effect. The energy of the ions is chosen after an analysis by SRIM [12]. In these experiments, helium ions (α-particle) are chosen for being inert gas ions and having no contribution to electrical properties of the device. To understand the depth of the ions in the device, SRIM simulations are performed by considering the thickness of the oxide layer, covering the area between emitter and base contacts and beyond.

2.50 2.75 3.00 3.25 3.50

0.2

0.4

0.6

0.8

1.0

1.2

β/β m

ax

Vbe

(V)

Unimplanted 1x1015 cm-2

5x1015 cm-2

1x1016 cm-2

Figure 4.9: Normalized current gain (at 3 V) versus base-emitter voltage for different implantation fluences in comparison to the unimplanted device gain [Paper V].


38

2.0 2.5 3.0 3.5

10-6

10-5

10-4

10-3

10-2

10-1

5x1015 cm-2

Before radiation After radiation

BaseC

urre

nt (A

)

Vce

(V)

Collector

2.50 2.55 2.60


1x1013 cm-2

1x1015 cm-2

5x1015 cm-2

1x1016 cm-2

Figure 4.10: Base and collector current before and after implantation of 5×1015 cm-2 ion fluence. Inset shows an increase in base current after implantation at different fluences [Paper V].

The helium ions with this energy stop near, or at the interface, as shown in Figure 4.2, producing ionization in the oxide and nuclear damage at the interface, which results in the degradation of the current gain of the device depending on the fluence of ions (shown in Figure 4.9). As it has been observed in simulation studies for positive charge at the interface, the rise in the base current is the primary cause for degradation of the gain. An increase in collector current also occurs, however, it is two orders of magnitude less than the increase in base current. Furthermore, the increase in the base current is also fluence dependent. The results are shown in Figure 4.10. An analysis based on the collector current versus collector-emitter voltage reveals that the collector saturation current also reduces as a result of positive charges in the oxide.

The annealing of these devices in vacuum for 30 mins at the temperatures of 300, 420 and 500 oC do not show any recovery. Instead, it affects device properties negatively. The collector saturation current also drops as the annealing temperature is raised, as shown in Figure 4.11.

0 1012 1013 1014 1015 1016

0.7

0.8

0.9

1.0

As-implanted 300oC anneal 420oC anneal 500oC anneal

Nor

mal

ized

col

lect

or s

atur

atio

n cu

rren

t

He+ fluence (cm-2) Figure 4.11: Collector saturation current at 5 V for different ion fluences in comparison to different annealing temperatures. Base current used here is 2 mA [Paper V].


In addition to that, the Gummel measurements show that the base current is also significantly affected as a result of the temperature treatment. The base current at low voltage is increased as a function of temperature. The phenomenon is also fluence dependent (Figure 4.12). The observation made here, in the case of ion implantation at the interface, that the annealing in a low temperature range further degrades the device instead of healing it, which is contrary to the observation of M. Nawaz et.al. [72], where gamma rays were used as a source of ionization in the oxide. This fact refers to the key difference in the radiation environments. Gamma rays produce ionization only in the oxide and at the interface, which can be cured even with mild treatment of 420 oC. On the other hand, the ions produce ionization in the oxide and the atomic displacements leading to bond breaking at, or near the interface. The annealing of the displacement damage at the interface further contributes as a source of positive charge and leads to more reduction in gain, indicating the involvement of other types of traps that are formed around the interface. Therefore, it is not possible to recover the device properties with similar treatments. Additionally, the on-state resistance does not show any significant fluence, or temperature dependence.

1.0 1.5 2.0 2.5 3.0 3.5

10-9

10-7

10-5

10-3

Vbe

(V)

I b (A)

(a) (b)

1.0 1.5 2.0 2.5 3.0 3.5

10-9

10-7

10-5

10-3

Vbe

(V)

I b (A)

Unimplanted As-implanted 300 oC anneal 420 oC anneal 500 oC anneal

1x1014 cm-2


5x1015 cm-2

Figure 4.12: Base current versus base-emitter voltage for 1×1014 and 5×1015 cm-2 fluence of ions at 300, 420 and 500 oC annealing in comparison to unimplanted and as-implanted devices. A clear increase in base current in low voltage region (< 2.5 V) is observed and it is dependent on the ion fluence [Paper V].

Low energy implantation (330 keV) of helium ions results in an accumulation of defects in the oxide layer, i.e. away from the SiO2/SiC interface. These kinds of defects temporarily distort the device characteristics, which are recoverable in few hours at room temperature. The temporary effect is probably due to the self-heating produced in the oxide because of implantation, which dissipates after certain time. Therefore, it can be concluded that the defects produced in the oxide passivation do not lead to a permanent damage of the device, as occurs for ion induced interface defects in the BJT.


40

4.3.2 Ion induced damage in the collector In a BJT, the collector, or a drift layer, plays an important role in determining on-state resistance of the device as shown by simulation studies in Section 4.2. The scattering damage produced in this layer can directly influence the device output characteristics by trapping the majority carriers or by deactivating the dopants in damaged region. In the present work, an investigation is carried out by implanting high energy ions in the collector region of BJTs with different fluences. The objective of the study is to test the device tolerance and to understand the mechanisms involved in the degradation. For this purpose, high energy helium ions (3 MeV) are implanted in BJTs so that they stop in the collector, producing maximum damage in this region. With this energy, implanted ions are expected to stop around 5 µm below the base-collector interface with a spread of ~2 µm in depth. The devices are exposed to 1×1010, 3×1010 and 1×1011 cm-2 fluences of ions. The physical analysis of vacancies performed for the ion fluences in SiC, by using SRIM, suggests that these numbers of ions produce a peak concentration of 1.8×1016, 5.3×1016 and 1.8×1017 vacancies/cm3 at the ion end of range respectively (shown in Figure 3.9). Clearly, the amount of vacancies is at least one order higher than the doping level in collector (3×1015 cm-3). The electrically active defects (5–10% of the total defects produced [5]), due to these vacancies, provide deep levels in the bandgap that compensate the doping at high enough concentrations and reduce the free carrier concentration. In nitrogen doped layers, it has been shown that implantation induced defects can deactivate the nitrogen dopants, most likely by forming secondary defects involving nitrogen, but having no shallow donor states [68]. The net result of both the compensation and deactivation mechanisms described above is a reduction of free electrons in the damaged region and they have similar effect on device characteristics as it has been studied and shown in Figure 4.6.

The damage in the collector causes degradation in the output characteristics of BJTs. The drop in collector saturation current due to these fluences is strongly non-linear. In addition to that, an extra resistance slope in the collector current appears, which refers to an increased resistance of the collector. The Gummel plots acquired for these devices further explain the behavior of current through the base and collector. Generally, the gain degradation of such devices is caused by bulk material degradation as well as by ionization in the passivation oxide layer, produced due to traversing of ions through these regions of the device. The oxide layer or interface defects mainly affect the base current, as it has been explained in the previous section. In these experiments, the base current is fluence dependent and is increased by increasing the ion fluence. Figure 4.13a shows that the base current increases both in low voltage (recombination at the oxide interface) and in high voltage range (probably due to defects in base). This fact indicates that the interface of the base-emitter diode and passivation layer is affected along with lesser number of defects produced in the bulk regions of the base and the emitter. An investigation of the collector current reveals that the collector current as a function of base-emitter voltage (Vbe) is limited to a certain saturation level depending on the ion fluence (Figure 4.13b). Finally, the gain is reduced due to a decreased collector current and an increased base current.


1.5 2.0 2.5 3.0 3.510-12

10-10

10-8

10-6

10-4

10-2

100

1.5 2.0 2.5 3.0 3.510-12

10-10

10-8

10-6

10-4

10-2

100


3x1010 cm-2

1x1011 cm-2

I b(A)

Vbe

(V)

(a) (b)


3x1010 cm-2

1x1011 cm-2

I c(A)

Vbe

(V)

Figure 4.13: Fluence dependence of (a) base current and (b) collector current, versus base-emitter voltage at a 6 V collector-emitter voltage [Paper III].

Temperature treatment of these devices at 400, 430 and 500 oC results in some

recovery of the device characteristics but a full recovery could not be achieved. The annealing temperature for these devices is limited to 500 oC due to the metallization involved in the device. Higher annealing temperatures may alter the properties of the ohmic contacts of the device. The improvement in device properties is attributed to the reduction in an extra slope in IV characteristics due to the damage recovery of Si and C lattice at low temperatures, as it has been discussed in Section 2.5. While looking at the base current after annealing, the same behavior is observed as for ionization damage annealing (Figure 4.12). The base current in the low voltage bias region (Vbe = 1.5–2.5 V) is increased after annealing and it is dependent on annealing temperature as shown in Figure 4.14a. The increased base current in low voltage region is recognized as increased recombination at the interface. On the other hand, for the highest fluence implanted device, the collector current shows a slight recovery (Figure 4.14b), however, it still limits the current saturation level.

1.5 2.0 2.5 3.0 3.510-12

10-10

10-8

10-6

10-4

10-2

100

1.5 2.0 2.5 3.0 3.510-12

10-10

10-8

10-6

10-4

10-2

100

I b (A

)

Vbe

(V)


I c (A

)

Vbe

(V)


(a) (b)

Figure 4.14: Annealing behavior of 1×1011 cm-2 fluence implanted BJTs (a) base current and (b) collector current, versus base-emitter voltage at a 6 V collector-emitter voltage.


42

0 1010 1011

0.0

0.2

0.4

0.6

0.8

1.0 As-implanted 500oC Annealed Vacancies

Implantation Dose (cm-2)

Nor

mal

ized

Gai

n

0.3

0.6

0.9

1.2

1.5

1.8

1x1011

3x1010

1x1010

Vac

anci

es(x

1017

)/cm

3

Unimplanted

Figure 4.15: Vacancies produced in comparison to gain degradation and improvement after annealing at 500 oC versus implantation doses [Paper III].

A comparison of the ion-induced vacancies, estimated by SRIM [12], and the gain

degradation for the as-implanted devices with annealed devices’ gain is shown in Figure 4.15, which establishes that the degradation in gain is nonlinear and it is not possible to recover the device current gain to original values at these low temperatures, although, a small improvement is observed. One possibility is that the vacancies of the order of doping level increase the complexity of the defects and produce stable defects, which are not possible to recover at these temperatures.

In addition to above experiments, another study is conducted by using commercially available 4H-SiC BJTs manufactured by TranSiC, Sweden [10]. A complete description of the device has been provided in Ref. [73]. In these experiments, the un-encapsulated devices are exposed to 2.3 MeV protons, with and without an absorbing Al foil, and 5, 10, or 15 MeV 12C ions. According to SRIM simulations [12], protons without Al foil would stop in the substrate leaving mostly ionization damage in the whole device. With absorbing foil, the range of ions reduces to 10 µm in SiC and they end up in collector region of the device. The 5 MeV 12C ions would stop in the metallization or passivation layers, while the 10 and 15 MeV 12C ions would penetrate 2–3 and 6–7 µm, respectively, and end up in the upper part of the collector. The fluence range chosen for these experiments is relatively low in comparison to the previously discussed experiments. The fluences for protons are varied between 1×109 and 5×1012 cm-2, while the carbon fluences range from 5×106 to 5×108 cm-2.

The results from these experiments suggest that the output characteristics (Ic versus Vce) are very sensitive to implantation induced damage in the device, and even at these extremely low fluences, there is a clear reduction in gain after the implantation compared to the unimplanted devices and the reduction is fluence dependent. The highest fluence of 10 MeV 12C (1×108 cm-2) reduces ~25% of the collector saturation current. Other characteristics of transistors such as leakage, breakdown and open-collector characteristics are not affected by these implantations. The damage produced deep in the devices (away from base-collector interface), due to high energy ions, i.e.


15 MeV 12C and proton implantation show similar results, however, higher fluences are required for these beams to reach a similar gain reduction level. The devices implanted with 5 MeV 12C do not show any significant reduction in device properties. Some results from these experiments are summarized in Figure 4.16a. The proton implantations with Al foil show strong degradation for fluences higher than 1010 cm-2 since the damage stays in the collector; nevertheless, implantations without Al foil (damage in substrate) require higher fluences to degrade the devices. The results obtained from this study, for low fluences, are attributed to increased number of defects in the base region and increased density of surface states at the interface between the passivation layer and the base. On the other hand, higher fluences create compensating defect concentrations in the collector.

An annealing of some implanted devices show full recovery already at 420 oC. Figure 4.16b shows an annealing behavior of 10 MeV 12C implanted BJTs with 1×108 cm-2 (1.1×1015 vacancies/cm3), which can be due to the reduction of defects at low temperature annealing, and the remaining defects have less contribution to the electrical properties of the device.

0 1 2 3 4

1

2

3

4

5

6

1x108 cm-2

5x107 cm-2

Before After

I c (A)

Vce

(V)

1x107 cm-2

(a) (b)0 1 2 3 4

0.5

1.0

1.5

2.0

2.5

I c (A)

Vce

(V)


1x108 cm-2

Figure 4.16: (a) IV characteristics of 10 MeV carbon implanted BJTs with different fluences. The curves shown here correspond to different base currents (b) Annealing behavior of 10 MeV 12C implanted BJTs with an ion fluence of 1×108 cm-2. The devices were annealed for 30 min at 300, 400, and 420 oC. The statistical variations on a chip are about 5% and around 10% between different chips [Paper IV].

In summary, the scattering damage introduced due to high energy ionizing radiation

in bulk SiC in BJT reduces the performance of the device. The degradation of device characteristics is ascribed to the electrically active defects in SiC. The low concentration of defects can be healed at low temperatures, however, higher concentrations (of the order of doping level or more) create high concentration of defects/traps that compensate the doping or deactivate the dopants and results in more thermally stable damage in the device. The degradation produced due to the ionizing radiation in the passivation may possibly be reduced by replacing the passivation with high-k dielectrics, such as Al2O3, since the interface of such dielectrics is far better than SiO2 due to reduced interface states [74]. A detailed investigation of the dielectric layers for 4H-SiC in the perspective of passivation and their radiation hardness is presented in Chapter 5.


44

Chapter 5 Dielectrics for 4H-SiC – Passivation and radiation hardness Dielectrics are an essential part of electronic devices, both as passivation and insulation materials for most of the devices, or as gate dielectrics in MISFETs. Passivation is one of the most critical issues for the reliability of semiconductor devices and it becomes even more important in high power, high temperature and radiation rich environment applications. The choice of dielectric for SiC strongly influences the performance of devices [75, 76]. In current SiC technology, SiO2 is an attractive candidate for passivation and gate dielectric, but SiO2 has ~2.5 times lower dielectric constant than SiC itself, and therefore it may limit the performance of SiC devices. In order to utilize the full potential of SiC devices, a suitable dielectric material to passivate surfaces and edges in the device structures is required. The basic properties that are required for a dielectric to be an alternative choice are:

1) low interface state density. 2) high dielectric breakdown strength. 3) large conduction and valance band offsets compared to the semiconductor. 4) high thermal stability.

In addition to that, the dielectric material should have a high dielectric constant and be easy to deposit, for the passivation of SiC devices [75]. Several different materials have been studied for SiC passivation [58, 77-79], however, aluminum-based materials have shown promising results regarding interface quality [74] and thermal stability. Aluminum-based dielectrics have also been demonstrated for the passivation of Schottky [76] and PiN diodes [11].

In this chapter, Al2O3, AlN and Ta2O5 are studied as possible alternate dielectrics for SiC. The dielectrics are studied as single layers but also in stacked arrangement. The radiation hardness of Al2O3 in comparison to SiO2 is also demonstrated under the influence of ionizing radiation. A comparison of bandgap and band offsets for different materials used in the present thesis is given in Table 5.1.

Dielectrics for 4H-SiC – Passivation and radiation hardness

46

Table 5.1: Properties of the high-k dielectric materials, studied for the passivation, in comparison to Si and 4H-SiC [27,75,80-84].

Material εr Bandgap

(eV) ΔEc Breakdown

Field (MeV/cm) Si 11.7 1.12 - 0.3

4H-SiC 9.66 3.23 - 3

SiO2 3.9 9.0 2.7 10 Al2O3 8 8.8 1.7 >5

AlN 9.14 6.03 1.7 1.2-1.8

Ta2O5 25 4.4 -0.4 2-4.5

5.1 Processing of MIS structures In this thesis, the dielectrics are studied by fabricating metal insulator semiconductor (MIS) structures. The basic device structure is shown in Figure 5.1. The 4H-SiC substrates used in all investigations are highly doped n-type wafers purchased from SiCrystal AG. Epitaxial layers on these wafers were grown at ACREO AB with thickness and doping level as mentioned below:

1) 15 µm, 3-5×1015 cm-3 n-type on chemical-mechanical polished (CMP) epi-ready surface

2) 8-10 µm, 5×1015 cm-3 n-type on Si-face polished (no CMP) 3) 5-7 µm, 1×1017 cm-3 p-type on Si-face polished (no CMP)

In addition to 4H-SiC, an n-type Si wafer is used with highly conductive substrate (0.025-0.05 Ω-cm) and an n-type epi-layer of 8-10 µm of thickness doped with phosphorus. The carrier concentration in the Si epi-layer was about ~1014 cm-3.

Figure 5.1: Schematic of MIS structure.

For the dielectric studies, the wafers were cut into small 1 cm2 pieces. In the case of SiC, the back side contact for SiC is provided by nickel silicide formed by sputter deposition of Ni (200-300 nm) followed by RTA at 950 oC for 60 secs in Ar environment, whereas for Si samples, Al with a thin intermediate layer of Ti/W deposition is used as a backside contact.

47 5.1 Processing of MIS structures

The top contact on the dielectrics was initially formed by evaporating a 100 nm layer of Ni using a lift-off process for patterning. A positive mask was used in this process. However, the outline of the contacts was found to be irregular in microscopic analysis and some of the contacts were removed during the lift-off process. Therefore, in later experiments, a negative mask was designed and the top contact material was replaced with Al. Finally, a wet-etch for aluminum was used to pattern the contacts from the evaporated Al layer. Figure 5.2 shows a difference in the top contacts between the two processes. The masks prepared for the lithography process contained several sizes of circular openings for contact pattering. The sizes of the openings were 50, 100, 150, 200, 250, 300, 350, 400 and 500 µm.

Figure 5.2: (left) Lift-off process for Ni as top contact. (right) Improved process by using Al as top contact and wet-etch, blank part of the sample is spared for optical measurements (FCA).

5.1.1 Dielectric formation

a) SiO2

Two different processes were used to form SiO2 on SiC. At first, a 50 nm thick SiO2 was prepared by oxidizing SiC at 1250 °C in N2O for 8 hours. Secondly, a better process with low Dit values was adapted by using PECVD deposition of SiO2 at 300 oC followed by a post-oxide anneal in N2O for 60 mins at 1150 oC [85]. In some experiments, prior to high-k dielectric deposition, a thin layer of SiO2 (8 nm) on SiC was grown by oxidizing SiC in dry O2 at 1100 oC followed by 950 °C post-oxidation annealing in wet O2. SiO2 layer on Si was obtained by dry oxidation in O2 at 1100 oC for 18 min. The oxide thickness obtained after this process was 53 nm.

b) High-k dielectrics using Atomic Layer Deposition

The method of deposition of dielectric layers is an issue of critical importance. In this respect, many different techniques have been studied for high-k dielectric deposition on SiC, for instance, reactive radio frequency magnetron sputtering [86], ultrasonic spray pyrolysis, and atomic layer deposition (ALD) [78]. Among all of them, ALD has proved to give a superior layer quality and low content of interface states between the high-k dielectric and the semiconductor. However, while depositing dielectric layers using ALD, the process parameters such as, temperature in the chamber, pulse rate for precursors and surface preparation play an important role in the quality of the layers [87]. In the present work, thermal ALD process is used for all high-k dielectric film depositions, and the pulse rate and temperature of the chamber is optimized to obtain good quality layers.


48

For Al2O3 depositions on SiC, trimethyl alumina (TMA) is used as a main source for aluminum, and H2O or ozone was used as an oxygen source. The process temperature was set to 250 oC or 300 oC in different depositions. Ozone pre-treatment is mostly used while depositing Al2O3 by using ozone as a source of oxygen.

AlN films on SiC were deposited by using AlCl3 and ammonia at 500 °C, and the multilayer structures combining Al2O3 and AlN were formed by using AlCl3 and varying water or ammonia, as needed for the chemical reaction to form Al2O3 or AlN respectively.

The high-k dielectrics were initially deposited at the Department of Chemistry, University of Helsinki in Finland, and at later stage of the work, a newly installed ALD facility at KTH was utilized for Al2O3 depositions. A process optimization at KTH was carried out by depositing similar thickness of Al2O3 on SiC to see the contamination level and the thickness of the deposited films. The analysis was carried out by using RBS on both films of same thicknesses. Figure 5.3 shows a comparison between two films deposited at different places using the same precursors, and it has been seen that the deposition at new ALD facility at KTH is as good as it is in Helsinki regarding the presence of unwanted elements in the deposited film.

0 100 200 300

1000

2000

3000

4000 Helsinki KTH

Yie

ld

Channel No.

Al

SiOC

Figure 5.3: 50 nm Al2O3 deposited in Helsinki and KTH. A perfect match in the spectra is seen.

5.2 Characterization of the MIS structures

5.2.1 AlN In the present thesis, aluminum nitride (AlN) is investigated as one of the alternate passivation candidates for 4H-SiC [88]. AlN normally forms a polycrystalline structure when it is deposited by ALD [77], which unfortunately enables current leakage through the dielectric. In order to suppress the phenomenon and to find a reliable and superior quality AlN-based dielectric, some efforts have previously been made, such as adding hydrogen in AlN [89], or adding oxygen to AlN to make AlON compound [79], however, these solutions complicate the process. Therefore, the direct deposition of AlN on 4H-SiC is investigated by using ALD process. Figure 3.3 shows an x-ray

49 5.2 Characterization of the MIS structures

diffraction pattern of one of the ALD-deposited AlN films on SiC with a dominant peak in the [002] direction. The MIS structures prepared with direct deposition do not even show any capacitance in the measurements due to high current leakage through grain boundaries of AlN. A thin intermediate layer of SiO2 with 8 nm thickness is introduced in some samples to improve the band offset between SiC and AlN and to prevent the leakage. However, this thickness is too thin and does not work effectively, although the samples at least show some CV behavior with current leakage in accumulation region, as it can be seen in Figure 5.4. A thicker layer (40 nm) of SiO2 [86] instead, is more effective and even raises the breakdown values by preventing leakage through the whole stack of dielectrics. Therefore, it can be concluded that, in comparison to the samples with direct deposition of AlN on SiC, the presence of an intermediate thin SiO2 presents a significant difference in capacitive behavior of the dielectric. In these experiments, thicknesses of 50 and 150 nm of the dielectrics are also examined, but it does not influence the overall behavior of the electrical characteristics.

-4 -2 0 2 4 6 8 10

0.5

1.0

1.5

2.0

2.5

Cap

acita

nce

(x10

-11 F

)

Voltage (V)

1 kHz 10 kHz 100 kHz 1 MHz

Leakage in accumulation

Figure 5.4: 50 nm AlN on SiC. The measurements were performed in darkness from accumulation to inversion. The sweep rate was set at 0.1 V/sec [Paper VI].

5.2.2 Al2O3 Aluminum oxide (Al2O3) is one of the strong candidates for SiC passivation and is normally considered to be an amorphous material. One serious problem that often appears in Al2O3 depositions is the charge in the oxide layer, which originates from the local variation of aluminum and oxygen content during the ALD process and also depends on the thickness of the deposited Al2O3 [90]. The surface preparation prior to the deposition affects the amount of fixed charge, as well as the interface states, and results in a flat band voltage shift. In the present work, two major approaches are followed; firstly, by depositing Al2O3 directly on the SiC right after removing the native oxide by HF treatment, and secondly, growing an intermediate thin layer (8 nm) of SiO2 prior to the deposition of Al2O3. Figure 5.5 shows a comparison between the results obtained for both types of dielectric layers. For these samples the Al2O3 deposition is performed simultaneously at 300 oC.


50

-8 -4 0 4 8

0.3

0.6

0.9

1.2

1.5

Qeff = 5.4x1010 cm-2

κ = 7.71

Cap

acita

nce

(x10

-11 F

)

Voltage (V)

1 kHz 10 kHz 100 kHz

-8 -4 0 4 8

0.3

0.6

0.9

1.2

1.5

Cap

acita

nce

(x10

-11 F

)

Voltage (V)

1 kHz 10 kHz 100 kHz

Qeff = 1.4x1012 cm-2

κ = 7.21

(a) (b)

Figure 5.5: (a) No intermediate oxide. (b) With an intermediate layer of SiO2. The values for effective fixed oxide charge and dielectric constant, extracted from the measurements, are also presented. The depositions are performed at the University of Helsinki.

These results clearly show that the dielectric film deposited directly on SiC shows better electrical properties due to less amount of fixed charge. In addition, the hysteresis in direct deposition is relatively less than the other deposition, indicating a lower number of near interface states. The RBS analysis of one of these deposited films, shown in Figure 5.6, reveals that the film is not contaminated with any other element from ALD precursors. The thickness of the film is also confirmed by this analysis. It should also be noted that the Ni, seen in the spectrum is from the top contact of the film, which is hard to avoid due to the size of the probing helium ion beam.

0 100 200 300 400

2000

4000

6000

Yie

ld

Channel No.

Ni

Al

Si

OC

Figure 5.6: RBS analysis of 150 nm of Al2O3 on SiC. Ni peak observed in the spectra is from the top contact of MIS.

The current-voltage (IV) measurements on 50 nm thick Al2O3 reveal that the current leakage prior to breakdown of this oxide is relatively different in comparison to typical SiO2 characteristics (Figure 3.7). The leakage behavior of Al2O3 is explained in


Figure 5.7, showing different phenomena happening during the breakdown of Al2O3. At relatively low electric field (2.5 to 4 MV/cm), Fowler-Nordheim tunneling is a dominating leakage mechanism, then a plateau appear which is referred as the phonon assisted tunneling [91]. In the later stage, i.e., above 8 MV/cm, Frenkel-Poole emission of electrons dominates and leads to the final breakdown of the dielectric. This stepped breakdown of Al2O3 could be a reliability concern in the long-term operation. Therefore, other techniques should be implemented to suppress this breakdown phenomenon.

0 2 4 6 8 1010-9

10-7

10-5

10-3

10-1

101

103

Breakdown

Blocking

Phonon-assistedtunneling

Frenkel-Poole emission

Cur

rent

Den

sity

J (A

/cm

2 )


Fowler-Nordheim tunneling

Figure 5.7: Leakage and breakdown of Al2O3, deposited at KTH [Paper VIII].

5.2.3 Ta2O5

Out of many high-k dielectric materials, tantalum oxide (Ta2O5) has also been considered for Si CMOS devices [92], but so far it has not been tested for SiC. One problem with this material is the negative offset with SiC (presented in Table 5.1). However, some reports for Si suggest that there is always a thin layer of SiO2 present when Ta2O5 is deposited on Si [93], which can add an additional band offset. With the same assumption, Ta2O5 is experimented with SiC, and electrical characterizations are performed. As it has been seen for AlN, this material also does not show any promising results regarding capacitive behavior of the dielectric. Therefore, it can be concluded that Ta2O5 is not an appropriate choice for SiC, as a single dielectric.

5.2.4 Dielectric stacks A stacked geometry for the dielectrics has been previously tried for Si, combining the properties of different materials [92]. The same approach is adapted for SiC in the present work. A stacked dielectric is formed by adjoining Al2O3 and AlN, using a controlled ALD process. By combining these layers in a stack, the leakage from the polycrystalline AlN, which is demonstrated separately (Figure 5.4), is prevented by inserting amorphous layers of Al2O3, while the total passivation dielectric will have a high-k value. The layers are deposited alternately on two separate samples to find a better combination. In these stacked Al-based dielectrics, a thin layer (8 nm) of SiO2 is


52

used to add an extra band offset as well. Scanning electron microscopy (SEM) performed on one of the samples (Figure 5.8) confirms the polycrystallinity of the AlN in the stack. The details of these stacked samples are presented in Table 5.2. Table 5.2: Dielectric stacks on SiC. The thickness of each layer is given in parentheses. All thicknesses mentioned here are in nm.

Stack 1 SiO2 (8)–AlN (40)–Al2O3 (20)–AlN (41)–Al2O3 (20) Stack 2 SiO2 (8)–Al2O3 (17)–AlN (34)–Al2O3 (18)–AlN (37) Stack 3 Ta2O5(20)–Al2O3 (20)–Ta2O5(20)–Al2O3 (20) Stack 4 Al2O3 (20)–Ta2O5(20)–Al2O3 (20)–Ta2O5(20)

Figure 5.8: SEM image of stack 1, showing different layers of dielectrics with their respective thicknesses [Paper VI].

Dielectric characteristics for the Al-based stacked dielectrics show a significant difference by changing the order of AlN and Al2O3. Figure 5.9 shows a comparison of the dielectric properties of both stacks. Capacitance-voltage analysis of these samples reveals a high amount of negative charge, accumulated in the dielectric in both stacks, evidenced by flatband shift towards a positive voltage. However, the hysteresis in both of these stacked samples is less than 0.5 V, indicating a low concentration of near interface traps. An important observation that can be made from the CV characteristics of the two stacks is the inversion capacitance, which is only observed in the sample with the first layer being AlN but for all frequencies. This suggests that the polycrystalline AlN provides a path for the charges that results in a change in the amount of interface charges at higher frequencies, and therefore a higher capacitance in the inversion region is observed [94]. In these stacks, a difference of 25% in the values of the effective dielectric constant is also observed, which is clearly related to the sequence of layers in the stacks. Annealing of stack 1 at 100, 200 and 300 oC results in a temporary reduction of fixed oxide charges, but they return to the original values after few days, whereas for stack 2, the total amount of charge is increased as a result of annealing.


-4 0 4 8

1

2

3

4

5

Ideal 1 kHz 10 kHz 100 kHz

C

apac

itanc

e (x

10-8 F

/cm

2 )

Voltage (V)-8 -4 0 4 8

2

4

6

Ideal 1 kHz 10 kHz 100 kHz

Cap

acita

nce

(x10

-8 F

/cm

2 )

Voltage (V)

(a) (b)

Figure 5.9: CV measurements at different frequencies of (a) stack 1, (b) stack 2, with ideal CV curve (solid line). The CV measurements were obtained at 1, 10, and 100 kHz from accumulation to inversion and back again [Paper VII].

The electrical breakdown measurements of these dielectrics also show very different behavior. Typical breakdown curves for stacks 1 and 2 are presented in Figure 5.10. In a statistical analysis of the breakdown field by using the Weibull functions, shown in Figure 5.11, it is observed that the stack with a first layer of Al2O3 is relatively more reliable even though its breakdown field is less than the other stack. This kind of stacking geometry also prevents the early leakage in Al2O3 (discussed in the previous section, Figure 5.7). Optical analysis by a microscope on the post-breakdown devices (Figure 5.11) shows that the step bunching from the SiC surface is transferred to the top surface if the dielectric has some kind of crystalline structure, and it can lead to early breakdown as seen in the case of stack 2.

0 2 4 6 810-10

10-8

10-6

10-4

10-2

100

102

Cur

rent

Den

sity

J (A

/cm

2 )


Stack 1 Stack 2

Frenkel-Poole

Figure 5.10: Breakdown curves for stacks 1 and 2 [Paper VII].


54

2 4 6 8

Stack 2

1120

2 4 6 8

-3

-2

-1

0

1

Wei

bull

Func

tion

ln[ln

(1/(1

-F))

]


Stack 1

Figure 5.11: Weibull plots for the breakdown of stacks 1 and 2. Linear fit shows the reliability of the dielectric stacks. Post breakdown optical image of the contact for each stack are also presented in the inset of each plot [Paper VII].

Another scheme of stacks is tried by using Al2O3 and Ta2O5 to raise the effective dielectric constant. Table 5.2 presents the order and thickness of the stacks used in these experiments. In these stacks, the thickness of each dielectric layer is kept 20 nm and the sequence of the dielectrics is altered in two separate samples. The final thickness of the overall dielectric film is 80 nm without any interfacial SiO2.

In this type of stack, Al2O3 provides good offset values between SiC and Ta2O5. An RBS analysis of the stacked dielectric shows no contamination in the film from precursors (Figure 5.12). In addition, two layers of tantalum (Ta) can be separately observed in the spectrum.

0 100 200 300 400 500

2000

4000

6000

Ta (layer 3)

Ta (layer 1)

C O Si

Experimental Simulated

Yie

ld

Channel No.

Al (from layer 2 and 4)

Figure 5.12: RBS spectrum for stack 4. No unwanted element is detected in the spectrum and the thicknesses of the films are confirmed.

55 5.3 Thermal stability

0 4 8 12 16 20

1

2

3

4

Cap

acita

nce

(x10

-11 F

)

Voltage (V)

1 kHz 10 kHz 100 kHz 500 kHz

Figure 5.13: CV results for stack 4 showing a shift in the curve towards positive voltage. A frequency dependence of the CV behavior is also observed.

The CV measurements performed on these stacks show a high concentration of fixed negative oxide charge, revealed by a shift of the CV curve from an ideal behavior, as can be seen in Figure 5.13, for stack 4. These results indicate a poor quality of the whole dielectric. The same stack on p-type substrate does not even produce any capacitive behavior at all.

Based on the stacked dielectric study, it can be concluded that the approach to stack different high-k materials can be useful in changing the value for the overall dielectric constant and improving the reliability. This can block higher field strengths on SiC device surfaces, and also result in a better high-k dielectric for SiC. However, more experiments are required to optimize this technique.

5.3 Thermal stability As discussed in previous chapters, 4H-SiC is a good candidate for high temperature applications. In such applications, the passivation of the devices must also be able to withstand high temperatures without significant change in dielectric properties, in order not to affect the overall device characteristics. In the present work, a few experiments are performed on stacked dielectrics and Al2O3 with respect to their high temperature stability.

Capacitance measurements performed on Al-based stacked dielectrics (Al2O3 and AlN) at raised temperatures (not shown) reveal that the stack 2 is very stable at the temperatures of 100, 200 and 300 oC. On the other hand, stack 1 shows a flat band shift for these temperatures and the charge from the interface is reduced at high temperatures due to the leaky AlN film, just above thin SiO2 film.

The structural stability of Al2O3 films was also tested by using atomic force microscopy (AFM) topographic analysis to see the change in surface roughness of the samples after high temperature treatments. For this purpose, Al2O3 was deposited by ALD at KTH setup on the epi-layer grown on an unpolished (no CMP) wafer with 3 nm surface roughness and step bunching in the growth direction, as measured by AFM, and treated at 950 oC in Ar environment by rapid thermal anneal (RTA) for 60 secs, and also long term annealing for 60 mins in a furnace. The AFM analysis, presented in Figure 5.14 for these samples, shows that the surface roughness of Al2O3 is hardly affected after these temperature treatments.


56

Figure 5.14: (left) As-deposited Al2O3. (right) Annealed at 950 oC for 60 mins. The Al2O3 films are deposited on unpolished wafer epi-layer, shown in Figure 3.4. The annealing procedure did not change the surface roughness of the film significantly.

It has previously been demonstrated that high temperature annealing of ALD

deposited Al2O3 results in a better interface with 4H-SiC [95]. This has been verified by comparing CV measurements on as-deposited sample and after annealing. For this study, two samples are prepared simultaneously to make a comparison and to see the real impact of annealing on dielectrics. The results obtained from this analysis for n-type samples are presented in Figure 5.15, which show a remarkable flatband shift in CV curve by reducing the concentration of charge in the oxide. The temperature for these annealing experiments is chosen to be 950 oC, which is less than the crystallization temperature of Al2O3. X-ray diffraction analysis performed on the sample before and after annealing shows that the structure of the film is not changed as well and no extra crystallographic planes appear after annealing at these temperatures. Therefore, it can be concluded that the temperature treatment can strongly improve the electrical properties of ALD deposited Al2O3, while the structural properties are unaffected. These experiments are performed both on n- and p-type 4H-SiC, however, the results on n-type 4H-SiC are more promising.

0 5 10 15 20 250.0

0.2

0.4

0.6

0.8

1.0

C/C

ox

Voltage (V)

As-deposited Annealed at 950 oC in Ar

Figure 5.15: CV measurements of as-deposited Al2O3 and annealed at 950 oC in Ar environment for n-type 4H-SiC. A large flatband voltage shift can be observed after annealing.

57 5.4 Radiation hardness

5.4 Radiation hardness In order to operate SiC-based devices in radiation rich environments, the dielectric passivation of the devices play a crucial role. For this purpose, a separate study has been conducted to testify the radiation hardness of Al2O3 in comparison to currently used passivation material, i.e. SiO2. Typical defects that affect the device performance and reliability are the surface defects at the interface between the dielectric and SiC. These defects can affect the carrier mobility in SiC MISFETs, and also lead to leakage and early breakdown in other device configurations.

In the present work, the effect of ion radiation at the interface of the dielectric and 4H-SiC is studied by employing specific ions in an energy range where the displacement damage in the material is peaked near the interface. MIS structures of similar thickness are prepared by depositing SiO2 and Al2O3 on 4H-SiC. SiO2 was deposited by PECVD and post-oxide anneal was performed to get the best possible interface with SiC (process described in Section 5.1.1). After optimizing the deposition parameters for the oxide layer, the Al2O3 was deposited by ALD. The analysis of the dielectric parameters revealed a large amount of negative charge in the oxide with relatively low concentration of interface states. An RBS analysis confirms the thickness and stoichiometry of the deposited films.

The samples were exposed to 50 keV Ar ions producing damage at, or near the interface inside the oxide. The stopping analysis for Ar ions at these energies reflects that the ratio between the nuclear and the electronic stoppings is ~11, which results in high concentration of displacement damage around the projected range (Rp), and it is dependent on the fluence of ions. The fluence of ions used in these experiments was varied from 1×109 to 1×1013 cm-2 to find threshold damage (fluence) that can affect the electrical characteristics of the dielectrics. The depth of implanted ions is estimated by SRIM simulations [12], which shows that the Ar ions with 50 keV stop around the interface both in SiO2 and Al2O3. For these simulations, the values for the densities used are 2.6 g/cm3 for SiO2 and 2.7 g/cm3 for ALD-Al2O3 [96]. However, these could be significantly different from actual values because of the growth or deposition conditions, and consequently affect the ions’ projected range.

The dielectrics are characterized after radiation exposure by electrical measurements, and a comparison is made to non-radiated MIS structures. CV measurements on these samples show that the SiO2 interface starts to get affected after a fluence of 1×1011 cm-2 due to an increase in interface states. However, the Al2O3 samples show a considerably higher resistance to these radiation fluences. A comparison of the density of interface states is shown in Figure 5.16. Similar studies are also conducted on Si substrate, where the thickness of both oxides (SiO2 and Al2O3) was kept similar to the 4H-SiC samples. These studies resulted in the same trend in the CV measurements versus Ar ion fluence, as observed for 4H-SiC substrate.


58

0 109 1010 1011 1012

5

10

15

20

25

30

Unimplanted

SiO2/SiC Al2O3/SiC

Argon fluence (cm-2)

Dit (

x1011

cm

-2eV

-1)

Figure 5.16: Interface trap densities, estimated from high frequency CV measurements by using Terman method, for different argon fluences on SiO2/SiC and Al2O3/SiC MOS structures. The distribution of Dit at different trap energies is nearly flat in the investigated interval. Therefore, the average Dit over the trap energies is presented [Paper VIII].

Current leakage and breakdown of these implanted devices have also been studied

independently to ensure the radiation damage effects on the dielectrics. The analysis suggests that neither the breakdown nor the leakage behavior of the dielectrics is affected for any implantation fluences. Therefore, it can be concluded that this kind of nuclear damage does not directly affect the quality of the dielectric and do not produce any leakage paths in the amorphous dielectric materials.

Thermal dielectric relaxation current (TDRC) measurements have also been conducted on these samples to understand the distribution of interface states in the bandgap [60]. Measurements have been performed for SiO2/SiC, however, due to high leakage through the oxide, interface states could not be determined. Although the interface of SiO2 is very good for PECVD deposited oxide with post-oxidation annealing, the TDRC measurements showed a large amount of leakage in unimplanted samples, which could be due to the poor quality of the oxide away from the interface. However, it has been observed that the leakage is reduced for increasing fluence of ions by passivating the leakage paths in the oxide. This could be a consequence of the atomic disorder produced by implanted Ar+ in the oxide, which has increased the amorphization to give a better signal for such measurements. Similar measurements on implanted Al2O3 resulted in relatively different fluence dependence. Figure 5.17 shows a comparison of the unimplanted and as-implanted MIS structures for different fluences of Ar+ on Al2O3/SiC structures. It has been observed that the low concentration of damage produced by ion implantation can shift the interface states away from the conduction band (low temperature region) edge towards midgap region (high temperature region). The intensity of the current is dependent on the amount of interface states. Nevertheless, the total amount of interface states does not change.

59 5.4 Radiation hardness

50 100 150 200 250 3000.0

0.4

0.8

1.2

1.6

2.0

Cur

rent

(pA

)

Temperature (K)


5x1011 cm-2

1x1012 cm-2

Figure 5.17: TDRC measurements for Al2O3 samples implanted with different fluences of ions at a charging bias of 20 V (accumulation). The discharging voltage of -10 V is used to let the carriers emit from trapped states. The measurements have been performed from 50 K to 300 K and the rate for increasing temperature was set at 0.2 K/sec.

Average lifetime in the epitaxial layer after Ar+ implantations has also been investigated on these implanted oxides, by using free carrier absorption technique (FCA) [54], described in Chapter 3. The average lifetime extracted from these measurements depends on the bulk lifetime in the epi-layer, the diffusion coefficient for carriers, and the surface recombination velocity (SRV), which is an important parameter in MOSFET applications. Figure 5.18 shows an average lifetimes for a SiO2– and Al2O3–covered SiC epi-layers, after producing damage near the interface by 50 keV Ar+ implantation. It can be observed that the lifetime in SiO2 samples drops to a certain minimum level (one third of the lifetime value before implantation) at a fluence of 1×1011 cm-2 and then it saturates, showing the dependence of the carrier lifetime on the concentration of surface defects. On the other hand, for similar fluences of Ar ions on Al2O3 samples, the effect on lifetime is negligible. These results are in qualitative agreement with the electrical measurements obtained from CV technique. Moreover, FCA measurements are used to extract the SRV values for these Ar+ implanted structures. The results indicate that the SRV values for the implanted doses follow the same trend for both dielectrics, as it is observed in CV-based Dit analysis (Figure 5.16). This indicates that the increasing fluence of ions increase the SRV as well.

In the light of CV and FCA results, it can be concluded that the Al2O3 can present more resistance to the nuclear damage induced by ionizing radiation at the interface, in comparison to SiO2.


60

0 109 1010 1011 1012 1013

40

80

120

160

Ref.

(a)

Ar+ fluence (cm-2)

τ (n

s)

0 1010 1011 1012

20

40

60

80

Ref.

(b)

Ar+ fluence (cm-2)

τ (n

s)

Figure 5.18: Average lifetime variation in epi-layer after Ar+ implantation for (a) SiO2/SiC and (b) Al2O3/SiC. Error bars indicate standard deviation in the data [Paper IX].

Chapter 6 Conclusions and future outlook The thesis focuses on selected ion beam radiation effects on 4H-SiC material properties and device characteristics. Plain epitaxial 4H-SiC and more complex device structures such as bipolar junction transistors (BJTs) have been used, as well as dielectric layers on the same material to study device passivation and interface properties with these controlled ion beam experiments. It has been possible to separate ionization effects from lattice damage, and also to study radiation effects in highly localized regions, for instance, the collector of a BJT.

Ion implantation induced damage studies of plain epitaxial material show that most of the crystal damage induced by relatively low dose ion implantation can be recovered in a low temperature range, i.e. up to 800 oC. However, higher concentrations of the crystal damage obtained for higher dose requires considerably higher temperatures to anneal. The damage produced through ion implantation is mostly concentrated around end of the ion range, and it has a clear impact on the resistivity of the material, as examined by scanning spreading resistance microscopy (SSRM).

Ion implantation experiments in BJTs have been performed by producing a damaged layer in the collector. The degradation produced by this type of implantation is not recoverable after annealing at low temperatures. However, the degradation of the device characteristics produced by low dose implantations can be recovered up to 420 oC. The degradation of BJT as a result of the damage at the interface between passivating oxide and SiC has also been investigated by implanting helium ions around the dielectric and semiconductor interface. The analysis is performed with the help of device simulations and it reveals that implantation of this kind induces positive charges in the oxide, causing a surface charge at the interface, and thereby degrading the performance of the device. Simulation studies have also been performed on BJTs in the presence of bulk traps at different levels in all regions of the device. These studies reveal that bulk traps in the base region have a strong degrading effect on the device performance, whereas the emitter is relatively resistant. In the case of the collector, the traps introduced away from the base-collector junction produce an additional resistance

Conclusions and future outlook

62

curve in the collector output current, thereby confirming the observations made in experimental studies.

Device passivation is one of the most critical issues for the reliability and performance of the device. The area between the base and emitter contacts in a BJT is normally passivated, and it directly influences the current gain of the device. In this thesis, an investigation has been made for high-k dielectric passivation for 4H-SiC devices, by using atomic layer deposition (ALD). Electrical and structural characterizations have been performed mainly on Al2O3 and AlN, as compared to the SiO2. The layers have been tried individually, but also in combination, in order to obtain sufficiently high dielectric properties. Thermal stability tests have also been conducted and the results show that the high temperature annealing of as-deposited Al2O3 can dramatically improve its interface with 4H-SiC, instead of degrading the overall electrical properties.

Radiation tolerance of the Al2O3 passivation material in comparison to SiO2 has been tested by introducing ionization in the dielectric and nuclear scattering damage around the interfaces with 4H-SiC. This kind of study is conducted for the first time and it is proposed that Al2O3 can provide higher radiation resistance to such kind of damaging events. In these studies, it has also been observed that, at a certain dose of ion implantation on the Al2O3/SiC structure, the interface states can shift from the conduction band edge to the valance band. This is a very important result with implications in SiC-based MOSFET devices, where the flow of carriers in the channel is affected by the interface states near the conduction band. In this thesis, an initial study to devise a new approach to extract dielectric and semiconductor interface parameters by using free carrier absorption (FCA) method is proposed and investigated.

With the help of ion beams in a selected accelerator environment, it has been possible to produce damage in different regions of the device to study the impact on device performance. In addition, these kinds of experiments can be useful in studying radiation tolerance of the dielectric layers for passivation of SiC-based devices.

The studies conducted in this thesis require more work and can be expanded. Some suggestions for the future work are as follows:

1) Free carrier absorption technique (FCA) is introduced to analyze the interface between the dielectric layers and 4H-SiC epi-layer surface. With more precise determination of bulk lifetime and carrier diffusion constants, the technique can be a useful complement and provide quantitative information on surface recombination states.

2) Al2O3 deposition by ALD results in a large amount of charges in the oxide. Methods should be devised to improve the quality of this oxide. One way is to find a better surface preparation prior to deposition and optimization of the ALD process. Annealing of deposited oxides results in a reduced amount of charge, and this behavior should be investigated further in detail to find optimum parameters.

3) Al2O3 has shown significant tolerance for radiation. Further study is required to improve and test it against other types of radiation. Stacked dielectrics may also be interesting candidates from the radiation resistance point of view, and

63 Conclusions and future outlook

should be further investigation by combining other high-k dielectric materials, such as HfO2 with Al2O3.

4) The observation that the ion implantation in the dielectric around interface can lead to the improvements in electrical characteristics needs more investigation. Pre-implantation of different atoms such as carbon or nitrogen, at or near the surface of the semiconductor, prior to the deposition of Al2O3 can also be a useful processing tool for improving the interface properties.

Conclusions and future outlook

64

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