Chapter 6 MOSFET in the On-stateee130/sp06/chp6.pdf · Chapter 6 MOSFET in the On-state The MOSFET (MOS Field-Effect Transistor) is the building block of Gb memory chips, GHz microprocessors,

Semiconductor Devices for Integrated Circuits (C. Hu) Slide 6-1

Chapter 6 MOSFET in the On-state

The MOSFET (MOS Field-Effect Transistor) is the building block of Gb memory chips, GHz microprocessors, analog, and RF circuits.

Match the following MOSFET characteristics with their applications:

• small size• high speed• low power• high gain


6.1 Introduction to the MOSFET

Basic MOSFET structure and IV characteristics


6.1 Introduction to the MOSFET

Two ways of representing a MOSFET:


Invention of the Field-Effect Transistor


Invention of the Field-Effect Transistor

In 1935, a British patent was issued to Oskar Heil. A working MOSFET was not demonstrated until 1955.Using today’s terminology, what are 1, 2, and 6?


Today’s MOSFET Technology

Gate oxides as thin as 1.2 nm can be manufactured reproducibly.Large tunneling current through the oxide limits oxide-thicknessreduction.


6.2 Complementary MOSFETs

When Vg = Vdd , the NFET is on and the PFET is off. When Vg = 0, the PFET is on and the NFET is off.

NFET PFET


CMOS (Complementary MOS) Inverter

A CMOS inverter is made of a PFET pull-up device and a NFET pull-down device. Vout = ? if Vin = 0 V.

C:

Vin

Vdd

PFET

NFET

0V 0V

S

D

D

S

Vout

etc.) (of interconnect, capacitance


CMOS (Complementary MOS) Inverter

• NFET and PFET can be fabricated on the same chip.

Vin Vout

Vdd

0 V

N-w

ell

P+

N+

PFET

NFET

Contact

VddVout 0 V

Vin

N-well

P-substrate

P+ N+ N+ N+ P+ P+

• basic layout of a CMOS inverter


6.3 Surface Mobilities of Electrons and Holes

LVVVWCLVWQWQvQWI

dsnstgoxe

dsnsinvnsinvinvds

/)(/

µµµ

−===⋅⋅=

How to measure the surface mobility:

Vg = Vdd , Vgs = Vdd

Ids

Vds > 0


Surface mobility is a function of the average of the fields at the bottom and the top of the inversion charge layer, b and t .

From Gauss’s Law,gate

P-body

-- - - - - - -N N

Vg

Toxe

Wdmax

t

b

b = – Qdep/εs

oxedepstfbt CQVV /−+= φ

)( stfbts

oxeb VVC φ

ε+−=

Therefore,

)(

)(/

/)(

stfbgss

oxe

tgss

oxebsinvb

sinvdept

VVC

VVCQ

QQ

φε

εε

ε

+−=

−+=−=

+−=

oxe

tgs

tgss

oxe

stfbtgss

oxetb

TVV

VVC

VVVC

6V2.0

)V2.0(2

)22(2

)(21

++=

++≈

−−+=+

ε

φε

∴


Mobility is a function of Vgs , Vt , and Toxe .

What suppresses the surface mobility:• phonon scattering• coulombic scattering• surface roughness

scattering

(Vgs + Vt + 0.2)/6Toxe (MV/cm)

–(Vgs + 1.5Vt – 0.25)/6Toxe (MV/cm)

(NFET)

(PFET)

Universal Surface Mobilities


EXAMPLE: What is the surface mobility at Vgs=1 V in an N-channel MOSFET with Vt=0.3 V and Toxe=2nm?

Solution:

1 MV is a megavolt (106 V). From the mobility figure, µns=190 cm2/Vs, which is several times smaller than the bulk mobility.

MV/cm 25.1cm1012/V 5.1

6/)2.0(7

=×=

++−

oxetgs TVV


How to Measure the Vt of a MOSFET6.4 MOSFET Vt and the Body Effect

Vds = 50mV

Ids

Vgs

VtVt is measured by extrapolating the Ids versus Vgscurve to Ids = 0.

tgsdsnstgsoxedsat VVVVVCL

WI −∝−= µ)(


6.4 MOSFET Vt and the Body Effect

maxd

sdep W

C ε=

sbdeptgsoxeinv VCVVCQ +−−= )(

))(( sboxe

deptgsoxe V

CC

VVC +−−=

• Two capacitors => two chargecomponents

sbtsboxe

deptsbt VVV

CC

VVV α+=+= 00)(

• Redefine Vt as


• body effect:Vt is a function of Vsb

• body effect coefficient:α = Cdep/Coxe

= 3Toxe / Wdmax

Is the body effect a good thing? How can it be reduced?

6.4 MOSFET Vt and the Body Effect

××××××××××××××××

× × × data model

×××××××××××××××

×

-2 -1 0 1 2 Vsb (V)

NFET

PFET

Vt 0

Vt0

0.6

-0.2

-0.6

0.4

-0.4

Vt (V)

0.2

When the source-body junctionis reverse-biased, the NFET Vtincreases and the PFET Vtbecomes more negative.


Retrograde Body Doping Profiles

• Wdep does not vary with Vsb .• Retrograde doping is popular because it reduces off-state

leakage.

0.0 0.1 0.2 0.3 0.4

Depth (µm)

1016

1017

1018

Bod

y D

opin

g (c

m-3

) ××××××××××××××××

× × × data model

×××××××××××××××

×

-2 -1 0 1 2 Vsb (V)

NFET

PFET

Vt 0

Vt0

0.6

-0.2

-0.6

0.4

-0.4

Vt (V)

0.2


Uniform Body Doping

When the source/body junction is reverse-biased, there are two quasi-Fermi levels (Efn and Efp) which are separated by qVsb. An NMOSFET reaches threshold of inversion when Ecis close to Efn , not Efp . This requires the band-bending to be 2φB + Vsb , not 2φB.

)22(

)22(2

0

0

BsbBt

BsbBoxe

satt

VV

VC

qNVV

φφγ

φφε

−++≡

−++=

γ is the body-effect parameter.


6.5 Qinv in MOSFET

• Channel voltageVc=Vs at x = 0 andVc=Vd at x = L.

• Qinv = – Coxe(Vgs – Vcs – Vt0 – α (Vsb+Vcs)= – Coxe(Vgs – Vcs – (Vt0 +α Vsb) – α Vcs)= – Coxe(Vgs – mVcs – Vt)

• m ≡ 1 +α = 1 + 3Toxe/Wdmax m is called the body-effect factor or bulk-charge factor


6.6 Basic MOSFET IV Model

Ids= WQinvv= WQinvµns= WCoxe(Vgs– mVcs – Vt)µnsdVcs/dx

cs

L V

tcsgsnsoxeds dVVmVVWCdxI ds )(0 0∫ ∫ −−= µ

IdsL = WCoxeµns(Vgs – Vt – mVds/2)Vds

dsdstgssoxeds VVmVVCL

WI )2

( −−= µ


Vdsat : Drain Saturation Voltage

)(0 dstgsnsoxeds

ds mVVVCL

WdVdI

−−== µm

VVV tgs

dsat

−=


I = µ nQin vdVcs/dx

Id sat

0 L x

I = µ nQin vdVcs/dx

Id sat

0 L x

0 L 0 L x x

0 L 0 L x x

Qinv = C o x(Vg − mVcs − Vt) Qinv

(b) (f)

(c) (g)

Ecsource

drain

Ec

source

drain

- - - - - -

(d) (h)

(a) (e)Vd s = Vds at

Vd s

Vd sat

Vds = Vdsat Vds > Vdsat

Vcs Vcs

Vds − Vdsat


Saturation Current and Transconductance

• transconductance: gm= dIds/dVgs

2)(2 tgsnsoxedsat VVC

mLWI −= µ

• linear region, saturation region

)( tgsnsoxemsat VVCmLWg −= µ


6.7.1 CMOS Inverter Voltage Transfer Curve – Regeneration of Digital Signal

Vin

2V

PFET

NFET

S

D

D

S

Vout

Idd

0V

0.2

0.1

PFET NFET

Idd (mA)Vin = 2V

Vin = 1.5V

Vin = 1V

Vin = 0.5V

Vin = 0V

Vin = 0.5V

Vin = 1V

Vin = 1.5V

-2.0 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0Vds (V) Vin = 0VVin = 2 V

0.2

0.1

Idd (mA)

0 0.5 1.0 1.5 2.0 Vout(V)

2V

1.5 V

1V

0V

0.5V

1 V

Vin (V)

Vo ut (V)

0 0.5 1.0 1.5 2.0

0.5

1.0

2.0

1.5

Vdd

Vdd


6.7.2 CMOS Inverter Delay

delaynpropagatio:dτ

C C

V1 V2 V3

Vdd

Vdd

0

V2

V1

t

V32τd

...........

............


dsatN

dd

dsatP

dd

d

ICVdelaydownpull

ICVdelayuppull

delayuppulldelaydownpull

2

2

)(21

≈−

≈−

−+−≡τ

)11(4 dsatPdsatN

ddd II

CV+=τ

)|(|22and

ddgdsat

dd

on

ddPN VVI

VI

VRR=

==

6.7.2 CMOS Inverter Delay

How can the speed of an inverter circuit be improved?


fCVcurrentaverageVP dddddynamic2 =×=

6.7.3 CMOS Power Consumption

dynamic

ddfrdsat

ddpathdirect

P

fCVfttIVP

2.0

2.025

2

=

=+

≈−

offddstatic IVP =

Total power consumption

offdddd IVfCVP += 22.1


Logic Gates

V dd

AB

A

B

This two-input NANDgate and many other logic gates are extensions of the inverter.


6.8 Velocity Saturation

sat

sv+

=1

µ

• velocity saturation haslarge and deleterious effect on the Ion of MOSFETS

<< sat : v = µs

>> sat : v = µs sat


6.9 MOSFET IV Model with Velocity Saturation

satdsdsdsdstgsnsoxeds

cssat

L V

dstcsgsnsoxeds

satcs

csnstcsgsoxeds

invds

VIVVmVVWCLI

dVIVmVVWCdxI

dxdV

dxdVVmVVWCI

vWQI

ds

/)2

(

]/)([

/1

/)(

0 0

−−−=

−−−=

+−−=

=

∫ ∫µ

µ

µ


LV

VVmVVCL

W

I

sat

ds

dsdstgsnsoxe

ds+

−−=

1

)2

(µ

LVIchannel-long

Isatds

dsds /1+

=



LmVVmVV

V

dVdI

sattgs

tgsdsat

ds

ds

/)(211/)(2

,0Solving

−++

−=

=

LVVm

V sattgsdsat

11 +−

=

s

satsat

vµ

2≡

A simpler and more accurate Vdsat is:



EXAMPLE: Drain Saturation Voltage

Question: At Vgs = 1.8 V, what is the Vdsat of an NFET with Toxe = 3 nm, Vt = 0.25 V, and Wdmax = 45 nm for (a) L =10 µm, (b) L = 1 um, (c) L = 0.1 µm, and (d) L = 0.05 µm?

Solution: From Vgs , Vt , and Toxe , µns is 200 cm2V-1s-1.

sat= 2vsat/µ es = 8 ×104 V/cmm = 1 + 3Toxe/Wdmax = 1.2

11

−

+

−=

LVVmV

sattgsdsat


(a) L = 10 µm, Vdsat= (1/1.3V + 1/80V)-1 = 1.3 V

(b) L = 1 µm, Vdsat= (1/1.3V + 1/8V)-1 = 1.1 V

(c) L = 0.1 µm, Vdsat= (1/1.3V + 1/.8V)-1 = 0.5 V

(d) L = 0.05 µm, Vdsat= (1/1.3V + 1/.4V)-1 = 0.3 V

EXAMPLE: Drain Saturation Voltage

11

−

+

−=

LVVmV

sattgsdsat


Idsat with Velocity Saturation

Substituting Vdsat for Vds in Ids equation gives:

LmVV

Ichannel-long

LmVV

VVC

mLWI

sat

tgs

dsat

sat

tgs

tgssoxedsat −

+=

−+

−=

11

)(2

2

µ

Very short channel case: tgssat VVL −<<

)(

)(2

LVVCWv

VVCWI

sattgsoxesat

tgssatsoxedsat

−−=

−= µ

• Idsat is proportional to Vgs–Vt rather than (Vgs – Vt)2 , notas sensitive to L as 1/L.


Measured MOSFET IV

What is the main difference between the Vg dependencesof the long- and short-channel length IV curves?

0 1 2 2.5Vds (V)

0.0

0.1

0.2

0.3

0.4

I ds (

mA

/µm

)

L = 0.15 µm Vgs = 2.5V

Vgs = 2.0V

Vgs = 1.5V

Vgs = 1.0V

Vt = 0.4 V

Vds (V)I d

s (µ A

/µm

)

L = 2.0 µm Vgs = 2.5V

Vgs = 2.0V

Vgs = 1.5V

Vgs = 1.0V

0.0

0.01

0.02

0.03

Vt = 0.7 V


PMOS and NMOS IV Characteristics

The PMOS IV is qualitatively similar to the NMOS IV, but the current is about half as large. How can we design a CMOS inverter so that its voltage transfer curve is symmetric?


6.10 Parasitic Source-Drain Resistance

)(1 0

0

tgs

sdsat

dsatdsat

VVRI

II

−+

=• If Idsat0 ∝ Vg – Vt ,

• Idsat is reduced by about 15% in a 0.1µm MOSFET.• Vdsat = Vdsat0 + Idsat (Rs + Rd)

Rs RdS D

Ggate

oxide

dielectric spacercontact metal

channel

N+ source or drainCoSi2 or TiSi2


Definitions of Channel Length

LLL drawn ∆−≡

L, Leff ,or Le

Lg

N N

Ldraw n


6.11 Extraction of the Series Resistance and the Effective Channel Length

∆L

Rd s

1 2

Ldrawn (µm)

100

200

300data

interceptVdsIds-------- Ω( )

Vgs − Vt = 1 V

Vgs − Vt = 2 V

)( tgsdrawn

dssoxeds VV

LLVWCI −∆−

=µ

stgsoxe

drawnds

ds

ds

VVWCLLR

IV

µ)( −∆−

+=

stgsoxe

drawndsds VVWC

LLIVµ)()(

−∆−

=

Include series resistance, Rds ≡ Rd + Rs ,


6.12 Source Injection Velocity Limit

• Carrier velocity is limitedby the thermal velocitywhen they first enter thechannel from the source.

• Idsat = WBvthxQinv = WBvthxCoxe(Vgs – Vt)

N+

gate

N+

S DVds

Ec

Ev

-

Vgs


6.13 Chapter Summary

sbtsbt VVVV α+= 0)( for steep retrograde body doping

• body effect

dmaxoxe WT /3=α

• basic Ids model

dsdstgssoxeds VVmVVCL

WI )2

( −−= µ

2.1/31 ≈+= dmaxoxe WTm

• Small α and m are desirable. Therefore, small Toxe is good.Ch.7 shows that large Wdmax is not acceptable.• CMOS circuit speed is determined by CVdd/Idsat , and its power by CVdd

2f + VddIoff .


6.13 Chapter Summary

IV characteristics can be divided into a linear region and a saturation region. Ids saturates at:

2)(2 tgssoxedsat

tgsdsat

VVCmLWI

mVV

V

−=

−=

µ

Considering velocity saturation,1

1−

+

−=

LVVmV

sattgsdsat

LmVV

Ichannel-longI

sat

tgs

dsatdsat −

+=

1

)( tgssoxemsat VVCmLWg −= µ

transconductance:

Documents

Chapter 6 MOSFET in the On-stateee130/sp06/chp6.pdf · Chapter 6 MOSFET in the On-state The MOSFET (MOS Field-Effect Transistor) is the building block of Gb memory chips, GHz microprocessors,