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Chapter 3: Gate-Level Minimization CPIT 210

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Page 1: Chapter 3 Gate Level Minimization - kau.edu.sa

Chapter 3: Gate-Level Minimization

CPIT 210

Page 2: Chapter 3 Gate Level Minimization - kau.edu.sa

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Karnaugh mapsn The Boolean functions also can be simplified by

map method as Karnaugh map or K-map.n The map is made up of squares, with each square

representing one minterm of the function.n This produces a circuit diagram with a minimum

number of gates and the minimum number of inputs to the gate.

n It is sometimes possible to find two or more expressions that satisfy the minimization criteria.

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Two-Variable mapn Two-variable has four minterms, and consists of

four squares.n m1 + m2 + m3 = x’y + xy’ + xy = x + y

Page 4: Chapter 3 Gate Level Minimization - kau.edu.sa

K-Map and Truth Tables§ The K-Map is a different form of the truth

tableTruth Table

Input Values(x,y)

Function ValueF(x,y)

0 0 10 1 01 0 11 1 1

K-Map

11x = 1

01x = 0

y = 1y = 0x y

Page 5: Chapter 3 Gate Level Minimization - kau.edu.sa

K-Map Function Minimization§ F(x,y) = m0 + m2 + m3§ F = x y + x y + x yTwo adjacent cells containing 1’s can be combined using the Minimization Theorem

K-Map

11x = 1

01x = 0

y = 1y = 0x y

§ m0 + m2 = x y + x y = (x + x) y = y

§ Therefore, F can be simplified as F = x + y

§ m2 + m3 = x y + x y = x (y + y) = x

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ExampleEx. 3-3 F(x, y, z) = ∑(0, 2, 4, 5, 6)

F = z’ + xy’

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Three-Variable mapn Note that the minterms are not arranged in a binary

sequence, but similar to the Gray code.n For simplifying Boolean functions, we must recognize the

basic property possessed by adjacent squares.n m5+m7= xy’z + xyz = xz(y’ + y) = xz

y

cancel

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Combining Squares§ By combining squares, we reduce number of

literals in a product term, thereby reducing the gate input cost

§ On a 3-variable K-Map:

n One square represents a minterm with 3 variables

n Two adjacent squares represent a term with 2 variables

n Four adjacent squares represent a term with 1 variable

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Combining Four Squaresn Example Shapes of 4-square

Rectangles:y

0 1 3 2

5 64 7

zx

x y z

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Combining Two Squaresn Example Shapes of 2-square

Rectangles: y0 1 3 2

5 64 7xz

x y x z

y z

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Example: Combining Squaresn Example 1:

n Applying the Minimization Theorem 3 times:

n Thus the four terms that form a 2 × 2 square correspond to the term ‘y’.

y=zyyz +=

zyxzyxzyxzyx)z,y,x(F +++=

x

y10 2

4

3

5 671 111

zF = ∑(2, 3, 6, 7)

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n Example 2: find an optimum SOP equation forF(x, y, z) = ∑ (0, 1, 2, 4, 6, 7)

x y zy0 1 3 2

5 64 7xz

1 1 1

1 1 1

x yF = z + x y + x y

Example: Combining Squares

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Four-Variable K-Map00 01 11 10

00 m0 = w x y z m1 = w x y z m3 = w x y z m2 = w x y z

01 m4 = w x y z m5 = w x y z m7 = w x y z m6 = w x y z

11 m12 = w x y z m13 = w x y z m15 = w x y z m14 = w x y z

10 m8 = w x y z m9 = w x y z m11 = w x y z m10 = w x y z

yzwx

YY

Z

W

X

W

ZZ

X

X

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4-Variable K-map Terms§ 4-variable K-maps can have rectangles

corresponding to:• Single square = 4-variable minterm

• 2 combined squares = 3-variable term

• 4 combined squares = 2-variable term

• 8 combined squares = 1 variable term

• 16 (all) combined squares = constant ‘1’

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Combining Eight Squaresn Examples of 8-square Rectangles:

X

Y

Z

8 9 1011

12 13 1415

0 1 3 2

5 64 7

W

W

Z

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Combining Four Squaresn Examples of 4-square Rectangles:

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

W YX ZX Z

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Combining Two Squaresn Examples of 2-square Rectangles:

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

W Y ZW X Z

X Y Z

W X Z

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Simplifying 4-Variable Functionsn F(W, X, Y, Z) = ∑ (0, 2, 4, 5, 6, 7, 8, 12)

8 9 1011

12 13 1415

0 1 3 2

5 64 7

X

Y

Z

W

1 1

1 1

1

1

1 1

Y Z W Z

F = W X + Y Z + W Z

W X

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POS simplificationn If we mark the empty squares by 0’s rather than

1’s and combine them into valid adjacent squares, we obtain the complement of the function, F’. Use the DeMorgan’s theorem, we can get the product of sums.

Ex.3-8 Simplify the Boolean function in (a) sum of products(b) product of sums

F(A, B, C, D) = ∑(0, 1, 2, 5, 8, 9, 10)

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Example(a) SOPs

F=

(b) POSsF’=By DeMorgan’s thmF=

B’D’+ B’C’+ A’C’D

AB + CD + BD’

(A’+B’) .(C’+D’).(B’+D)

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Gate implementation

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Exchange minterm and maxtermn Consider the truth table

that defines the function F in Table 3-2.

Sum of mintermsF(x, y, z) = ∑(1, 3, 4, 6)Product of maxtermsF(x, y, z) = ∏(0, 2, 5, 7)n In the other words, the 1’s

of the function represent the minterms, and the 0’srepresent the maxterms.

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Don’t care conditionsEx.3-9 Simplify the F (w, x, y, z)= ∑(1, 3, 7, 11, 15) with

don’t-care conditions d(w, x, y, z) = ∑(0, 2, 5)In part (a) with minterms 0 and 2à F = yz + w’x’In part (b) with minterm 5 à F = yz + w’z

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NAND and NOR implementationn NAND gate is a universal gate because any digital system

can be implemented with it.n NAND gate can be used to express the basic gates, NOT,

AND, and OR.

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Two graphic symbols for NAND gate

n In part (b), we can place a bubble (NOT) in each input and apply the DeMorgan’s theorem, then get a Boolean function in NAND type.

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Two-level implementationF = AB + CD Double

complementation, so can be removed=

OR gate,Fig.3-18

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Multilevel NAND circuitsn To convert a multilevel AND-OR diagram into an

all-NAND diagram using mixed notation is as follows:

1. Convert all AND gates to NAND gates with AND-invertgraphic symbols.

2. Convert all OR gates to NAND gates with invert-ORgraphic symbols.

3. Check all the bubbles in the diagram. For every bubblethat is not compensated by another small circle along the same line, insert an inverter or complement the input literal.

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Multilevel NAND circuits

,

,

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NOR implementationn The NOR operation is the dual of the NAND operation, all

procedures and rules for NOR logic are the dual of NAND logic.

n NOR gate is also a universal gate.

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Two graphic symbols for NOR gaten In part (b), we can place a bubble (NOT) in each

input and apply the DeMorgan’s theorem, then get a Boolean function in NOR type.

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Implementing F with NOR gatesF = (AB’ + A’B)(C + D’)n To compensate for the bubbles in four inputs, it is

necessary to complement the corresponding input literals.