Chapter 3

Gate-level Minimization

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Chapter3: Gate-level Minimization

3-2 The Map MethodTwo-variable map and Three-variable map

3-3 Four-Variable Map3-4 Five-variable Map3-5 Product of Sums Simplification3-6 Don’t-care Conditions3-7 NAND and NOR Implementation3-8 Other Two-LeveI Implementations3-9 Exclusive-OR Function

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3-2 The Map Method

• Simplification of Boolean Expression– Minimum # of terms, minimum # of literals– To reduce complexity of digital logic gates– The simplest expression is not unique

• Methods:– Algebraic minimization lack of specific rules

• Section 2.4

– Karnaugh map or K-map• Combination of 2, 4, … adjacent squares

Logic circuit Boolean function Truth table K-map

Canonical form (sum of minterms, product of maxterms) (Simplifier) standard form (sum of products, product of sums)

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4

A Karnaugh map is a graphical tool for assisting in the general simplification procedure.

3-2 The Map Method

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2 variables 4 minterms 4 squares.

Y’ Y

X

X’

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We can reduce functions by circling 1’s in the K-mapEach circle represents minterm reductionFollowing circling, we can deduce minimized and-or form.Rules to considerEvery cell containing a 1 must be included at least once.The largest possible “power of 2 rectangle” must be enclosed.The 1’s must be enclosed in the smallest possible number of rectangles.

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Two variable maps:

g = b'

0 101

ab 0 1

01

ab

0 10 1

f = a

1 10 0

0A

1 01

B 0 101

F=AB+A’B

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X

Y

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Example: F(X,Y) = XY’ + XY From the map, we see that

F (X,Y) = X.Note: There are implied 0s in other boxes.

This can be justified using algebraic manipulations:

F(X,Y) = XY’ + XY

= X(Y’ +Y)

= X.1

= X

11 X

10

G(x,y) = m1 + m2 + m3

1

11

G(x,y) = m1 + m2 + m3

= X’Y + XY’ + XY

From the map, we can see that

G = X + YX

Y

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F = Σ(m0,m1)

Using algebraic manipulationsF = Σ(m0,m1)

= x’y + x’y’= x’ (y+y’)= x’

x y F0 0 10 1 11 0 01 1 0

0 1y

x0

1

1

0 0

10 1

yx

0

1

x’y’

xy’ xy

x’y

x

y

X’

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3 variables 8 minterms (m0 – m7).

How can we locate a minterm square on the map?

Use figure (a) OR use column # and row # from figure (b)E.g. m5 is in row 1 column 01 (5 10 = 101 2)Q. Show the area representing X’? Y’? Z’?

• 8 minterms for 3 binary variables• Any two adjacent squares differ by only

one variable

yz

13

yz

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By combining squares in powers of 2in powers of 2, we reduce number of literals in a product term, reducing the literal cost, thereby reducing the other two cost criteria.

On a 3-variable K-Map:◦ One square represents a minterm with three variables◦ Two adjacent squares represent a product term with two

variables◦ Four “adjacent” terms represent a product term with one

variables◦ Eight “adjacent” terms is the function of all ones (logic 1).

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Adjacent Squares m0+m2 = X’Y’Z’ + X’YZ’ = X’Z’(Y’+Y) = X’Z’ m4+m6 = XY’Z’ + XYZ’ = XZ’(Y’+Y) = XZ’

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F = X’Y’Z’ + X’YZ’ + XY’Z’ + XYZ’= Z’ (X’Y’ + X’Y + XY’ + XY)= Z’ (X’ (Y’+Y) + X (Y’+Y))= Z’ (X’+ X) = Z’

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F=AB’C’ +ABC +ABC +ABC + A’B’C + A’BC’

F=A+BC +BC0

A

1 11

00 01

01

BC

01 1

111 10

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Example:

F (x, y, z)= Σm (2, 3, 6, 7)

Applying the Minimization Theorem three times:

Thus the four terms that form a 2 × 2 square correspond to the term "y".

yzyyz

zyxzyxzyxzyx)z,y,x(F

00 101101

1

0

X

Z

Y

XYZ

1 1

1 1Y

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Example: SimplifyF (x, y, z)= Σm (2, 3, 4, 5)

00 101101

1

0

X

Z

Y

XYZ

1

1 1

1

X’Y

XY’

F(X,Y,Z) = X’Y + XY’

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Example: SimplifyG (a, b, c)= Σm (3, 4, 6, 7)

00 101101

1

0

a

c

b

Xbc

1

1 11

ac’

bc

G (a,b,c) = bc + ac’

a

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Example: SimplifyF(X, Y, Z) = X’Z + X’Y + XY’Z + YZF(X, Y, Z) = Σm (1, 2, 3, 5, 7)

yx

yx

z)y,F(x, z

z00 101101

1

0

X

Z

Y

XYZ

1 1

11

1

• In general, as more squares

are combined, we obtain a

product term with fewer

literals.• Overlap is allowed.

Examples 3-1 and 3-2

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Examples 3-3 and 3-4

One square representsone minterm, giving aterm of three literals

• Two adjacent squaresrepresent a term of twoliterals

• Four adjacent squaresrepresent a term ofone literal

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3-3 Four-Variable Map

• Two adjacent squares represent a term of three literals• Four adjacent squares represent a term of two literals• Eight adjacent squares represent a term of one literalThe larger the number of squares combined, the smaller thenumber of literals in the term

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Examples 3-5 and 3-6

x

x

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F = m(0,1,2,4,5,6,8,9,12,13,14)

F = Y’ + XZ’ + W’Z’

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F = m(0,2,4,5,6,7,10,13,15)

Do it and show it to me next time!

Simplification Using Prime Implicants

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A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2.

A prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more minterms.

Prime Implicants and Essential Prime Implicants can be determined by inspection of a K-Map.

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Minterms covered by single prime implicant

DB

CB

1 1

1 1

1 1

B

D

A

1 1

1 1

1

Find ALL Prime Implicants

ESSENTIAL Prime Implicants

C

BD

CD

BD

DB

1 1

1 1

1 1

B

C

D

A

1 1

1 1

1

AD

BA

Find all prime implicants for:F (W,X,Y,Z) = (0,2,3,8,9,10,11,12,13,14,15)

X

Y

Z

W

Prime implicants are: W, X‘Y, and X‘Z‘

1 1 1

1 1 1 1

1 1 11

Note that all of these prime implicants are essential.

Find all prime implicants for:G(W,X,Y,Z) = (0,2,3,4,7,12,13,14,15)

◦ Hint: There are seven prime implicants!

X

Y

Z

W

1 1 1

1 1

1 1 1 1

Prime Implicants are WX, XY’Z', W’Y’Z', W’X’Z', W’X’Y, W’YZ, XYZ.

There is only one essential prime implicant: WX.

3-4 Five-Variable Map

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Example 3-7

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E.g. Simplify the following Boolean function in product-of-sums form

F(A,B,C,D)= m(0,1,2,5,8,9,10)1. Mark with 1’s the minterms of F.2. Mark the remaining squares with

0’s. These represent F’.3. Find the simplified F’.

F’ = AB + CD + BD’4. Complement 3 to obtain a

simplified F in product-of-sums formF = (A’ + B’)(C’ + D’) (B’ + D)

Simplify :F= (0,1,2,5,8,9,10) in Product-of-Sums Form

1. Mark with 0’s the Maxterms of F

2. Combine 0’s to obtain a simplified F’ in SOP.

3. Complement 2 to obtain a simplified F in POS.

A

D

C

B

F’ = AB + CD + BD’F = (A’+B’)(C’+D’)(B’+D)

Example 3-8Simply Boolean function F(A, B, C, D) =(0, 1, 2,5, 8, 9,10) in (a) sum of products and (b) product of sums

(a) F = B’D’+ B’C‘+ A’C’D

1. Obtain simplified complemented function:F’ = AB + CD+BD’

2. Applying DeMorgan’s theorem to obtain FF = (A’ + B’) (C’+D’) (B’ + D)

(b)

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Gate Implementation for Example 3-8

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F(x, y, z) =(1, 3, 4, 6) =(0, 2, 5, 7)

F(x, y, z) =(1, 3, 4, 6) =(0, 2, 5,7)F = x’z + xz‘F’ = xz + x’z’ F = (x’ + z’)(x + z)

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Sometimes a function table or map contains entries for which it is known:◦ the input values for the minterm will never occur, or◦ The output value for the minterm is not used

In these cases, the output value need not be defined Instead, the output value is defined as a “don't care” By placing “don't cares” ( an “x” entry) in the function table

or map, the cost of the logic circuit may be lowered. Example 1: A logic function having the binary codes for

the BCD digits as its inputs. Only the codes for 0 through 9 are used. The six codes, 1010 through 1111 never occur, so the output values for these codes are “x” to represent “don’t cares.”

Example 3-9

product of sums?

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3-7 NAND and NOR Implementation

Digital circuits are frequently constructed with NANDor NOR gates rather than with AND and OR gates

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NAND CircuitsNAND gate: a universal gate

– Any digital system can be implemented with it• including AND, OR and complement

=

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Two-Level Implementation with NAND

sum of product expression and its equivalentNAND implementation

F = AB + CD

= [(AB + CD)’]’

= [(AB)’*(CD)’]’

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Example 3-10Implement the following Boolean function with NAND gates

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Procedures of Implementation withtwo levels of NAND gates

1. Express simplified function in sum of products

2. Draw a NAND gate for each product term thathas at least two literals to constitute a group offirst-level gates

3. Draw a singlegate using AND-invert or invert-OR in the second level

4. A term witha single literal requires an inverter inthe first level

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Multilevel NAND Circuits1. Convert all AND gates to NAND gates with AND-invert graphic symbols

2. Convert all OR gates to NAND gates with invert-OR graphic symbols3. Check all the bubbles in the diagrams. For a single bubble, invert an

inverter (one-input NAND gate) or complement the input literal

‘

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Figure 3-23 Implementing F=(AB’ + A’B)(C+D’)

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NOR Circuite•The NOR operation is the dualof the NAND operation•The NOR gate is anothar universal gate to implement anyBoolean function

=

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NOR Implementation

Transformation from OR-ANDdiagram to NOR diagram•OR gates => OR-invert•AND gate => invert-AND

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3-8 Other Two-level Implementationswired logic: some NAND or NOR gates allow a cirect wire

connection between the outputs of two gates to provide aspecific logic function

– The wired-AND gate or wired-OR gate is not a physical second-levelgate, but only a symbol

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Nondegeneratd Forms• 16 possible combinations of two-level forms with 4

types of gates: AND, OR, NAND, and NOR– 8 degenerate forms: degenerate to a single operation– 8 generate forms

• NAND-AND = AND-NOR = AND-OR-INVERT• OR-NAND = NOR-OR = OR-AND-INVERT

NOR x OR 3-6NOR

= NAND 3-6 AND

3-4 OR x NOR

NAND

OR

AND 3-4 NAND =

1 \ 2

AND

st nd NORNANDORAND

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AND-OR-INVERT ImplementationAND-NOR = NAND-AND = AND-OR-INVERT

F = (AB + CD + E)’

Similar to AND-OR, AND-OR-INVERT requires anexpression in sum of products

Given F, we can implement F’ with AND-OR-INVERT

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OR-AND-INVERT Implementation

OR-NAND = NOR-OR = OR-AND-INVERTF = [ (A+B) (C+D) E ] ’

Similar to OR-AND, OR-AND-INVERT requires anexpression in products of sumGiven F, we can implement F’ with OR-AND-INVERT

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Exxmple 3-11Other Two-levelImplementations

F = x’y’z’ + xyz’

F’ = x’y + xy’ + z

F = (x’)’ = (x’y + xy’ + z)’

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XOR: x y = xy’ + x’y Exclusive-NOR = equivalenxe

(x y)’ = (xy’ + x’y)’= (x’ + y)(x + y’) = x’y’ + xy

Communtative: A B = B AAssociative: (A B) C = A(B C) = A B C

Only a limited number of Booleanfunctions can be expressed in terms of

XOR operations, but it is particularlyuseful in arithmetic operations and

error-detection and correction circuits

3-8 Exclusive-OR (XOR) Function

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Odd Function• The 3-variable XOR function is equal to 1 if only one variable

is equal to 1 or if all three variables are equal to 1• Multiple-variable exclusive OR operation = odd function : odd

number of variables be equal to 1

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map for a 4-variable XOR Function

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Parity Generation and Checking

parity bit: an extra bit included with a binary messagetomake the number of 1’s either odd or even

3-bit even-parity-generatorP=xyz

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4-bit Even-Parity-Checker

C = xyzP

P = 04-bit even parity checker= 3-bit even parity generator

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