Chapter 2 Decision-Making Instructions (Instructions: Language of the Computer Part V)

Chapter 2

Decision-Making Instructions(Instructions: Language of the

ComputerPart V)

Florida A & M University - Department of Computer and Information Sciences

So far we’ve learned: MIPS (RISC) Design Principles

Simplicity favors regularity Smaller is faster Make the common case fast Good design demands good compromises

Recent Instructions:

add, sub, lw, sw, addi, la, movesll, srl, and, or, andi, ori, nor

Instruction Formats R-format, I-format

Up to Now All instructions only manipulate data…

we’ve built a calculator of sorts.

In order to build a computer, we need decision making instructions alter the control flow, i.e., change the "next" instruction to be executed

address it by supplying a pointer to a memory address


C++ Decisions Two kinds of decision statements in C++

if-then if (condition) consequence

if-then-else if (condition) consequence else alternative

Rearrange if-then into following: if (condition) goto L1;

consequence;

L1:


C++ Decisions Rearrange if-then-else into following:

if (condition) goto L1; OR if (condition) goto L1; alternative; consequence; goto L2; goto L2;

L1: consequence; L1: alternative;

L2: L2:

These are not as elegant as C++, but same meaning and easier to translate into MIPS


When condition branch to instruction label; otherwise continue sequentially.

beq rs, rt, L1 beq is “branch if registers are equal” if (rs == rt) branch to instruction labeled L1;

bne rs, rt, L1 bne is “branch if registers are not equal” if (rs != rt) branch to instruction labeled L1;


Conditional Branches

j label Jump Instruction: jump (or branch) directly to

the given label Same meaning as goto label in C++

Technically, it has the same effect as:

beq $0,$0,label


Unconditional Branch

Compiling if Statements C++ statement

if (i == j) f = g + h;

Variable/register relationship:

f : $s0 g : $s1 h : $s2 i : $s3 j : $s4

bne $s3,$s4,Done add $s0,$s1,$s2 Done:

Note: Compiler automatically creates labels (e.g. Done) to handle decisions (branches). Generally not found in HLL code.


Done

i == j?

f=g+h

(false) i != j

(true) i == j

Compiling if Statements C++ statement

if (i != j) f = g + h;

else f = g – h;

Variable/register mapping:

I /$s3 , j / $s4 j; f $s0, g/$s1, h/$s2


Done

i != j?

f=g+h f=g-h

(false) i == j

(true) i != j

Compiling if Statements

MIPS

beq $s3,$s4,F add $s0,$s1,$s2) j Fini

F: sub $s0,$s1,$s2

Fini:


Fini:

i != j?

f=g+h f=g-h

(false) i == j

(true) i != j

F:

MIPS Labels• A branch label indicates the address of the

memory word where the instruction is stored


Conditional Branches Instruction Syntax:

1 2, 3, 4 where

1 : operation name2 : first register operand3 : second register operand 4 : label that represents the offset in

number of instructions or words from the next instruction (i.e., PC +4 )


Conditional Branch


Instruction opcode rs rt Immediate

beq 4 0-31 0-31 within ± 215

bne 5 0-31 0-31 within ± 215

The assembler relieves the assembly language programmer from the tedium of calculating addresses for branches

MIPS:Semantics of Branching If we don’t take the branch:

PC = PC + 4

If we do take the branch: PC = (PC + 4) + (immediate* 4)

Observations Immediate field specifies the number of words to

jump, which is simply the number of instructions to jump.

Immediate field can be positive or negative. Due to hardware, add immediate to (PC+4), not to

PC; will be clearer why later in course


C++ Loops Simple loop in C

do {

sum = sum + k;

k = k + 1;

} while ( k != 100);

Rewrite this as:Loop: sum = sum + k;

k= k + 1;if (k != 100) goto Loop;


Compiling Loop Statements Rewritten loop:

Loop: sum = sum + k; k = k + 1;if (k != 100) goto Loop;

MIPS : // $t1 = k; $t2 = sum; $t3 = 100;

li $t3,100 # $t3 100 Loop: add $t2, $t2, $t1 # sum sum + I addi $t1, $t1, 1 # i I + 1

bne $t1, $t3, Loop # goto Loop if i != 100


C++ Loops There are three types of loops in C++:

while do while for

Each can be rewritten as either of the other two, so the method used in the previous example can be applied to while and for loops as well.

Key Concept: Though there are multiple ways of writing a loop in MIPS, the key to decision making is the conditional branch



Basic Blocks A basic block is a sequence of instructions

with No embedded branches (except at end) No branch targets (except at beginning)

A compiler identifies basic blocks for optimization

An advanced processor can accelerate execution of basic blocks

More Conditional Operations Up to now, only tested equalities (== or !=

in C++). Generally, programs need to test <, ≤, > and ≥ as well

Set result to 1 if a condition is true; else 0 Similar to Halix COMPARE instructions

slt rd, rs, rt if (rs < rt) rd = 1; else rd = 0;

slti rt, rs, constant if (rs < constant) rt = 1; else rt = 0;“


More Conditional Operations Use in combination with beq, bne

C++ Statement: if (g < h) goto L1; Compiled to MIPS:

slt $t0,$s0,$s1 bne $t0,$0,L1

Register $0 always contains the value 0, so bne and beq often use it for comparison after an slt instruction


More Conditional Operations Use in combination with beq, bne

C++ Statement: if (g >= 1) goto L1; Compiled MIPS:

slti $t0, $s0, 1 # immediatebeq $t0, $0, Loop


More Conditional Operations Now, we can implement <, but how do we

implement >, ≤ and ≥ ?

We could add 3 more instructions, but: MIPS goal: Simpler is Better

Can we implement ≤ in one or more instructions using just slt and the branches?

What about >? What about ≥?

4 combinations of slt and (beq or bne)


More Conditional Operations if (g < h) goto Less;

slt $t0, $s0, $s1 # $t0 = 1 if g < h bne $t0, $zero, Less # if (g < h) goto Less

if (g >= h) goto Gteq; slt $t0, $s0, $s1 # $t0 = 1 if g < h beq $t0, $zero, Gteq # if (g >= h) goto Gteq

if (g > h) goto Grtr; slt $t0, $s1, $s0 # $t0 = 1 if g > h bne $t0, $zero, Grtr # if (g > h) goto Grtr

if (g <= h) goto Lteq; slt $t0, $s1, $s0 # $t0 = 1 if g > h beq $t0, $zero, Lteq # if (g <= h) goto Lteq



Branch Instruction Design

Why not blt, bge, etc? Hardware for <, ≥, … slower than =, ≠

Combining with branch involves more work per instruction, requiring a slower clock

All instructions penalized!

beq and bne are the common case This is a good design compromise

Pseudoinstructions (Assembler) if (g < h) goto LT;

blt $s0, $s1, LT

if (g >= h) goto GTE; bge $s0, $s1, GTE

if (g > h) goto GRTR; bgt $s0, $s1, GRTR

if (g <= h) goto LTE; ble $s0, $s1, LTE


More Conditional Operations

Instruction opcode rs rt rd shamt funct

slt 0 0-31 0-31 0-31 0 42


Instruction opcode rs rt constant

slti 10 0-31 0-31


Signed vs. Unsigned Signed comparison: slt, slti Unsigned comparison: sltu, sltui Example

$s0 = 1111 1111 1111 1111 1111 1111 1111 1111 $s1 = 0000 0000 0000 0000 0000 0000 0000 0001 slt $t0, $s0, $s1 # signed

–1 < +1 $t0 = 1

sltu $t0, $s0, $s1 # unsigned +4,294,967,295 > +1 $t0 = 0

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Chapter 2 Decision-Making Instructions (Instructions: Language of the Computer Part V)