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Full RLC Circuit Model For n wire segments per net n RC elements: n n self inductance: n n mutual inductance: n*(n-1) $$ Self inductance $$ L11 N11 N12 val L12 N13 N14 val L21 N21 N22 val L22 N23 N24 val $$ mutual inductance $$ K1 L11 L21 val K2 L12 L22 val K3 L11 L12 val K4 L21 L22 val K5 L11 L22 val K6 L21 L12 val N11 N13 N12 N14 N21 N23 N22 N24 Ls(wire12) Lm(wire21, wire12) / sqrt(L21 * L12)
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Chapter 1Interconnect Extraction
Prof. Lei HeElectrical Engineering Department
University of California, Los Angeles
URL: eda.ee.ucla.eduEmail: [email protected]
Outline Capacitance Extraction
– Introduction– Table based method– Formula based method
Inductance Extraction– Introduction– Table based method– Formula based method
RLC circuit model generation– Full model and normalized model– Inductance truncation via L-1 model
Finite element method (FEM) based Extraction– Overview of FEM– FEM based Extraction Flow
Homework
Full RLC Circuit Model
For n wire segments per net RC elements: n self inductance: n mutual inductance: n*(n-1)
$$ Self inductance $$$$ Self inductance $$L11 N11 N12 valL11 N11 N12 valL12 N13 N14 valL12 N13 N14 valL21 N21 N22 valL21 N21 N22 valL22 N23 N24 valL22 N23 N24 val$$ mutual inductance $$$$ mutual inductance $$K1 L11 L21 valK1 L11 L21 valK2 L12 L22 valK2 L12 L22 valK3 L11 L12 valK3 L11 L12 valK4 L21 L22 valK4 L21 L22 valK5 L11 L22 valK5 L11 L22 valK6 L21 L12 valK6 L21 L12 val
N11N11 N13N13N12N12 N14N14
N21N21 N23N23N22N22 N24N24
Ls(wire12)Ls(wire12)
Lm(wire21, wire12) / sqrt(L21 * L12)Lm(wire21, wire12) / sqrt(L21 * L12)
Normalized RLC Circuit Model
For n segments per wire RC elements: n Self inductance: n Mutual inductance: n
$$ Self inductance $$$$ Self inductance $$L11 N11 N12 valL11 N11 N12 valL12 N13 N14 valL12 N13 N14 valL21 N21 N22 valL21 N21 N22 valL22 N23 N24 valL22 N23 N24 val$$ mutual inductance $$$$ mutual inductance $$K1 L11 L21 valK1 L11 L21 valK2 L12 L22 valK2 L12 L22 val
N11N11 N13N13N12N12 N14N14
N21N21 N23N23N22N22 N24N24
Ls(net1)Ls(net1)
Lm(net1, net2) / sqrt(net1 * net2)Lm(net1, net2) / sqrt(net1 * net2)
Full Versus Normalized
Two waveforms are almost identicalRunning time:
Full 99.0 seconds Normalized 9.1 seconds
Application of RLC model
Shielding Insertion:
To decide a uniform shielding structure for a given wide bus– Ns: number of signal traces between two shielding traces– Ws: width of shielding traces
... ...1 2 3 Ns 1 2 3 Ns
Ws Ws Ws
Trade-off between Area and Noise Total 18 signal traces
2000um long, 0.8um wide separated by 0.8um
Drivers -- 130x; Receivers -- 40x Power supply: 1.3V
Ns Ws Noise(v) Routing Area (um) Wire Area (um)
18 -- 0.71 61.1(0.0%) 46.4(0.0%)6 0.8 0.38 64.8 48.06 1.6 0.27 66.4 49.66 2.4 0.22 68.0 51.23 0.8 0.17 69.6(13%) 50.4(8.8%)
References
Original paper:– M. Xu and L. He, "An efficient model for frequency-based on-
chip inductance," IEEE/ACM International Great Lakes Symposium on VLSI, West Lafayette, Indiana, pp. 115-120, March 2001.
More detailed justification:– Tao Lin, Michael W. Beattie, Lawrence T. Pileggi, "On the
Efficacy of Simplified 2D On-Chip Inductance Models," pp.757, 39th Design Automation Conference (DAC'02), 2002
Outline Capacitance Extraction
– Introduction– Table based method– Formula based method
Inductance Extraction– Introduction– Table based method– Formula based method
RLC circuit model generation– Full model and normalized model– Inductance truncation via L-1 model
Finite element method (FEM) based Extraction– Overview of FEM– Frequency-independent extraction– Frequency-dependent extraction
Homework
Inductance Screening
Accurate modeling the inductance is expensive
Only include inductance effect when necessary
How to identify?
Off-chip Inductance screening
The error in prediction between RC and RLC representation will exceed 15% for a transmission line if
CL is the loading at the far end of the transmission line l is the length of the line with the characteristic impedance
Z0
oDRV
o
nZZZRl
Cl
12
CL
Conditions to Include Inductance
Based on the transmission line analysis, the condition for an interconnect of length l to consider inductance is
R, C, L are the per-unit-length resistance, capacitance and inductance values, respectively
tr is the rise time of the signal at the input of the circuit driving the interconnect
CL
Rl 2
LC2t r
On-chip Inductance Screening
Difference between on-chip inductance and off-chip inductance
– We need to consider the internal inductance for on-chip wires
– Due to the lack of ground planes or meshes on-chip, the mutual couplings between wires cover very long ranges and decrease very slowly with the increase of spacing.
– The inductance of on-chip wires is not scalable with length.
On-Chip Self Inductance Screening Rules
The delay and cross-talk errors without considering inductance might exceed 25% if
where fs = 0.34/tr is called the significant frequency
4)(2
281CL
DRVs
ZRlLlf
CL
Rl
Cl
On-Chip Mutual Inductance Screening Rules
Empirical rules (2x rule)– Most of the high-frequency components of an inductive
signal wire will return via its two quiet neighboring wires (which may be signal or ground) of at least equal width running in parallel
– The potential victim wires of an inductive aggressor (or a group of simultaneously switching aggressors) are those nearest neighboring wires with their total width equal to or less than twice the width of the aggressor (or the total width of the aggressors)
– Wires of reversed switching are more effective for current return compared to quiet wires
Matrix-based Inductance Sparsification/Screening
Capacitance Matrix Sparsification
– Capacitance is a local effect– Directly truncate off-diagonal small elements produces a
sparse matrix.– Guaranteed stability (no negative eigenvalue)
433810047.3309.3285.3342.83310042605134634.8548.3394.16
7.33013463047126923.619.249.23834.8512693047126327.875.33448.3323.611263304813402.83394.169.2427.8713402411
10C 12
Inductance Matrix Sparsification
L Matrix Sparsification
– Inductance is not a local effect– L matrix is not diagonal dominant– Directly truncating off-diagonal elements cannot guarantee
stability
11= 1010.8 8.51 7.22 6.45 5.90 5.47 5.138.51 10.8 8.51 7.22 6.45 5.90 5.477.22 8.51 10.8 8.51 7.22 6.45 5.906.45 7.22 8.51 10.8 8.51 7.22 6.455.90 6.45 7.22 8.51 10.8 8.51 7.225.47 5.90 6.45 7.22 8.51 10.8 8.515.13 5.47 5.90 6.45 7.22 8.51
L
,
10.8
Inductance Matrix Sparsification
Direct Truncation of 1L
1 11= 106.74 4.21 2.50 1.49 0.90 0.57 0.384.21 6.35 3.77 2.25 1.36 0.86 0.572.50 3.77 5.96 3.55 2.15 1.36 0.901.49 2.25 3.55 5.85 3.55 2.25 1.490.90 1.36 2.15 3.55 5.96 3.77 2.500.57 0.86 1.36 2.25 3.77 6.35 4.210.38 0.57 0.90 1.49 2.50 4.2
L
,
1 6.74
11= 1010.8 8.51 7.22 6.45 5.90 5.47 5.138.51 10.8 8.51 7.22 6.45 5.90 5.477.22 8.51 10.8 8.51 7.22 6.45 5.906.45 7.22 8.51 10.8 8.51 7.22 6.455.90 6.45 7.22 8.51 10.8 8.51 7.225.47 5.90 6.45 7.22 8.51 10.8 8.515.13 5.47 5.90 6.45 7.22 8.51
L
,
10.8
References
Original paper:– Devgan, A., Ji, H., and Dai, W. “How to efficiently capture on-
chip inductance effects: introducing a new circuit element K”. International Conference on Computer Aided Design (ICCAD), 2000.
Double Inversion:– Kaushik Roy, Cheng-Kok Koh, and Guoan Zhong, “On-chip
interconnect modeling by wire duplication “, ICCAD, 2002Simulator for k-element:
– Hao Ji, Anirudh Devgan and Wayne Dai, “KSim: a stable and efficient RKC simulator for capturing on-chip inductance effect ”. ASP-DAC '01.
Reading Assignment
[1] Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Lei He, “Clocktree RLC Extraction with Efficient Inductance Modeling”. DATE 2000
[2] Devgan, A., Ji, H., and Dai, W. “How to efficiently capture on-chip inductance effects: introducing a new circuit element K”. International Conference on Computer Aided Design, 2000.
[3] Yin, L and He, L. “An efficient analytical model of coupled on-chip RLC interconnects”. In Proceedings of the 2001 Asia and South Pacific Design Automation Conference (Yokohama, Japan). ASP-DAC 2001
Conclusions
Inductance is a long-range effect
Inductance can be extracted efficiently use PEEC model
Normalized RLC circuit model with a much reduced complexity can be used for buses
Full RLC circuit model should be used for random nets, and sparse inductance model may reduce circuit complexity
Outline Capacitance Extraction
– Introduction– Table based method– Formula based method
Inductance Extraction– Introduction– Table based method– Formula based method
RLC circuit model generation– RLC circuit model– Inductance screening
Finite element method (FEM) based Extraction– Introduction– frequency-independent RC– Frequency-dependent resistance and inductance
Homework
Overview of FEM
Boundary Value Problem Piece-wise Polynomial Approximation
Essence of FEM: Piece-wise approximation of a function by means of polynomials each defined over a small element and expressed as nodal values of the function.
FEM – Collocation method
BVP
Approximation onresidual form
• Collocation method1. Select m collocation points2. Let the residual be zero at
these points.
FEM - basis
Principal Attraction:– Approximation solutions can be found for problems that
cannot otherwise be solved, e.g., there is no closed form, or analytical solution.
FEM Advantages:– Applicable to any field problem.– No geometric restriction.– Boundary conditions not restricted.– Approximation is easily improved with more refined mesh.
FEM based Extraction Flow 3-D Capacitance extraction using FEM [FastCap, MIT92]
– Discretization of the charge on the surface of each conductor.(charge distributed evenly on each panel)
– Assign excitation voltage to one conductor at a time
– Form linear system P·q=v P – potential coefficient matrix q – charge vector v – potential vector
– Solve P·q=v for charge q on all conductor panels.
– Charge on excited conductor gives self capacitance.
– Charge on other conductors gives mutual capacitance.
FEM based Extraction Flow3-D Inductance Extraction using FEM
[fasthenry, MIT94]
Partition conductor into filaments (current distributed evenly)
• Ib is the current vector of b filaments• Vb is the branch voltage vector.• R is a diagonal matrix of filament dc resistances.• L is a matrix of partial inductance; li is a unit vector along the length of filament i; ai is the cross section area; Vi and V’j are the volumes of filaments i and j, respectively.
iii
i
lR
a
b bZ I =V( ) b bR jwL I V
4 i j
i jij V V
i j
l lL dV dV
a a r r
FEM based Extraction Flow
Set voltage source Vs1
Solve for the entries of Im associated with the source branches.
With voltage Vs1 and current Is1 at terminal of conductor, the impedance can be obtained:
: :
Tm b
Tb s m s
b b
KCL M I IKVL MV V MZM I VZ I V
Tm sMZM I V
• M – mesh matrix• Im – vector of mesh currents at mesh
loops. • Vs – vector of source branch voltages.
1 1s sZ V I R jwL
Inductance Calculation – from filament to wire
In order to catch the frequency-dependence, a wire can be divided into filaments, where current is assumed to be uniform in filaments.
For each filament, formulae can be used to get– Self-inductance– Mutual-inductance between it with any other filament.
Problem: how to get wire inductance with those of filaments?
Inductance Calculation – from filament to wire
Assume conductor Tk has P filaments, and Tm has Q filaments
Mutual Inductance
Self Inductance • If k=m, Lpkm is the self Lp for one conductor
1 1
QP
km iji i
Lp Lp
• Lpkm is the mutual inductance between conductor Tk and Tm
• Lpij is the mutual inductance between filament i of Tk and filament j of Tm
Reading Assignment
[1] K. Nabors and J. White, FastCap: A multipole accelerated 3-D capacitance extraction program, IEEE Trans. Computer-Aided Design, 10(11): 1447-1459, 1991.
[2] W. Shi, J. Liu, N. Kakani and T. Yu, A fast hierarchical algorithm for three-dimensional capacitance extraction, IEEE Trans. CAD, 21(3): 330-336, 2002
[3] M. Kamon, M. J. Tsuk, and J. K. White, “Fasthenry: a multipole-accelerated 3-D inductance extraction program,” IEEE Trans. Microwave Theory Tech., pp. 1750 - 1758, Sep 1994.
[4] http://www.rle.mit.edu/cpg/research_codes.htm (FastCap, FastHenry, FastImp)
Homework (due April 15)(1) Given three wires, each modeled by at least 2 filaments, find the 3x3 matrix for (frequency-independent) inductance between the 3 wires.
(2) Build the RC and RCL circuit models in SPICE netlist for the above wires. We assume that the ground plane has infinite size and is 10 um away for the purpose of capacitance calculation. (hint, use a matlab code to generate matrix and SPICE netlist)
(3) Assume a step function applied at end-end, compare the four waveforms at the far-end for the central wire using SPICE transient analysis for (a) RC and RLC models and (b) rising time is 10ps and 10ns, respectively.
W=4um, T=2um, l=60um, H=10um, Copper conductor:ρ = 0.0175mm2/m (room temperature), µ =1.256×10−6H/m, free space 0=8.85×10 -12F/mH
Tl
S S
W W W
l l
Step 1
Discretization and L calculation Discretize 3 wires into 6 filaments. For each filament, calculate its self-inductance with (e.g.)
For each pair of filament, calculate the mutual inductance with (e.g.)
2 1 ( )ln2 2 4
/ 2
self Ll l W TL
W T lW W
Tl
S S
W W W
l l
2ln 12mutual Ll l DL
D l
Filament 1Filament 6
• Different filaments and formulae may be used for better accuracy.
Step 2
Calculate inductance matrix of three wires
Mutual Inductance
Self Inductance • If k=m, Lpkm is the self Lp for one conductor
Tl
S S
W W W
ll
1 1
QP
km iji i
Lp Lp
• Lpkm is the mutual inductance between conductor Tk and Tm
• Lpij is the mutual inductance between filament i of Tk and filament j of Tm
• Lpij can be negative to denote the inverse current direction.
C1 and C5 equals to average of those for the following two cases:
• single wire over ground• three parallel wires over ground
Total cap below needs to be split into ground and coupling cap
Step 3
Capacitance Calculation
C1
C2
C3
C4
C5
})]()(227.1)(229.0[)(977.2{ 0398.0384.1232.0sh
st
sw
ht
hwC
Step 4
Resistance Calculation– ρ = 0.0175mm2/m– l is length of wire– A is area of wire’s cross section
Generate RC and RCL net-list for SPICE simulator. Compare their waveforms
lRA
Input
Output Suggested Input:VDD 1 0 PULSE(0 1 0 10ps)
time
volt
1
10ps 50ps
Accurate result
L matrix (three wires; Unit: H)
Capacitance (F)
C1
C2
C3
C4
C5
C1 C2 C3 C4 C52.8e-12 2.28e-14 1.3e-13 2.28e-14 2.8e-12
4.195 11 1.97 11 1.34 111.97 11 4.195 11 1.97 111.34 11 1.97 11 4.195 11
e e ee e ee e e
Waveform from different models
RC model RLC model