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Chapter 10 Chapter 10 BINARY ARITHMETIC, DECODING AND MUX LOGIC UNITS

Chap 10. Binary Arithmetic Decoding and Mux Logic Units

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Page 1: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Chapter 10Chapter 10

BINARY ARITHMETIC,

DECODING AND MUX LOGIC UNITS

Page 2: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 2

Lesson 4

Encoder

Page 3: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 3

Outline

• Encoder • 2 of 1 and 4 of 1 line encoder• 8 of 1 • 4 of 16 line encoder• Function specific encoders

Page 4: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 4

Encoder• An encoder is a circuit that converts

the binary information from one form to another.

• Gives a unique combination of outputs according to the information at a unique input at one-line (or at multiple lines).

Page 5: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 5

Encoder• Action of a one active line input

encoder is opposite of that of a one active line output decoder

• An encoder, which has multi-lines as the active inputs, is also called ‘priority encoder’. Encoder can be differentiated from decoder by greater number of inputs than outputs compared to the decoder.

Page 6: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 6

Application of an encoder as keypad (or keyboard) encoder

• Keypad has limited number of keys as in telephone or mobile

• Keyboard has many more keys• At an instant, when a key presses, the input

(or a set of inputs from multiple times key pressing) after an appropriate de-bouncing circuit applies an input (s)to encoder. The encoder generates an 8-bit ASCII code for given active input

Page 7: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 7

Example• Let us encode output 000 when addition

completes and activates an input A0, get an output 001 when subtraction completes and activates another input A1, and so on.

• Encoder can generate an outputs Y2Y1Y0 = 000 or 001 or 010 or 011 and so on depending on whether A0 = 1 or A1 = 1 or A2 = 1 or A3 = 1 and so on, respectively. Such an encoder circuit is called 2n to n line encoder

Page 8: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 8

Line Encoder• Assume that we have 2n combinations (one

combination reflecting one state of the input(s) on the n output lines These lines reflect one of 2n inputs that is active at an instance.

• 2n of 1 encoder with n-bit output lets us select using n-lines only one of the input among 2n. For example, we want to encode when the fifth motor of a robot rotates, which activates 5th input at encoder and which gives an output 0101 to reflect that state at the input lines.

Page 9: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 9

1 to n Encoder

• A circuit, which takes the 2n -bit input with only one bit = active and gives n-bit output

• Inactive input can be taken as tristate or 1 or 0

• Active input be taken as 1 or 0

Page 10: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 10

Outline

• Encoder • 2 of 1 and 4 of 1 line encoders• 8 of 1 line encoder• 4 of 16 line encoder• Function specific encoders

Page 11: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 11

2 of 1 Encoder with active 0 input

0 * 0

Inputs Output A0 A1 Y

* 0 1

* means tristate or 1

FA1A0

Page 12: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 12

2 of 1 Encoder with active 1 input

1 * 0

Inputs Output A0 A1 Y

* 1 1

* means tristate or 0

FA1A0

Page 13: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 13

4 of 1 Encoder with active 0 output

* * * 0 0 0

Inputs Outputs A3 A2 A1 A0 Y0 Y1

* means tristate or 1

A1A0

A2A3

Y0Y1

* * 0 * 0 1* 0 * * 1 00 * * * 1 1

Page 14: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 14

Outline

• Encoder • 2 of 1 and 4 of 1 line encoders• 8 of 1 line encoder• 4 of 16 line encoder• Function specific encoders

Page 15: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 15

8 of 1 Encoder with active 0 output

0 *** * 1 1 1

Inputs Outputs A7 ..... A0 Y2Y1Y0

.. .. .. ...

* means tristate or 1

...

A7

A0

Y0Y1Y2

* *** 0 0 0 0

Page 16: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 16

MSI 74148 —8 of 1 (8 line to 3 line) Encoder with one input and one

output control (enabling/disabling) pin

Y0

A0

OEG

Y1Y2

A7 ...

OE = 0enablethe output

G = 0meansenable the input

Page 17: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 17

Outline

• Encoder • 2 of 1 and 4 of 1 line encoders• 8 of 1 line encoder• 4 line of 16 line encoder • Function specific encoders

Page 18: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 18

16 of 1 (16 line to 4line) Encoder with one input and one output control

(enabling/disabling) pin

Y0

A0OE

G

Y1Y2

A15 ...

OE = 0meansenable the input

G = 0meansenable the input

Y3

Page 19: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 19

Outline

• Encoder • 2 of 1 and 4 of 1 line encoders• 8 of 1 line encoder• 4 of 16 line encoder• Function specific encoders

(Priority Encoder)

Page 20: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 20

BCD 10 of 1 bit Priority encoder

MSIIC 74147

A9A7A8A7A6A5A4A3A2A1A0

Y0

Y3

Y1Y2

Y0

BCD

Active means 0Inactive means 1. Output 1111 when none 0

Page 21: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 21

Octal of 1 bit Priority encoder

MSIIC

A7A6A5A4A3A2A1A0

Y0

Y3

Y1Y2

Y0

BCD

Active means 1Inactive means 0

Page 22: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 22

Hexadecimal of 1 bit Priority encoder

MSIIC

A15 ....A0

Y0

Y3

Y1Y2

Y0

Hexadecima Active means 1Inactive means 0

.

.

.

Page 23: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 23

Multi-line Priority encoderY3Y2Y1Y0

Y0

e

bc

a

gActive means 0Inactive means 1

d

f

i

h

Page 24: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 24

Summary

Page 25: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 25

Encoder

• Line Encoder has one active input pin among 2n input pins and has n outputs to enable circuit to select corresponding input.

• Specific function priority encoder gives set of n-output bits as per the active set of minput pins among 2n pins at input

Page 26: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 26

Encoder

• An encoder can have inactive inputs in tristate and active input as 0 or 1

• An encoder can have control gate pin(s) for input enable

• An encoder can have control gate pin(s) for output enable

Page 27: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 27

End of Lesson 4 on

Encoder

Page 28: Chap 10. Binary Arithmetic Decoding and Mux Logic Units

Ch10L4-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 28

THANK YOU