CH.3

Floating Point Hardware and Algorithms

05/04/23

1

Review

05/04/23

2

Adder gate level diagramAdder Verilog moduleProcessing Verilog files using Icarus Verilog Simulation verilog module definition using

vvp Floating point representation

Adder Circuit

05/04/23

3

Adder (a,b,cin) s, couts = ?cout = ?

Processing Verilog File

05/04/23

4

Icarus Verilog, vvp are the tools available on cse machines

Icarus Verilog compiler: iverilog iverilog is a compiler that translates Verilog source

code into executable programs for simulation, or other netlist formats for further processing. The currently supported targets are vvp for simulation

vvp is the run time engine that executes the default compiled form generated by Icarus Verilog. The output from the iverilog command is not by itself executable on any plat form. Instead, the vvp program is invoked to execute the generated output file.

Using the Verilog Compiler and Runtime

05/04/23

5

Design your Verilog module according to the specification given For adder, lets say we have saved the verilog module design

in “adder.v”Compile the module definition into a form that

can be executed by vvp runtime. iverilog -o adder adder.v Output of iverilog command is stored in file “adder”

Run the code to check the output, that is typically generated by the tester code. vvp adder

You will see the output on the screenYou can also capture into a file to submit it or

print it.

Floating point numbers

05/04/23

6

Why do we need them?To represent very large number and very small

number.To represent a larger range of number with a given

size in bits.Consider a 4 bit containerConsider a 8 bit containerExamples: An astronautical unit (Au)is the distance

between the earth and the sun in meters.150,000,000,000 metersSize of Helium atom: 1 angstrom: 10-10 metersSee more details on units of measurement here

FP Representation

05/04/23

7

S Exponent Fraction

Value = (-1)S X F X 2 E

32 bit single precision64 bit double precisionIEEE 754 format

FP Addition and Multiplication

05/04/23

8

Components: operands, ALU, control, comparison, shifters, normalize, round

ControlALUsFigures: 3.17, 3.16, 3.18

Nothing is simple (IEEE 754)

Consider the representation of real number.Eg.: -56.731 or -0.4539Lets see how we can go from this human

readable form to IEEE 754 Goals: you want to represent as large a range as

possible You want to include features that will optimize

processingExponent, fraction, sign of exponent, sign of

fraction -56.731 or -0.4539 -0.56731 X 102 -0.4539 X 100

05/04/23

9

0 2 1 56731

Binary Representation

Now lets look at binary representationEg. 0.00001010 X 23 -0.0000000 X 2-4 How will you add these numbers?How will you multiply these?When you answer these questions, you find that it

will help to have the numbers in (i) fractional form, (ii) normalized, and (iii) exponents mapped to a positive range by adding a bias.

Also it is possible to represent a larger range by implying the leading 1 in the normalized fraction and a single zero.

05/04/23

10

IEE754 Format

A floating point number will be represented by a normalized fraction with implied leading 1, biased exponent mapped onto a positive range (no sig needed) and only sign bit is for the entire number.

In other words:Fp = (S, fraction, biased E) is equivalent(-1)S X (1 + fraction) X 2 (E-bias)

Hwk4: 3.42, 3.44 Due: 2/25

05/04/23

11

Floating Point Operation: Addition

Now lets look at floating point arithmetic unit. We will examine only addition.

05/04/23

12