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EECE695D(POSTECH) Oversampling Analog Circuits
CH05
Bandpass Delta-Sigma Modulation
1
Advantage of delta-sigma modulator
Simplified anti-aliasing filtering
Inherent linearity
Robust operation
Low power consumption
Disadvantage of delta-sigma modulator
Very high sampling frequency
EECE695D(POSTECH) Oversampling Analog Circuits
2
5.1 the need for Bandpass and Quadrature Modulation
In the RF communication system,
Want to eliminate analog components as much as possible
Want to convert into digital at as early stage as possible
Want to convert into digital at the mixer output (IF+baseband)
Difficult with the Nyquist rate ADC because of high IF freq
a bandpass delta-sigma modulator ADC suitable for this
EECE695D(POSTECH) Oversampling Analog Circuits
3
Bandpass delta-sigma modulator ADC can perform
IF filtering
In-phase and quadrature-phase separation
High-accuracy AD conversion
EECE695D(POSTECH) Oversampling Analog Circuits
4
EECE695D(POSTECH) Oversampling Analog Circuits
Bandpass delta-sigma modulator ADC used in comm system
5
EECE695D(POSTECH) Oversampling Analog Circuits
Sampling lowpass signal
BW=5MHz, fS >= 10MHz (Nyquist rate) to avoid aliasing
EECE695D(POSTECH) Oversampling Analog Circuits
Sampling Bandpass signal (1/5)
Center frequency fC=20MHz, BW=5MHz,
fS = 17.5MHz (~ half Nyquist rate)
Understanding Digital Signal Processing: Periodic Sampling, By Richard G. Lyons
Sampling Bandpass signal (2/5)
To avoid aliasing, the sampling frequency Fs must satisfy
fC+0.5BfC-0.5B-fC+0.5B-fC-0.5B
-fC+0.5B+m*fC -fC-0.5B+(m+1)*fC
-fC+0.5B+m*FS <= fC-0.5B AND -fC-0.5B+(m+1)*FS >= fC+0.5B
(2 fC + B) / (m+1) <= FS <= (2 fC - B) / mfor integer m
EECE695D(POSTECH) Oversampling Analog Circuits
Sampling Bandpass signal (3/5)
m * FS <= 2 fC – BW (m+1) * FS >= 2 fC + BW
(2 fC + BW) / (m+1) <= FS <= (2 fC - BW) / m
fC=20MHz, BW=5MHz
fS = (2 fC - BW) / 6
fS < (2 fC - BW) / 6
fS = (2 fC + BW) / 7
Understanding Digital Signal Processing: Periodic Sampling, By Richard G. Lyons
EECE695D(POSTECH) Oversampling Analog Circuits
Sampling Bandpass signal (4/5)
(2 fC + BW) / (m+1) <= fS <= (2 fC - BW) / m fC=20MHz, BW=5MHz
for m = 0, 45MHz <= fS <= infinity
m = 1, 22.5MHz <= fS <= 35 MHz
m = 2, 15MHz <= fS <= 17.5 MHz
m = 3, 11.25MHz <= fS <= 11.67 MHz
m = 4, 9MHz <= fS <= 8.75 MHz X
m = 5, 7.5MHz <= fS <= 7 MHz X
m = 6, 6.43MHz <= fS <= 5.83 MHz X
Allowed frequency bands: [11.25M, 11.67M], [15M, 17.5M], [22.5M, 35M], [45M,inf ]
22.5M17.5M-17.5M-22.5M
Understanding Digital Signal Processing: Periodic Sampling, By Richard G. Lyons
EECE695D(POSTECH) Oversampling Analog Circuits
for m = 0, 45MHz <= fS <= infinity
m = 1, 22.5MHz <= fS <= 35 MHz
m = 2, 15MHz <= fS <= 17.5 MHz
m = 3, 11.25MHz <= fS <= 11.67 MHz
m = 4, 9MHz <= fS <= 8.75 MHz X
m = 5, 7.5MHz <= fS <= 7 MHz X
m = 6, 6.43MHz <= fS <= 5.83 MHz X
Sampling Bandpass signal (5/5)
Understanding Digital Signal Processing: Periodic Sampling, By Richard G. Lyons
EECE695D(POSTECH) Oversampling Analog Circuits
Bandpass delta-sigma modulator
The quantization noise stop band is centered at a non-
zero frequency, such as Fs / 4
EECE695D(POSTECH) Oversampling Analog Circuits
Advantage of Bandpass delta-sigma modulator
Eliminates the analog down conversion operations
Keep the noise shaping capability
More efficient in circuit level : Narrow band is easier to
handle than wideband
(conversion range [fc-fB/2, fc+fB/2] rather than [0, fc+fB/2])
13
EECE695D(POSTECH) Oversampling Analog Circuits
NTF poles and zeros
LP DSM: zeros at DC(z=1) or close to DC on unit circle
BP DSM: zeros at rather high frequency (eg. Fs/4, z=+- j )
Minimum sample rate at the output of decimation filter:
2 fB (Fs/OSR, LP DSM), slightly > 2fB(BP DSM)
OSR = Fs / (2 fB) defined for both LP & BP DSM
14
EECE695D(POSTECH) Oversampling Analog Circuits
NTF for BP DSM : 1+z-2 (zeros at z=+- j)
NTF for LP DSM : 1- z-1 (zeros at z=1)
If we replace z-1 in LP DSM by –z-2 ,
we can implement a 2nd order BP DSM.
+
+
+
+
++
2nd order BP DSM, STF(z) = NTF(z) =
+
+
+
EECE695D(POSTECH) Oversampling Analog Circuits
2nd order BP DSM
STF(z) = 1
NTF(z) = 1+z-2 (zeros at z=+- j (+- Fs/4))
+
+
+
EECE695D(POSTECH) Oversampling Analog Circuits% BPDSM2 2nd order bandpass DSM% Fs Sampling frequency % t Time vector % T Sample time % L Length of signal Fs = 1024; T = 1/Fs; L = 100 * Fs; t = (0:L-1)*T; u= 1.0 * sin (2 * pi * 266.234411 * t); v(1:L)=0.0; y(1:L)=0.0; y1_prev=0.0; y2_prev=0.0; v1_prev=0.0; v2_prev=0.0; %u1_prev=u(1); u2_prev=u(1);for i = 1: L
y(i) = u(i) - y2_prev + v2_prev;% y(i) = u2_prev - y2_prev + v2_prev;if ( y(i) > 0.0) v(i)=1; else v(i)=-1; endy2_prev=y1_prev; y1_prev=y(i); v2_prev=v1_prev; v1_prev=v(i);%u2_prev=u1_prev; u1_prev=u(i);
end%% Power spectrum density % FFT % hanning windoww=0.5*(1-cos(2*pi*(0:L-1)/L)); Ptot = (abs(fft(v(1:L).*w))).^2; Pdb = 10*log10( Ptot/max(Ptot(10:L/2))); P_avg = smooth(Pdb, 64); % subplot(1,2,1); plot(linspace(0, Fs/2, L/2), Pdb(1:L/2)); grid on; axis([0,Fs/2,-150,0]);title('Pout vs. Freq(Windowed)'); ylabel('Pout, [dB]'); xlabel('Frequency, [Hz]'); subplot(1,2,2); semilogx(linspace(0, Fs/2, L/4), Pdb(L/4:L/2-1)); grid on; axis([1e-2,512,-150,0])title('Averaged Pout (Windowed)'); ylabel('Pout, [dB]'); xlabel('Frequency-256, [Hz]');
EECE695D(POSTECH) Oversampling Analog Circuits2nd order bandpass DSM
+20dB/dec
EECE695D(POSTECH) Oversampling Analog Circuits2nd order LP DSM & 4th order BP DSM (G1=G2=1)
Design of Bandpass Delta-Sigma Modulators: R. Jacob Baker and Vishal Saxena
EECE695D(POSTECH) Oversampling Analog Circuits4th order BP DSM (G1=G2=1)
Design of Bandpass Delta-Sigma Modulators: R. Jacob Baker and Vishal Saxena
EECE695D(POSTECH) Oversampling Analog Circuits4th order BP DSM (G1=G2=1)
+40dB/dec
% BPDSM4 4th order bandpass DSM% Fs Sampling frequency % t Time vector % T Sample time % L Length of% signal
Fs = 1024; T = 1/Fs; L = 1000 * Fs; t = (0:L-1)*T; u= 1.0 * sin (2 * pi * 266.267314 * t); v(1:L)=0.0; y(1:L)=0.0; x(1:L)=0; x_p1=0; x_p2=0; y_p1=0; y_p2=0; v_p1=0; v_p2=0;for i = 1: L
y(i) = (x_p2-v_p2)*(-1) - y_p2;if ( y(i) > 0.0) v(i)=1; else v(i)=-1; endx(i)=u(i)-v(i)-x_p2;x_p2=x_p1; x_p1=x(i); y_p2=y_p1; y_p1=y(i); v_p2=v_p1; v_p1=v(i);
end%% Power spectrum density % FFT % hanning windoww=0.5*(1-cos(2*pi*(0:L-1)/L)); Ptot = (abs(fft(v(1:L).*w))).^2; Pdb = 10*log10( Ptot/max(Ptot(10:L/2))); P_avg = smooth(Pdb, 64); % subplot(1,2,1); plot(linspace(0, Fs/2, L/2), Pdb(1:L/2)); grid on; axis([0,Fs/2,-150,0]);title('Pout vs. Freq(Windowed)'); ylabel('Pout, [dB]'); xlabel('Frequency, [Hz]'); subplot(1,2,2); semilogx(linspace(0, Fs/2, L/4), Pdb(L/4:L/2-1)); grid on; axis([1e-2,512,-220,0])title('Pout (Windowed)'); ylabel('Pout, [dB]'); xlabel('Frequency-256, [Hz]');
EECE695D(POSTECH) Oversampling Analog CircuitsComparison: 2nd & 4th order BP DSM (G1=G2=1)
2nd: +20dB/dec,
4th: +40dB/dec
% BPDSM24 : Comparison between 2nd & 4th order bandpass DSM% Fs Sampling frequency % t Time vector % T Sample time % L Length of signal Fs = 1024; T = 1/Fs; L = 1000 * Fs; t = (0:L-1)*T; u= 1.0 * sin (2 * pi * 266.267314 * t); v(1:L)=0.0; y(1:L)=0.0; x(1:L)=0; x_p1=0; x_p2=0; y_p1=0; y_p2=0; v_p1=0; v_p2=0;for i = 1: L
y(i) = (x_p2-v_p2)*(-1) - y_p2;if ( y(i) > 0.0) v(i)=1; else v(i)=-1; endx(i)=u(i)-v(i)-x_p2;x_p2=x_p1; x_p1=x(i); y_p2=y_p1; y_p1=y(i); v_p2=v_p1; v_p1=v(i);
end%% Power spectrum density % FFT % hanning windoww=0.5*(1-cos(2*pi*(0:L-1)/L)); Ptot = (abs(fft(v(1:L).*w))).^2; Pdb4th = 10*log10( Ptot/max(Ptot(10:L/2))); P_avg4th = smooth(Pdb4th, 64); v(1:L)=0.0; y(1:L)=0.0; y1_prev=0.0; y2_prev=0.0; v1_prev=0.0; v2_prev=0.0; %u1_prev=u(1); u2_prev=u(1);for i = 1: L
y(i) = u(i) - y2_prev + v2_prev;% y(i) = u2_prev - y2_prev + v2_prev;if ( y(i) > 0.0) v(i)=1; else v(i)=-1; endy2_prev=y1_prev; y1_prev=y(i); v2_prev=v1_prev; v1_prev=v(i);%u2_prev=u1_prev; u1_prev=u(i);
endw=0.5*(1-cos(2*pi*(0:L-1)/L)); Ptot = (abs(fft(v(1:L).*w))).^2; Pdb2nd = 10*log10( Ptot/max(Ptot(10:L/2))); P_avg2nd = smooth(Pdb, 64); fp = linspace(10, Fs/2, L/2);subplot(1,2,1); plot(fp,Pdb2nd(1:L/2),'b', fp, Pdb4th(1:L/2), 'k'); grid on; axis([0,Fs/2,-220,0]);title('Pout 2nd:blue 4th:black(Windowed)'); ylabel('Pout, [dB]'); xlabel('Frequency, [Hz]'); fp = linspace(0, Fs/2, L/4);subplot(1,2,2); semilogx(fp, Pdb2nd(L/4:L/2-1), 'b',fp, Pdb4th(L/4:L/2-1), 'k' ); grid on; axis([1e-2,512,-220,0])title('Pout 2nd:blue 4th:black(Windowed)'); ylabel('Pout, [dB]'); xlabel('Frequency-256, [Hz]')
EECE695D(POSTECH) Oversampling Analog Circuits
Design of Bandpass Delta-Sigma Modulators: R. Jacob Baker and Vishal Saxena
Gc: comparator gain (required)
4th order BP DSM
EECE695D(POSTECH) Oversampling Analog Circuits
An example BP DSM (A GSM example)
IF frequency 10MHz,
Carrier(uplink: 933~960MHz, downnlink: 890~915MHz)
Signal band 200kHz (eg. [10M-0.1M, 10M+0.1M] )
Sampling frequency(Fs) 40MHz
OSR = 40MHz / (2 * 200kHz) = 100
A 3rd order binary LP DSM with OSR=100 SQNR=100dB
A 6th order BP DSM with OSR=100 the same SQNR
The lowest frequency that can be aliased into signal band
39.8MHz in LP DSM 199x fB trivial to design an anti-aliasing filter
29.9MHz in BP DSM 3x max freq needs a BPF for anti-aliasing,
Anti-aliasing filter not necessary with the continuous time loop filter (NO SAMPLING)27
EECE695D(POSTECH) Oversampling Analog Circuits
5.2 Bandpass NTF selectionFo: center frequency, Fs: sampling frequency, Fb; signal bandwidth
(1) If Fo & Fb : fixed Large Fs preferred (Large OSR Large SQNR)
easy to design an anti-aliasing filter between Fo & Fs
(2) If Fb is fixed small Fo preferred (easy anti-aliasing, improve noise
shaping, but the low frequency noise limits min Fo,
(3) Fo=Fs/4(a rational) simplifies the decimation filter design
28
EECE695D(POSTECH) Oversampling Analog Circuits
6th order Bandpass DSMFo = Fs / 6 , OSR=32 (Fb = Fs/32), NTF out-of-band gain = 2
29
EECE695D(POSTECH) Oversampling Analog Circuits
30
EECE695D(POSTECH) Oversampling Analog Circuits
31
EECE695D(POSTECH) Oversampling Analog Circuits
32
EECE695D(POSTECH) Oversampling Analog Circuits
5.2.1 Pseudo N-path transformation
33
EECE695D(POSTECH) Oversampling Analog Circuits
Transformation(1) z -z : LPF HPF, HPFLPF
TT)( TwjTwjTj eee
0
TT
5.0 5.0 5.10 2
z -z11
1 ze aT HPF
34
as 1
11
1 ze aT
LPF
Transfer function Impulse response Impulse response Transfer function
EECE695D(POSTECH) Oversampling Analog Circuits
Transformation(1) z -z2 : pseudo 2-path transformation
mT
T 22)22( mTwjTj ee
0
0
TT
2/
z -z2
21
1 z
11
1 z
Integrator
mag )cos(
5.0
T resonator
LPF BPF, HPF BRF, Integrator resonator
35
EECE695D(POSTECH) Oversampling Analog Circuits
Transformation
(1) z z2 : 2-path transformation
mT
T 2)22( mTwjTj ee
0
TT0
5.0
11
1 ze aT
LPF
2
z z2
36
EECE695D(POSTECH) Oversampling Analog Circuits
5.2.1 Pseudo N-path transformationz -z2 : order-n highpass NTF order-2n band-reject NTF
n zeros near z=1 n zeros near z=j
n zeros near z=-j
z -z2 : NTF1(z)=(1-z-1)n NTF2(z)=(1+z-2)n
n zeros near z=1 n zeros near z=j
n zeros near z=-j
NTF2(z) has the same gain and frequency profile as NTF1(z),
but compressed by a factor of 2 in frequency and replicated.
37
EECE695D(POSTECH) Oversampling Analog Circuits
5.2.1 Pseudo N-path transformation
1
2
3
4
1
2 343
1
mT
T 22
2
3
41
2
3
4
3 4
1
2 3 4
1
2 3
38
2 - path
EECE695D(POSTECH) Oversampling Analog Circuits
Design of Bandpass Delta-Sigma Modulators: R. Jacob Baker and Vishal Saxena
Polyphase filter to implement BP DSM
EECE695D(POSTECH) Oversampling Analog Circuits
5.2.1 Pseudo N-path transformation
STF(z) = 1
NTF(z) = 1 + z-2
| NTF | = 2 | cos(wT) | BRF 40
EECE695D(POSTECH) Oversampling Analog Circuits
EECE630, K.J.Ray Liu, Min Wu, University of Maryland, College Park
EECE695D(POSTECH) Oversampling Analog Circuits
EECE630, K.J.Ray Liu, Min Wu, University of Maryland, College Park
EECE695D(POSTECH) Oversampling Analog Circuits
EECE630, K.J.Ray Liu, Min Wu, University of Maryland, College Park
EECE695D(POSTECH) Oversampling Analog Circuits
EECE630, K.J.Ray Liu, Min Wu, University of Maryland, College Park
EECE695D(POSTECH) Oversampling Analog Circuits
EECE630, K.J.Ray Liu, Min Wu, University of Maryland, College Park
EECE695D(POSTECH) Oversampling Analog Circuits
Design of Bandpass Delta-Sigma Modulators: R. Jacob Baker and Vishal Saxena
Polyphase implementation: lowers the ckt operating speed
EECE695D(POSTECH) Oversampling Analog Circuits
5.2.1 Pseudo 2-path transformation
Two methods for the pseudo 2-path transformation
(1) Apply z -z2 transform to H(z), and then synthesize
the resultant transfer function H’(z)
(2) Replace a delay block(z-1) in circuit by a series
connection of two delay blocks and an inversion
(-z-2)
47
EECE695D(POSTECH) Oversampling Analog Circuits
Apply z -z2 to MOD1(2) Replace a delay block(z-1) in circuit by a series connection of two delay blocks and an
inversion (-z-2)
48
EECE695D(POSTECH) Oversampling Analog Circuits
Polyphase filter to implement BP DSM
EECE695D(POSTECH) Oversampling Analog Circuits
5.3 Architecture for bandpass delta-sigma modulator
Low-pass DSM
50
EECE695D(POSTECH) Oversampling Analog Circuits
Low-pass DSM
x1x4
x2x3
If output taken from x1 & x3 instead of from x2 & x4
LP DSM BP DSM
______
51
IEEE JSSC vol.32, NO. 12, DECEMBER 1997, pp.1935, Quadrature Bandpass DSM for Digital Radio, Stephen A. Jantzi et al.
EECE695D(POSTECH) Oversampling Analog Circuits
Bandpass DSM
EECE695D(POSTECH) Oversampling Analog Circuits
x2x1
V
Resonator: Assume g1=1
20
2
20
0
2
sU
X
V20
2
02201
0
2
s
saa
V
X
U
20
2
0
0
1
s
s
U
X
V
20
2
01202
0
1
s
saa
V
X
U 53
EECE695D(POSTECH) Oversampling Analog Circuits
5.3.1 Topology choices
Loop filter for BP DSM
4 x DAC(a1, a2, a3, a4)
)()( 220
2
20
2
sAs
sSTF
)()(
)(22
02
220
2
sAs
sNTF
BPF BRF
40432
3014
20
203
3 )()()()( aaasaasassA 54
EECE695D(POSTECH) Oversampling Analog Circuits
5.3.1 Topology choices
55
EECE695D(POSTECH) Oversampling Analog Circuits
5.3.1 Topology choices
56
EECE695D(POSTECH) Oversampling Analog Circuits
5.3.2 Resonator implementations
(1) Bandpass DSM needs resonators, a LP DSM needs integrators
(2) Finite quality factor(Q) of resonator degrades performance, as the
finite OP amp gain degrades performance in LP DSM
(3) Q must be high (Q >> f0 / fb)
57
EECE695D(POSTECH) Oversampling Analog Circuits
5.3.2 Resonator implementations
Switched capacitor implementation of resonator using LDI loop
( LDI: lossless discrete integrator)
58
EECE695D(POSTECH) Oversampling Analog Circuits
Resonator implemented with LDI loop
Poles of characteristic equation: on the unit circle
Q is infinite (limited by OP amp gain)
Q > 100 easily obtained)5.01(cos 1 gp 59
EECE695D(POSTECH) Oversampling Analog Circuits
Is this LDI ?
60
DDI versus LDI (1/2)EECE695D(POSTECH) Oversampling Analog Circuits
U.C.Berkeley 61
EECE695D(POSTECH) Oversampling Analog Circuits
U.C.Berkeley
DDI versus LDI (2/2)
U.C.Berkeley 62
EECE695D(POSTECH) Oversampling Analog Circuits
Gm-C resonator
LG = - {Gm / (sC) }2
Vout / Vin = +(Gm1/sC)*(Gm/(sC) / [ 1 + {Gm / (sC) }2
= {( Gm1 * Gm ) / C2} / { s2 + wo2 }
Resonance frequency wo = Gm/C
wo 30% variableneeds tuning
Finite Rout of amp &
delay of transconductor
limits Q
63
EECE695D(POSTECH) Oversampling Analog Circuits
Active RC resonatorResonance frequency wo = 1/(RC)
wo variableneeds tuning
LG = -1/(sRC)2
64
EECE695D(POSTECH) Oversampling Analog Circuits
LC resonatorResonance frequency wo = 1/sqrt(LC)
On-chip inductor : a few nH must operate at multi GHz
Discrete inductor : tolerance 2% Q > 50
Discrete capacitor: tighter tolerance, larger Q than inductor
LC tank low noise, low distortion, low power
65
EECE695D(POSTECH) Oversampling Analog Circuits
Fig. 5-25 : NTF at signal band > 50dB
IF 273MHz, LO 269 MHz, CLK 32MHz
66
EECE695D(POSTECH) Oversampling Analog Circuits
Fig. 5-25 :
67
EECE695D(POSTECH) Oversampling Analog Circuits
Fig. 5-25 :
68
EECE695D(POSTECH) Oversampling Analog Circuits