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Ch. 4 Boolean Algebra and Logic Gates
Boolean Algebra Basic Identities and DeMorgan’s TheoremBoolean Algebraic Equations
Sum of ProductProduct of Sum
Logic GatesAND, OR, NOTNAND, NOR, XOR, XNOR
Other Basic ConceptsPropagation Delay Time, Power Dissipation, Noise MarginFan In / Fan Out
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Boolean Algebra 논리 연산을 다루는 수학적인 논리 이론 (영국 수학자 George Boole, 1854년)Basic Identities of Boolean Algebra : Table 4-3
Commutative Law (교환법칙)Associative Law (결합법칙)Distributive Law (배분법칙)DeMorgan’s Theorem
3
4
Multiplication by Boolean Algebra : AND Operation 0 · 0 = ?0 · 1 = ?1 · 0 = ?1 · 1 = ?
5
AND OperationCheck : X = A · B
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Addition by Boolean Algebra : OR Operation 0 + 0 = ?0 + 1 = ?1 + 0 = ?1 + 1 = ?
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OR OperationCheck : X = A + B
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Inverter : NOT Operation
0 ?1 ?
?X A
=
=
=
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Example 4.1, p57
( )Z Y X Y= +
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Example 4.2, p58DeMorgan’s Theorem ?
?
X Y X Y
X Y X Y
+ =
= +
i
i
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Example 4.3, p59
( ) ( ) ?
(1 )
(1 )
X Y X Z X YZXX XZ XY YZX XZ XY YZX XY XZ YZX Y XZ YZX XZ YZX Z YZX YZ
+ + = +
= + + += + + += + + += + + += + += + += +
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Example 4.4, p60
?XY YZ XZ XY YZ+ + = +
(1 ) (1 )
( )
XY YZ XY Z YZ XXY XYZ YZ YZXXY YZ XZY XZYXY YZ XZ Y YXY YZ XZ
+ = + + +
= + + +
= + + +
= + + +
= + +
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Duality : Table 4-4Boolean Function
0 11 0OR (+) AND (·)AND (·) OR (+)Logic variable : No change
1 1 0 0X X+ = → =i
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Inverting of a Boolean Function0 11 0OR (+) AND (·)AND (·) OR (+)Logic variable Inverting
(ex.1) (ex.2) p61
1 100
X XX
+ =
==
ii
Inverting of 1 X+
( ) ( )( ) ( )
1 1
1
0
X Y Z X Y Z
X Y Z
X Y Z
+ =
= + +
= + +
i i i i i
i
i
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(Ex. 4.5) p61
(Ex. 4.6) p62
?WX YZ+ =
( ) ( ) ?A B C A B C+ + + + =i
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Boolean Algebraic Functions (or Equations)Truth TableSum of ProductProduct of Sum
Truth Table(Ex. 4.7) p63
Assign variables for three doors : A, B, CState 1 : Turn on the lightState 0 : Turn off the lightTotal 8 ( ) casesTurn on the light when at least two doors have been closed.
32=
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Truth Table for Ex. 4.7 : Table 4-6
Input Output
0 0 0 0 0
1 0 0 1 0
2 0 1 0 0
3 0 1 1 1
4 1 0 0 0
5 1 0 1 1
6 1 1 0 1
17 1 1 1
Cases
CA B D
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Boolean Algebraic Function by the Sum of Product FormInput Output Minterms
0 0 0 0 0
1 0 0 1 0
2 0 1 0 0
3 0 1 1 1
4 1 0 0 0
5 1 0 1 1
6 1 1 0 1
17 1 1 1
Cases
CA B DABCABCABCABCABCABCABCABC
D ABC ABC ABC ABC= + + +
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Simplification of Boolean FunctionsUsing Table 4-3
(Ex. 4.8) p64~65Truth Table : Table 4-8
( ) ( ) ( )( ) ( ) ( )
( )
D ABC ABC ABC ABCABC ABC ABC ABC ABC ABC X X XA A BC AC B B AB C C
BC AC ABC A B AB
= + + +
= + + + + + ← + =
= + + + + += + += + +
( ) ( )
( )
A XYZ XYZ XYZ XYZXZ Y Y XZ Y YXZ XZX X Z
Z
= + + +
= + + +
= +
= +
=
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Boolean Algebraic Function by the Product of Sum FormInput Output Maxterms
0 0 0 0 0
1 0 0 1 0
2 0 1 0 0
3 0 1 1 1
4 1 0 0 0
5 1 0 1 1
6 1 1 0 1
17 1 1 1
Cases
CA B DA B C+ +A B C+ +
A B C+ +A B C+ +A B C+ +A B C+ +
A B C+ +A B C+ +
( )( )( )( )D A B C A B C A B C A B C= + + + + + + + +
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Simplification of Boolean FunctionsUsing Table 4-3
( )( )( )( )
( )( )( )( )
( ) ( ) ( ) ( )
( )
D A B C A B C A B C A B C
D A B C A B C A B C A B C
A B C A B C A B C A B C
ABC ABC ABC ABCABC ABC ABC ABCAB C C ABC ABCAB ABC ABC
= + + + + + + + +
= + + + + + + + +
= + + + + + + + + + + +
= + + +
= + + +
= + + +
= + +
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( ) , by Sum of ProductD C A B AB= + +∵
( )( )( )( )( )( )( ) (1 )( )( ) (1 )( )( )
( 1)
( )(
D AB ABC ABCA B A B C A B CAA AB AC BA BB BC A B CA AB AC AB BC A B C A B B AA AC BC A B C A C AA BC A B C
AA AB AC BCA BCB BCCAB AC BCA BC BC A BCAB AC BCAB A B CC
= + +
= + + + + +
= + + + + + + +
= + + + + + + ← + + =
= + + + + ← + =
= + + +
= + + + + +
= + + + ← + == + += + += )A B AB+ +
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Logic Gates하나 또는 그 이상의 입력신호가 출력신호를 야기하도록 작동하는 전자회로
AND, OR, NOT, NAND, NOR, XOR, XNOR
AND, OR, NOT gates
24
Graphic Symbols of AND, OR, NOT gates
25
Multi-Input Symbols of AND, OR gates
26
Electrical Analogy of AND, OR, NOT gatesTR (Transistor) as a Switching DeviceResistor
27
IC (Integrated Circuit) Chips – AND gates
74LS08 74HC11 74HC21
28
Physical View of IC (Integrated Circuit) Chips
29
Applications of AND gates
30
Applications of AND gates
31
Implementation and Evaluation by Experiments
32
IC (Integrated Circuit) Chips – OR, NOT gates
74LS32 7404 4049
33
Applications of OR gates
34
Other Gates, p69NANDNORXORXNOR
35
NAND and NOR Gates
36
Applications of NAND gateNOT gate operation
37
Applications of NAND gateAND gate operation
38
Applications of NAND gateOR gate operation
39
Applications of NAND gateWith a Control input
40
Applications of NOR gate
41
Applications of XOR gateUseful Identities
Parity Generation and Checking
0 10 1
( ) ( )
X X X XX X X X
X Y X Y X Y X YA B B AA B C A B C
⊕ = ⊕ =
⊕ = ⊕ =
⊕ = ⊕ ⊕ = ⊕⊕ = ⊕⊕ ⊕ = ⊕ ⊕
42
Other Basic ConceptsPropagation Delay TimePower DissipationNoise MarginFan In / Fan Out
Propagation Delay Time Fig. 4-15Dependant on the serial connections of logic gates
( )D ABC ABC ABC ABC
C A B AB= + + += + +
43
Power Dissipation(Ex. 4.10) Average power dissipation
Noise MarginFig. 4-16
2
AVR CC CC
CCH CCLCC
P V I
I II n
=
+⎛ ⎞= ⎜ ⎟⎝ ⎠
44
Fan In / Fan Out
45
Homework, Pages 83~841-(2)23-(4)678