特別講演ユビキタス･エレクトロニクスに向けた …semicon.jeita.or.jp/STRJ/STRJ/2004/3C_STRJ_WS050303...3 ye ar s DSP x 1 . 4 / 3 y e a r s Processors published

T.SakuraiWork in Progress - Do not publish STRJ WS: March 3, 2005, 1

2005/3/3 STRJワークショップ 10:00 - 10:40

ITRS 2004 Updateに見る今後のLSI技術の方向性

特別講演ユビキタス･エレクトロニクスに向けた

低消費電力設計技術と有機トランジスタ回路

Takayasu SakuraiCenter for Collaborative Research,

University of TokyoE-mail: [email protected]://lowpower.iis.u-tokyo.ac.jp/


Power is a stumbling block to Moore’s lawPo

wer

per

chi

p [W

]

1980 1985 1990 1995 20000.01

0.1

1

10

100

1000

Year

MPU

x4 / 3

years

DSP

x1.4 / 3 years

Processors published in ISSCC

2005 2010 2015

x1.1 / 3 years

ITRS requirement

10000

Dynamic

Leakage1/100


Active leakage makes things more challenging

Year2002 ’04 ’06 ’08 ’10 ’12 ’14 ’160

0.2

0.4

0.6

0.8

1

1.2

0

20

40

60

80

100

120

Tech

nolo

gy n

ode[

nm]

Volta

ge [V

]

VDD

Technology node

2002 ’04 ’06 ’08 ’10 ’12 ’14 ’160

1

2

Year

PDYNAMIC

PLEAK

Pow

er [µ

W /

gate

]

Subthreshold leak(Active leakage)

VTH fluctuation


Trade-off between power and delay

012345x 10-7

0

10

20

0.30.50.7-0.1

0.10.3VDD [V] V TH [V

]

Pow

er [W

/gat

e]

Del

ay [p

s]

DDs

V

DD VIVCfaPowerTH

⋅⋅+⋅⋅⋅=−

1002

0.30.50.7-0.1

0.10.3VDD [V] V TH [V

]

( ) 31 .THDD

DD

VVVCDelay

−⋅

∝

Equi-delay

65nm node, FO3 INV

(+ other leakage)

More generally, trade-off exists between power and QoS.


Leakage-aware design from Qualcomm

Multi-VDD: Seven VDD’sDual-VTH: Two VTH’s for PMOS and NMOS eachPower gating: Selective MTCMOS reduced standby to 1/3~1/4.G. Uvieghara, et al., “A Highly-Integrated 3G CDMA2000 1X Cellular-Baseband Chip with GSM/AMPS/GPS/Bluetooth/Multimedia Capabilities and ZIF RF Support,” ISSCC paper#23.3, Feb. 2004.


Adaptive control basicsWhat to monitor

Leakage current, Speed, Workload,Temperature, Error rate, Quality of Service (QoS)

How to monitorReplica (critical path), Representative, Actual

What to controlFrequency, VDD, VTH, VSWING, Activity, W, Gate bias of switches, Power-gating

How to controlAnalog, Digital, Software

Granularity of controlChip level , Block level, Gate level, Transistor level


Adaptive VDD (& ƒ) control


Changing VDD and ƒ adaptive to workload

Workload0 0.2 0.4 0.6 0.8 1

Nor

mal

ized

pow

er P

∝ƒV

DD

2

0

0.2

0.4

0.6

0.8

1

ControllerController

Clock & VDD

Requiredspeed

Super-linearHardwareSoftware

Processor

S. Lee et al, DAC, June 2000


Applicable to real-time applicationVDD-hopping

MPEG-4 encoding

Nor

mal

ized

pow

er0

0.2

0.4

0.6

0.8

1

2 3 8

# of frequency levels1

Transition time

between ƒlevels

= 200µs

Time#n #n+1

n-th slice finished hereNext milestone

Application slicing and software feedback guarantee real-time operation.

Two hopping levels are sufficient.


VDD-hopping with RTOS saves 2/3 of power

H. Kawaguchi et al, RTAS Workshop, May 2001


Adaptive VTH control

1. Changing VTH adaptive to process/temp. variability

2. Changing VTH adaptive to required performance

3. Applying extremely high VTH in standby

4. Applying high VTH in burn-in and IDDQ test


Adaptive VTH for variation control

V TH

varia

tion

CenterLow High

Improved

Improved

Leak

age

VDD

VBS=VDD=>VDD±v

VTH

Del

ay

VSS

VBS=0 => 0 ± v

pMOS

nMOS


Adaptive VTH in early days(VTCMOS)

VBBN

Self-Sub-Bias

Circuit (SSB)

Leakage Sensor

leak

VGN1 Pwell

ON/OFF

low Vth → large leakage → SSB ON → deepVBB → high Vth

high Vth→ little leakage → SSB OFF → shallow VBB → low Vth

• control VTH to adjust leakage current• compensate VTH fluctuation

T. Kobayashi, and T. Sakurai, "Self-Adjusting Threshold-Voltage Scheme (SATS) for Low-Voltage High-Speed Operation," in Proc. IEEE 1994 CICC, pp.271-274, May 1994.

Leakage, Replica, Reverse body bias, Analog, Chip level


Adaptive VTH in finer granularity

Phase Detector & Counter

Resistor Network

Bias AmplifierCUT

Delay

Phase Detector & Counter

Resistor Network

Bias AmplifierCUT

Delay

21 sub-sites with separate body bias for each sub-site

J. Tschanz, J. Kao, S. Narendra, R. Nair, D. Antoniadis, A. Chandrakasan, and V. De, “Adaptive Body Bias for Reducing Impacts of Die-to-Die and Within-Die Parameter Variations on Microprocessor Frequency and Leakage,” ISSCC, Paper 25.7, 2002.

5-bit counter

VREF

VCCA

+- VBP

fCritical path

Phase detector

Circuit block (CUT)

VCC

VSS

VBP,ext

VBN,ext

PD

Bias selector

2R 2R 2R 2R 2R 2R

R R R R

Rf

R

5-bit counter

VREF

VCCA

+- VBP

fCritical path

Phase detector

Circuit block (CUT)

VCC

VSS

VBP,ext

VBN,ext

PD

Bias selector

2R 2R 2R 2R 2R 2R

R R R R

Rf

R

Speed, Replica, Body bias, Digital, Block level


Random VTH variation affects ILEAK little

( )( )

2

VTH

2VTH

20THTHTH

s10ln

21

0OFF

TH2

VV

VTH

sV10ln

0OFFTHTHTHOFFOFF

eI

dVe2

1eIdVVf)V(II

⎟⎠⎞

⎜⎝⎛ σ

∞

∞−

σ

−−−∞

∞−

=

σπ== ∫∫

2TH TH0 VTH

ln10V V2s

σ< > − = −Equivalent VTH shift

σVTH [mV]

<VTH

> -V

TH0

[mV]

0 10 20 30 40 500

20

60

100

140

3σ

s [mV/decade]80 100

Systematic VTH variation (inter-, intra-chip) is important.


Software control of VTH adaptive to workload

0.6µm processOverhead of VTH-hopping : 14%RISC core : 2.1mm x 2.0mmVBS selector : 0.2mm x 0.6mmFixed VTH

Fixed freq.Dual VTH

0

0.5

1

Leakage powerDynamic power

VDD=0.5VVTHlow=0V94% f/2 operation

Nor

mal

ized

pow

er

VTH-hopping

VTH-hopping+ Dual VTH

K.Nose, M.Hirabayashi, H.Kawaguchi, S.Lee and T.Sakurai, "VTH-Hopping Scheme to Reduce Subthreshold Leakage for Low-Power Processors," JSSC, pp.413-419, Mar. 2002.

Waste is more in time than space. Time adaptive controlWorkload, Actual, reverse body bias, Software, Chip level


Perspectives


Finer grain adaptive VDD & VTH

Central power control

Analog

Logic1

Logic2RF

Proc11 Proc12

Proc22Proc21

Communication I/O

Memory 2

Memory 1

High voltage distribution

Voltage regulationVoltage hoppingPower-gating

Power delivery circuit

Lower voltageVariable VDD / VTHMultiple VDD / VTH

Chips or blocks

Adaptive VTH doesn’t need shifters. Data voltage convertersClock domain conversion


History and perspective of adaptive controlAssign proper VDD and VTH in time & space

Once upon a time on a peaceful chip of VLSIbefore the notorious power war …

We were using single VDD and single VTHfor an entire chip.

Then, the power war began andwe started using multiple VTH and VDDdepending on the location on a chip.

Still, the power war gets severer andwe started to vary VTH and VDD in time adaptively.

In finer granularity in time and space …with a help from circuit and software.


Ubiquitous electronics


Emerging app.: ubiquitous electronics (ambient intelligence, wireless sensor network)

RFID nodeSensor nodeStorage nodeComputing nodeNetworking nodeActuator nodeDisplay node

Forming infrastructures日経エレクトロニクス2002.5.20 p.192http://bwrc.eecs.berkeley.edu/Research/Pico_Radio/NAMP/


日本の世帯の出費分布

食料 25.74％

住居7.82％光熱･水道 6.63％

白物家電など 0.52％

冷暖房機器 0.34％

住居関連（その他）2.56％

衣服・履物 5.08％

保健医療 3.67％

交通 2.46％

自動車 1.58％

自動車以外の交通関係 4.61％

携帯電話機 0.06％

携帯電話・PHS通信 1.57％

固定電話通信 1.52％

その他の通信関連（その他） 0.36％

教育 3.46％

テレビ 0.24％

ステレオ0.02％

テープ･レコーダー0.01％

その他 20.92％

教育娯楽サービス 5.90％

書籍など1.66％

教育娯楽用品 2.32％

テレビ･ゲーム機 0.09％

教養娯楽用耐久消費財（その他） 2.32％

ビデオ･カメラ0.04％カメラ 0.08％

VTR 0.03％

パソコン 0.46％

ユキビタス・エレクトロニクスの事業領域

バイオ向け・デバイスの事業領域


Ubiquitous electronics is natural extensionPr

oces

sor c

ount

per

per

son

1950 1960 1970 1980 1990 2000 2020Year

Large scale

Office / middle

WS

PC

historicalVac. tube

Transistor

IC

LSI

VLSI

0.001

0.01

0.1

1

10

100

Embedded

UbiquitousComputing

System LSI

1000SiP

Electronics is part of environments enhancing convenience and security of daily life.

UbiquitousElectronics

Ubiquitous devices

2010

People use electronics consciously.


Emerging applications and key technologies

IT, PC, Digital consumer,

Comm.

Bio-electronics,tissue engineering, environmental eng.

RobotElderly care, household,

emergency

Wireless Sensors

Physical needs

Spiritual needs

Key technologiesKey technologies

Key applicationsKey applications

Wireless sensor network Ambient intelligence

Ubiquitous electronics

Power-aware electronics

AssemblyLarge-area electronics


Organic integrated circuits


Frequently-mentioned features of organic IC’s

Advantages

Low-cost manufacturingMechanical flexibility

Disadvantages

Low speed (<10-3 of Si VLSI)Low density (<10-4 of Si VLSI)


Cost consideration

Cost per function(processors, memories, analog, …)

Organic Si

Cost per area(sensors, display, actuators, …)

Organic Si


Cost in each technology for large area

10K

10 10 10 10 10 10 112 10 8 6 4 2

1

10

100

1K

1µm 100µm 10mmAssem

bly approach

Silicon IC

Organic IC

Area:100mm x 100mm

Assembly approach:($ of organic IC)/2

+20¢ x (# of devices)

Cos

t [$]

Resolution

# of devices


Organic transistorsOrganic semiconductors: main elements --- C & H

Pentacene

Insulator+ -

ＯＮ

Voltage

+ -CurrentOrganic semiconductor

Source Gate Drain

OFF


Modeling by SPICE level1

-40 -30 -20 -10 00

10

20

30

VDS [V]

I DS

[µA

]L=100µm, W=2mm

VGS=-40V

-30V

-20V

-10V

200k

200k

Level 1 SPICE MOS model

MeasurementSimulation

S

D

G


E-skin: large-area pressure sensor


Large-area low-power electronics by organic IC’s

16 x 16 sencel matrix

I/O padsfor IC test clips

Column selectorsThrough-hole sheetPressure-sensitive

conducting rubber

Top electrode Connecting tapes

Rowdecoders

Less than 1mWE-skin: Large-area low-power pressure sensor

T.Someya, "Integration of Organic Filed-Effect Transistors and Rubbery Presssure Senso for Artificial Skin Applications,” IEDM, 8.4.1-8.4.4, Sep. 2003.

T.Someya, H.Kawaguchi, T.Sakurai, "Cut-and-Paste Organic FET Customized ICs for Application to Artificial Skin," ISSCC'05, paper#16.2, Feb. 2004.


Electronic artificial skin (E-skin)

Simply laminating four different sheets…….

S D

G

VDD

VWL

VBL

Polyimide (Gate dielectric)

via Pressure-sensitive rubber

SensorPressed

VDD

sensorFET

word line (VWL)

bit line (VBL)

FET


Cut-and-paste feature (16x16 sencels)

16x16 FET matrix

Rowdecoders

Column selectors

VCO

Registerfiles

1.2mm

16x16matrixR

owde

code

rs

Columnselectors


Bend-proof

With bending down to 5mm in radius,Current is decreases less than 3%.


Sheet-type scanner by organic FETs


Manufacturing process flowCl

CH2* CH2 *n

Parylene

S D

Pentacene (50nm)

Transistor

CO*

O

CO

O CH2CH2 *n

PEN (125µm)

Photodiode

ITO

Au

N

N

N

N

N

N N

N

Cu

CuPc

N N

O

O O

O

H H

PTCDI

CN

C

C

CN

C

CN

O

O

O

O

O

O

O

n*

Polyimide (630nm)

G


Principle

ShieldAmbient light

Black White

ReflectionPEN

PaperPaper

Photodiode


Magnified images of sensor cells

Transistors & DiodesTransistors

200 μm


Scanned image

Target “T”

Commercial (250 dpi)

This study (250 dpi)

Light intensity80 mW/cm20.2 mm


A wine label can be scanned in without peeling it off.


SummaryLow-power design trend

Adaptive control with softwareParallel with in finer granularity

Ubiquitous electronicsLow-power, large-area electronics

Organic electronicsLarge-area sensor applications

Documents

特別講演 ユビキタス･エレクトロニクスに向けた …semicon.jeita.or.jp/STRJ/STRJ/2004/3C_STRJ_WS050303...3 ye ar s DSP x 1 . 4 / 3 y e a r s Processors published

特別講演ユビキタス･エレクトロニクスに向けた …semicon.jeita.or.jp/STRJ/STRJ/2004/3C_STRJ_WS050303...3 ye ar s DSP x 1 . 4 / 3 y e a r s Processors published