Case-Based Instruction of Digital Integrated Circuit Design Courses for Non-Major Undergraduates

AbstractWith the rapid growth of semiconductor industry, there are more and more non-major students hope to learn digital integration circuit (IC) design methodology to improve the performance of their systems. However, the digital IC design methodology becomes more and more abstract to be studied because it tends to hardware description language (HDL) base. It is difficult for undergraduates to study. In this paper, an initial study of using case-based instruction in digital IC design course is described. The proposed case-base course consists of example cases, ten labs, and two projects. Each case includes illustrations of physical architecture, HDL codes, truth tables, waveform, and comments. Students can understand the meaning of HDL by referring to physical architecture, truth table, and waveform with HDL codes. It helps students to understand HDL more realistically rather than abstractively especially for non-major undergraduates. To investigate the effect of case-based instruction for non-major undergraduates, a specific class was constructed by 56 % major and 44 % non-major undergraduates. In the end of the course, both major and non-major undergraduates verified all practical labs and projects successfully. The average scores of agreement are 4.56 by major students and 4.44 by non-major students with a 5-level agreement questionnaire. The results of questionnaire show that most of students liked case-based instruction and looked forward to study other case-based engineering courses in the future.

KeywordsCase-based instruction; FPGA; HDL; IC design course; i-learning; Non-major; Undergraduate; Verilog;

I. INTRODUCTION Integrated circuit (IC) design is a core course in electronic

engineering and computer science departments [1]-[3]. With the rapid growth of semiconductor industry, there are more and more fields using integrated circuit to improve the performance of their systems [4]-[5]. For example, controllers which are realized by digital IC can be used to improve the performance of a motor, an engine, a medical instrument, etc. For this reason, there are more and more courses and laboratories designed by using field programmable gate array (FPGA) platforms [4]-[10]. Students can learn the principles, methodologies, and tools of the digital IC design and use these skills and knowledge to contribute their special fields in the future.

As the advancement of electronic design automation (EDA) tools [11]-[13], the digital IC design methodology has been moving away from graphical design base to hardware description language (HDL) base. It means that the digital IC design course becomes more and more abstract to be studied.

Generally, the HDL-based design courses are designed with the beginning of syntax and semantics of HDL languages such as VHDL or Verilog. It is very difficult for non-major students to learn HDL-based digital IC design methodology without studying the courses of logic design, digital system, and computer architecture.

Recently, many studies have been proposed to advance teaching methodologies of digital IC design courses. Hung [14] presented a problem-solving instruction to increase students achievement for learning Verilog programming. Radu et al. [15] proposed a novel method to teach HDLs within a limited time budget. Boluda et al. [16] presented an active methodology based on HDLs for teaching electronic systems design. The studies [4]-[16] mentioned above did great contributions in digital IC design fields.

In this paper, a case-based digital IC design instruction [17]-[18] is proposed. It consists of ten representative cases of digital IC design examples and in which each case includes illustrations of physical architecture, truth tables, comments, and HDL codes. Students can learn the HDL codes refer to the illustrations and truth tables, which helps students to understand the meaning of HDL codes realistically rather than abstractively. The ten cases are important digital IC design example which contains basic techniques of digital IC circuits. To refer to these ten cases, the non-major students can realize their own digital IC designs efficiently in their specific fields. To investigate the effect of case-based instruction, a specific class was constructed by 56 % major students and 44 % non-major students from thirteen various departments in four different universities, in which none of students had been studying HDL language before. All the students studied in the same class and used the same environment for realizing their designs. In the end of the course, each major and non-major student not only completed all the pieces in ten labs and two projects but also verified all the designs by using FPGA boards. After the instruction, a course evaluation survey was taken from the students. The results show that most of students liked case-based instruction and the program of this course.

This paper is organized as follows: In Section II, an overview of the proposed cased-based instruction is presented. Section III shows assessment results of the evaluation survey in this course. Finally, in Section IV, the conclusions are presented.

Shih-Lun Chen#1, Yu-Kuen Lai#2, Wei-Chih Hu#3, and Wen-Yaw Chung#1,4 #1Department of Electronic Engineering, #2Department of Electrical Engineering, #3Department of Biomedical

Engineering, and #4Electronics and Information Technology Center, Chung Yuan Christian University, Chung-Li Taiwan

e-mail: chrischen@cycu.edu.tw

2013 Learning and Teaching in Computing and Engineering

978-0-7695-4960-6/13 $26.00 2013 IEEEDOI 10.1109/LaTiCE.2013.21

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2013 Learning and Teaching in Computing and Engineering

978-0-7695-4960-6/13 $26.00 2013 IEEEDOI 10.1109/LaTiCE.2013.21

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TABLE I TIME SCHEDULE FOR CONDUCTING A CASE-BASED IC DESIGN LECTURE

Lecture Learning Hours Topic Case Studies Lab

1 1 Introduction of course non non

2 3 Intro. Digital Integrated Circuit Design & Verilog Hardware Description Language A Case for IC Design Process Contact Xilinx FPGA board & ISE design tools

3 3 Conditional Operator, Logical Operators, Relational Operators, Equality Operators Multiplexers & Demultiplexers 4-1 Multiplexer

4 3 Dataflow Modeling & Logic Design Gate-Level Structures of Multiplexers and Demultiplexers 7-Segment led decoder

5 3 Latch and Flip-Flop Modeling, Blocking and Non-Blocking , Reset Flip Flop RS_Latch, D_Fipe-Flop Flip-Flop Register

6 3 Middle Project Verification System Architecture of a Timer Project : Timer

7 3 Structure Modeling Structure, Data Flow, and Behavioral Descriptions of An OR_AND_Structure Circuit and A Half Adder

1-Bit Half Adder, 1-Bit Full Adder

8 3 Hierarchical Design Full Adder and Ripple Carry Adder 4-Bit Ripple Carry Adder

9 3 Combinational Logic Circuit Combinational Logic Circuits 8-Operation ALU

10 3 Design Flow and Test Bench Test Benches for Combinational Logic Circuits and Sequential Circuits Test Bench for ALU

11 3 Controller Design and FSM Moore Machine FSM of Traffic Light Mealy Machine FSM of Traffic Light

12 3 Pipeline & Hardware Sharing Square-Root Approximation Circuit Design a Pipelined and Hardware Sharing Architecture of a Polynomial Equation

13 3 Final Project Verification System architecture of a Calculator Calculator

II. COURSE OVERVIEW

A. General Course Description Since the proposed digital IC design course is a case-based

instruction, the lectures and practical labs are synchronized throughout the case examples. Table I lists the lecture, learning hours, topic, case studies, and labs in time sequence.

Each lecture in this course occupies three hours except the first one. Since the objective of the digital IC design course is to teach students understanding how to realize a digital IC design, the practical labs and projects play important roles to improve the effect of students learning. It is necessary to retain a part of time for following:

1) for students to practice their pratical labs and projects. 2) for teaching assistants to check and verify the pratical

labs, the middle project, and the final project which were done by students.

3) for teachers to exaplain the relation between pracitical labs and projects with example cases.

4) for teachers to illustrate and analize the labs and projects as an example case again to improve impression on the students.

Although there are only thirteen lectures designed in this course, it occupies three hours per week and total eighteen weeks to run this course completely.

B. Course Organization and Chractecristics The course (with the lab assignments) is divided into ten

major topics except the 1, 6, and 13 lectures as shown in the third column of Table I. Each lecture consists of representative

cases of digital IC design examples about the lecture topic and practical labs for student learning how to complete a digital IC design. The contents of each example case include illustrations of physical architecture, comments, truth tables, and various descriptions in HDL codes.

C. An Example of Case-Based HDL Course Fig. 1 shows an example of the proposed case-based

instruction by using a half adder example case which is a part of lecture 7. Fig. 1 (a) shows the block diagram of the half adder, which represents the input/output signals of the half adder. Fig. 1 (b) shows the physical architecture of the half adder, which illustrates the details of the real logics and input/output parts. In addition, the physical architecture also shows the connections between each logic and input/output port, which helps students understanding how to connect wires between each component. Fig. 1 (c) shows the structural description in HDL language for the half adder. By referring to Fig. 1 (b), students can clearly understand the HDL language by mapping each declaration and statement into the physical architecture. Fig. 1 (c) and Fig. 1 (d) show the data flow and behavioral descriptions in HDL language for the half adder. To contrast three different types of descriptions in Verilog with physical architecture, the students will understand Verilog language more clearly and physically rather than abstractly. Also, students can differentiate between three kinds of descriptions. Fig. 1 (f) shows the truth table of the half adder, which represents the real values of input and output signals. In the other larger cases, the truth table can be replaced by the waveform picture which displays the waves of intermediate

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Input Output

a b sum C_out

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

Figure 1. A half adder case to explain three different descriptions in Verilog language (a) Block diagram (b) Physical architecture (c) Structural description (d)

Data flow description (e) Behavioral description (f) Truth table

wires and registers. The truth table and waveform picture help students to understand the variation and timing of the signals from input to output.

Fig. 1 is a simple example to show the case-based HDL course. The clock diagrams, physical architectures, and truth tables should be changed according to the characteristics of example cases. For example, an example case of a controller design, the block diagram could be changed to a station machine diagram, the physical architectures could be changed

to a sequential circuit, and the truth table could be changed to a waveform picture.

D. Laboratory Environment and FPGA Testing Board The laboratory was built up by personal desk-top computers

and a server. The Xilinx FPGA program tool ISE design suite [19] had been installed into each computer. In order to improve the specialty of IC design in Taiwan, the national chip implementation center (CIC) [20] provides IC design

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TABLE II PILOT QUESTIONNAIRE OF STUDENTS BACKGROUND

1. Are you a male or a female Man 80 % Woman 20 %

2. Which grade level are you in 1st 32 % 2nd 44 % 3rd 24 % 4th 0

3. Are you study in department of electronic engineering or information science Yes 56 % No 44 %

4. Which language have you ever learned (multiple select) C 96% Matlab 12% VHDL 0 % Verilog 0 %

5. Have you had experience of using ISE FPGA tool Yes 0 % No 100 %

6. Which FPGA board have you ever used Xilinx 0 % Altera 0 %

tools, including ISE license, for academic groups and universities. The ISE license was installed in the server so that each computer can check the license from the server automatically. This design of laboratory environment reduces loading of the server successfully since the server only needs to provide the ability of license checking without executing any FPGA programing. The FPGA designs are programed by ISE tools installed in personal computers. This design of laboratory improves the performance of IC design courses efficiently.

Fig. 2 shows a photo of the FPGA testing board used in this course. It includes a Xilinx Spartan-3E FPGA with 500K gates, a USB port, 16MB SDRAM, 16MB flash memory, 50MHz oscillator, 75 I/O connectors, 8 LEDs, four-digit seven-segment display, 4 pushbuttons, and 8 slide switches [19]. This FPGA testing was selected as a verification platform of this course since the price of this testing board is not too expensive. Although the FPGA verification board including a FPGA with huge gates, LCD touch panel, and high capacity of memories can design more interesting practical labs in this course, it costs too much to build up the laboratory with high-spec FPGA testing boards. For this reason, all the practical labs and projects were designed to meet the specifications of the FPGA testing board.

Figure 2. Photo of Xilinx spartan-3E FPGA board used in this course [19]

E. i-learning platform [21]

A web-assisted learning interface called i-learning platform was used in this course. It was very helpful for the teachers to share teaching materials, reference data, and lab inforamtion. It also provides founctions of homework receiving, grade manegement, online testing, and online questionnaire. This i-learning [21] system was designed by a commercial company, and it has been maintained, modified, and extended by Chung-Yuan University in Taiwan for many years. It provides twenty-three close-ended items and one open-ended item in the questionnaire, which helps teachers to get responses from students. The i-learning platform provided an efficient way for this work to finish questionnaire online and complete the statistic results.

III. ASSESSMENT RESULTS In order to investigate the effect of the proposed case-based

instruction, a specific digital IC design class was constructed. The undergraduates come from four different universities in China. Their major subjects were distributed into thirteen departments which include information and electronics, computer science, mechatronical engineering, optoelectronics, automation, mechanical engineering, aerospace engineering, software, power system, detection and control, power machinery, aeronautics, and environmental sciences departments. This specific class provided a well environment to investigate the effect of case-based instruction learning in digital IC design course for major and non-major undergraduates.

Table II lists the results of the pilot questionnaire of students background, including sex, grade, major, HDL language, FPGA, and FPGA board. The result of question 3 shows that there are 56 % major students and 44 % non-major students in this class. The result of question 4 shows that none of students had learned VHDL and Verilog languages before. The results of question 4 also show that most students have learned C language, which means that they already have basic programming ability. The result of question 5 shows that none of students had the experience of using ISE tool. The result of question 6 shows that none of students have the experience of using the Xilinx and Altera FPGA boards. After analyzing the results of the pilot questionnaire, we can conclude that no matter major or non-major students in this class didnt have any of backgrounds about the HDL languages and FPGA.

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TABLE III MEAN AND VARIANCE OF STUDENTS RESPONSES TO THE CASE-BASED DIGITAL IC DESIGN COURSE EVALUATION SURVEY STATEMENT (5-STRONGLY AGREE, 4-

AGREE, 3-NEUTRAL, 2-DISAGREE, 1- STRONGLY DISAGREE) Statement Major Undergraduates Non-Major Undergraduates

1. The case-based instruction helps me learning Verilog language Mean 4.33 4.67

Variance 0.22 0.22 2. The case-based instruction helps me understand the contents of this course

Mean 4.44 4.75 Variance 0.25 0.19

3. Explanations of cases help me complete labs Mean 4.44 4.42

Variance 0.25 0.24

4. Architectural figures of cases help me understand Verilog language Mean 4.44 4.17

Variance 0.25 0.47

5. Architectural figures of cases help me complete labs Mean 4.67 4.08

Variance 0.22 0.41 6. The case-based learning helps me to understand Verilog language more than learning syntax of Verilog language purely

Mean 4.67 4.17 Variance 0.22 1.14

7. I hope to study more digital IC design cases in this course Mean 4.67 4.67

Variance 0.44 0.22

8. I hope to study more case-based engineering courses in the future Mean 4.78 4.58

Variance 0.17 0.24

Average Mean 4.56 4.44

Variance 0.25 0.39

During the course running, the major and non-major

students studied in the same class and used the same laboratory environment to realizing their designs. In the end of the proposed case-based digital IC design course, no matter major or non-major undergraduates from first to third grade completed the ten practical labs and two projects successfully. In addition, although practical labs or projects were verified by the FPGA testing board completely. The non-major students successfully learned the HDL-based digital IC design techniques without having any background knowledge of logic design, digital system, and computer architecture.

Table III lists the agreement results of students responses to the proposed case-based digital IC design course. The average scores of agreement are 4.56 by major students and 4.44 by non-major students with a 5-level agreement questionnaire (1-disagree and 5-completely agree). The average variance of agreement are 0.25 by major students and 0.39 by non-major students, which means that the agreement degrees of the non-major students are more various than major students. The results of questionnaire show that most of students liked case-based instruction. Besides, the scope of a question I am looking forward to study more case-based engineering courses in the future is 4.67. The proposed case-based course shows an initial success for major or non-major students to learn digital IC design course especially for the non-major undergraduates. The case-based digital IC design course can improve the effect of learning not only for undergraduates but also for graduated students with more complex example cases and practical labs. We also hope that the case-based instruction could be helpful for other engineering courses which have the same characteristics as digital IC design course.

IV. CONCLUSION Since the design methodology moves away from graphical

design base to HDL design base, the digital IC design course becomes more and more abstract. For non-major students, it is very difficult to understand HDL-based course without foundations of digital subjections. This study proposed a novel case-based instruction for digital IC design course. It shows an initial success for non-major undergraduates to learn digital IC design methodology. We hope that the case-based instruction can be popularized to other engineering courses which have the same characteristics.

ACKNOWLEDGMENT This work was supported by the National Science Council,

R.O.C, (grants NSC-101-2221-E-033-066, NSC 101-2221-E-033-072, and NSC-101-2221-E-033-068), Xilinx University Program #2596259, and the National Chip Implementation Center, Taiwan. The authors also wish to express their gratitude to the office of international affairs and the center for teaching excellence in Chung Yuan Christian University, Taiwan.

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