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“CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest Center of Technological Electronics and Interconnection Techniques - CETTI Ciprian Ionescu

“CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

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Page 1: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

“CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF

ELECTRONIC MODULES

Faculty of Electronics and Information TechnologyUniversity “Politehnica” of Bucharest

Center of Technological Electronics and Interconnection Techniques - CETTI

Ciprian Ionescu

Page 2: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Demonstration in OrCADDemonstration in OrCAD

The electronic module proposed for demonstration can The electronic module proposed for demonstration can be used for digitally displaying of voltage or current of be used for digitally displaying of voltage or current of an available laboratory power supply. an available laboratory power supply.

Page 3: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Schematic 1- Initial data for PCB module design Schematic 1- Initial data for PCB module design

Page 4: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

First of all some words about the working principle of the circuit.First of all some words about the working principle of the circuit.

The schematics from fig. 2 will not be used, but it suggests a The schematics from fig. 2 will not be used, but it suggests a required intervention in the existing power supply.required intervention in the existing power supply.

The main change is the insertion of the series (shunt) resistor R6.The main change is the insertion of the series (shunt) resistor R6.

The connection of the module with the power supply will be The connection of the module with the power supply will be assured by the connector pins A-F.assured by the connector pins A-F.

Page 5: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Working principle (continued)Working principle (continued)

The switch between the U/I display mode is done by the The switch between the U/I display mode is done by the DPDT (Double Pole Double Throw) switch S1 (not included in DPDT (Double Pole Double Throw) switch S1 (not included in our PCB).our PCB).

For voltage measurement the voltage applied to IC1 is For voltage measurement the voltage applied to IC1 is divided by the group R1-P4 in a quotient 1:100. The decimal divided by the group R1-P4 in a quotient 1:100. The decimal point of LD3 and the LED “V” are lit on, the display resolution point of LD3 and the LED “V” are lit on, the display resolution is 0,1 V.is 0,1 V.

For current measurement the voltage drop at R6, is applied For current measurement the voltage drop at R6, is applied directly at HI-LO terminals of the DAC circuit IC1. In this case directly at HI-LO terminals of the DAC circuit IC1. In this case there are two possible scale connections (a) - 0there are two possible scale connections (a) - 09,99 A or 9,99 A or connection (b)- 0connection (b)- 00,999 A. In these cases the shunt resistor 0,999 A. In these cases the shunt resistor must have the values 0.1 must have the values 0.1 , respectively 1 , respectively 1 ..

The circuit has 4 adjustment points:The circuit has 4 adjustment points:

•P1 null point adjustment for current domain P1 null point adjustment for current domain

•P2 full scale calibration for currentP2 full scale calibration for current

•P3 null point adjustment for voltage domain P3 null point adjustment for voltage domain

•P4 full scale calibration for voltageP4 full scale calibration for voltage

The adjustments must be done in this order.The adjustments must be done in this order.

Page 6: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Demonstration of design flow in OrCAD

First of any CAD activity we must find the answer to some questions:

How the case (housing) will look like?

How the circuit is powered?

How many PCBs will be necessary?

How many layers will have the PCB?

How many connectors we will use?

We will use SMD or THT components? Etc.

To answer to some of the questions we must see the CAD project To answer to some of the questions we must see the CAD project as part of a construction project.as part of a construction project.

Page 7: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

FIRST ACTIVITY: Gathering information about FIRST ACTIVITY: Gathering information about componentscomponents

Source: Distributors Catalogue, Producer Data Sheets from Web, etc.

Page 8: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

C1 Metalized film capacitor

C2,C3 Multilayer ceramic capacitors MCC

Page 9: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

C4 Aluminium Electrolytic Capacitor

Page 10: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

R1-R5 Metal film resistors

P1-P4 Multi Turn Cermet Trimmers

Page 11: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

LD1-LD3 7 Segments LED Display

D1-D2 LEDs for “Volts” or “Amps” Display

Page 12: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

B1- 1.5 A Bridge Rectifier

Page 13: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

SW1 SPDT Switch

J2 In-line pins connectorJ1 Jack female connector

Page 14: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

T4, T5 small signal transistors

T1- T3 medium power transistors

Page 15: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

U2 BCD DecoderU2 BCD Decoder

U1 A/D ConverterU1 A/D Converter

Page 16: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

U3 Voltage Regulator

Page 17: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

NEXT STEP:

Realization of the Schematic Drawing

File New Project

Page 18: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Schematic Page of the module as apears in Schematic Page of the module as apears in Capture Capture

Page 19: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Art. Qty. Ref. Value Part Name/Library PCB Footprint (Library)

1 1 B1 B40C1000 BRIDGE/DISCRETE BR_40– new created

2 1 C1 270n CAP/DISCRETE RAD/.300X.125/LS.200/.031 (TM_RAD)

3 2 C2,C3 100n CAP/DISCRETE RAD/.250X.125/LS.200/.031 (TM_RAD)

4 1 C4 470u/25V CAP POL/DISCRETE CPCYL/D.400/LS.200/.034 (TM_CAP_P)

5 1 D1 Ampers LED/DISCRETE CYL/D.200/LS.100/.031 (TM_CYLND)

6 1 D2 Volts LED/DISCRETE CYL/D.200/LS.100/.031 (TM_CYLND)

7 1 J1 CONN PCB 2-R CONN PCB 2-R/CONNECTOR CON_PWR- new created

8 1 J2 CONN PCB 6-R CONN PCB 6-R/ CONNECTOR SIP/TM/L.600/6 (SIP)

9 3 LD1,2,3 LED7S LED7S-new created LED7S- new created

10 1 P1 50k TRIM– new created VRES16 (VRES)

11 1 P2 10k TRIM – new created VRES16 (VRES)

12 1 P3 10M TRIM – new created VRES16 (VRES)

13 1 P4 1k TRIM – new created VRES16 (VRES)

14 1 R1 82k R/DISCRETE AX/.350X.100/.031 (TM_AXIAL)

15 2 R2 82R R/DISCRETE AX/.350X.100/.031 (TM_AXIAL)

R3 82R R/DISCRETE AX/.350X.100/.031 (TM_AXIAL)

16 1 R4 15k R/DISCRETE AX/.350X.100/.031 (TM_AXIAL)

17 1 R5 27k R/DISCRETE AX/.350X.100/.031 (TM_AXIAL)

18 1 SW1 SW KEY-SPDT SW KEY-SPDT/DISCRETE SPDT- new created

19 3 T1,T2,T3 BC640 BC640/TRANSISTOR TO92/100 (TO)

20 1 T4 BC547B BC547B/TRANSISTOR TO92/100 (TO)

21 1 T5 BC557B BC557/TRANSISTOR TO92/100 (TO)

22 1 U1 CA3162 CA3162- new created DIP.100/16/W.300/L.800 (DIP100T)

23 1 U2 CA3161 CA3161- new created DIP.100/16/W.300/L.800 (DIP100T)

24 1 U3 LM7805 LM7805- new created TO220AB (TO)

Some parts ( symbols) or/and footprints must be Some parts ( symbols) or/and footprints must be createdcreated

Page 20: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Preparing Capture for transfer - Properties EditorPreparing Capture for transfer - Properties Editor

Page 21: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

The correspondence symbol-footprint (SCM-PCB) The correspondence symbol-footprint (SCM-PCB) at Netlist transfer in Orcad.at Netlist transfer in Orcad.

Recommendation: Recommendation: Use numbers, majority of Layout libraries use Use numbers, majority of Layout libraries use numbers. Exceptions: TM_CAP_P, TM_DIODE.numbers. Exceptions: TM_CAP_P, TM_DIODE. Modify symbols (parts) in libraries not in Schematic Modify symbols (parts) in libraries not in Schematic Page.Page. Take your time and think twice!Take your time and think twice!

Schematic Capture PCB Layout Obs.

Pin name 1 2

1

Pin number — — Pin name 1 2

Correspondence realized correctly.

Pin name A K

2

Pin number — — Pin name A K

Correspondence realized correctly.

Pin name A K

3

Pin number 1 2 Pin name 1 2

Correspondence realized correctly.

Pin name A K

4

Pin number — — Pin name 1 2

No correspondence found. Error at AutoECO run.

Pin name 1 2

5

Pin number 2 1 Pin name 1 2

Attention! The correspondence is found, but with wrong results. The field “Pin number” has priority.

Pin name 1 2

6

Pin number * * Pin name 1 2

No correspondence found. Error at AutoECO run. * = any character different from those found in field “Pin name” from Layout. (1 resp. 2)

Page 22: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

TRANSFER TO LAYOUTTRANSFER TO LAYOUT

The field “PCB Footprint” must be filled in The field “PCB Footprint” must be filled in (correctly).(correctly).

DRC Verification.DRC Verification.

Postprocessing: Netlist, Bill of Materials, Postprocessing: Netlist, Bill of Materials, Printing.Printing.

Nets verification - Not a CAD activity!!!Nets verification - Not a CAD activity!!!

Page 23: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

File New

Import of Netlist in Layout Block:Import of Netlist in Layout Block:

Technology template

Layout file

Netlist

Page 24: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Layout screen after import of the Netlist

Page 25: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Establishment of design restrictions:Establishment of design restrictions:

board outlineboard outline

no. of layers no. of layers

track widthstrack widths

padstack assignmentspadstack assignments

route spacingroute spacing

Component placement Component placement

Routing Routing

DRC and final operationsDRC and final operations

Postprocessing: Gerber and NC Drill files, Printing, Postprocessing: Gerber and NC Drill files, Printing, ReportsReports

In LAYOUT Block:

Page 26: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Options Gerber Settings

Options Post Process Settings

POST-PROCESSING

Page 27: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Postprocessing- Top layer Postprocessing- Top layer

Final form of design in Orcad Layout Final form of design in Orcad Layout

Page 28: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Postprocessing- Bottom layer Postprocessing- Bottom layer

Postprocessing- Silk Mask Postprocessing- Silk Mask

Page 29: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Postprocessing- Drill DrawingPostprocessing- Drill Drawing

Page 30: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Postprocessing- Solder MaskPostprocessing- Solder Mask

Postprocessing- Assembly DrawingPostprocessing- Assembly Drawing

Page 31: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Example of final operationsExample of final operations

Page 32: “CAE-CAD-CAM” TECHNIQUES FOR DEVELOPMENT OF ELECTRONIC MODULES Faculty of Electronics and Information Technology University “Politehnica” of Bucharest

Thank you for your attention !