BSC Hardware System (Large Capacity)

7/29/2019 BSC Hardware System (Large Capacity)

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Wireless Curriculum Development Section

ISSUE

1.0

BSC Hardware System (large

capacity)


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2Confidential Information of Huawei.No Spreading without Permission. Security Level: Internal

Contents

Overview

CSWS

CIPS

CRPS

Clock System

Windup


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Network structure of CDMA2000 1X/1xEV-DO

hybrid systemOverview

BSC/PCF PDSN

MSC

PLMN

A3/A7/A13

A1/A2/A5

A1/A2/A

5

A10/A11

AT/MS

Internet

Abis

Abis

PSTN

ISDN

A10

/A11

AN AAA

AN AAA

A12

A12

BTS

BTS

Optical Fiber

SoftBTS

AT/MS

BSC/PCFAN


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Rack Distribution

CDMA Switch Subrack (CSWS)

CDMA Integrated Processing Subrack (CIPS)

CDMA Resource and Packet Subrack (CRPS)

CDMA Packet Module Subrack (CPMS) CLocK processing Module (CLKM)

CDMA Integrated Management System (CIMS)

Large capacity BSC is divided into following functionalblocks. In general each block corresponds to singlesubrack. These are:

Overview


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To/from MSC

To / from PDSN

Optical fiber

To / from NMSLAN

E1

GE

Ethernet

Optical fiber

Optical fiber

CIPS

CIMS

CPMS

CRPS

CSWS

CLKM

To / from PDSNGE

Rack DistributionOverview

To/from BTS E1


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Typical Hardware ConfigurationOverview

Capacity Number of Cabinets Number of Subracks

400M DataThroughput

4

CLKM

1CSWS1CIPS4 (1xEV-DO service

processing entity)

CRPS1

CPMS

4CIMS1

200,000 Voice

Subscribersand 400 M DataThroughput

7

CLKM1CSWS1CIPS*10 (1X service processing

entity)CIPS4 (1xEV-DO service

processing entity)

CRPS1CPMS2CIMS1


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CCTR (CDMAController Rack)

CBUR (CDMABUsiness Rack)

Overview

Dummy panel

Air guide subrack

Fan boxCable trough

Power distribution box

Fan box

Cable trough

Fan boxCable trough

Air guide subrack

CIPS/CPMS

CIPS/CPMS

CIPS/CPMS

LAN Switch

Air deflector

Fan box

Cable trough

Power distribution box

Cable troughFan box

Dummy panel

CRPS

CLKM

BAM

LAN Switch

Air deflector

LAN Switch

LAN Switch

KVM 3 in 1

2U

9U

1U

2U

1U

1U

1U1U

9U

2U

1U

1U1U1U

1U

2U

1U

1U1U

1U

Cablingtray

Cablingtray

Cabling frame

CRPS

CSWS

BAM

CLKM


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ContentsBSC Hardware

Overview

CSWS

CIPS

CRPS

Clock System

Windup


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Boards Position in CSWS

14131211109876543210

CNET

CNET

CLPC

CLPC

CMPU

CMPU

CSWS

CLPC

CLPC

CLPC

CLPC

CLPC

CLPC

CLPC

CLPC


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Functional Diagram of CSWS

CLPC

CLPC

CNET

Other subracks

Other subracks

Overview

BAMCMPU


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CLPCBoards introduction

Provide eight 155Mbps ATM-over-SDH optical interfaces

Guarantee the ATM QoS

CLPC is responsible for:


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CLPC board appearanceBoards introduction

I/Ointerfaceunit

I/Ointerfaceunit

RUN


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Fast switching of fixed length-packets

CNET

40 switching network ports

Boards introduction

CNET is responsible for:


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CNETBoards introduction

Clockmodule

RUNCLK

ACT

CLK IN0

CLK IN1

CLK OUT0

CLK OUT1CLK IN2CLK IN3


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Managing & allocating the resources of CNET

CMPU

Management proxy for other subracks

Managing & maintaining the boards in CSWS

Boards introduction

CMPU is responsible for:

Controls the active/standby switch over


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16

Confidential Information of Huawei.No Spreading without Permission. Security Level: Internal

CMPUBoards introduction

IDE Hard Disk

RUNALMACT

RESET


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17


Traffic FlowCSWS

CMUX

CMUX

CNET

CLPC


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18


Maintenance FlowCSWS

CLPC

CNET

CMUX

CMPU

BAM

Bus

Bus


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Overview

CSWS

CIPS

CRPS

Clock System

Windup


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Functional Diagram of DO CIPS

Abis Physical interface

Service frame selection, frame allocation

Multiplexing/Demultiplxexing

Signalingprocessing

BTS

C

RPS/CPMS

PackettoCRPS/CPMS

Overview


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21


Boards Position in DO CIPS

CBIE

CFMR

CFMR

CFMR

CFMR

CFMR

CFMR

CMUX

CMUX

CFMR

CFMR

CFMR

CSPU

CSPU

CFMR

CBIE

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Overview

Note: CXIE/CBIE/COIE can provide the Abis interface.

CAIE/CSTU can provide the A1/A2 interface.


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Functional Diagram of 1X CIPS

Abis Physical interface

Service frame selection, frame allocation

Multiplexing/Demultiplxexing

Signalingprocessing

BTS

A1/A2 physicalinterface

CRPS/CPMS

MSC

Packetto

CRPS/CPMS

Overview

Circuit dataprocessing

Voiceprocessing


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Boards Position in 1X CIPS

CBIE

CFMR

CFMR

CFMR

CIWF

CEVC

CEVC

CMUX

CMUX

CEVC

CEVC

CLAP

CSPU

CSPU

CIWF

CAIE

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Overview

Note: CXIE/CBIE/COIE can provide the Abis interface.

CAIE/CSTU can provide the A1/A2 interface.


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The switching & multiplexing functions of ATM services

CMUX

Synchronization clock function

Manages & monitors the software loading of all boards inCIPS

Monitors the power of subrack, fan box and environmentoperating status

Boards introduction

CMUX is responsible for:


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25


CMUX Appearance

Boards introduction

ETH

1PPS

COM1

COM2

RUN

ALM

ACT

RESET

TX

RX

Optical Module


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26


CXIE

24 standard E1/T1 interfaces

Providing a processing capability of 24 E1/T1 IMAs andsupporting pure ATM over E1 mode (UNI mode)

the channels for inter-working between CIPS and CRPS(Small capacity BSC)

Boards introduction

CXIE is responsible for:


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27


IMA

1#E1

2#E1

n#E1 ...

IMAChip

IMAChip

E1InterfaceModule

IMA ProcessingModule

IMAProcessing

Module

E1InterfaceModule

High-rate ATM flow High-rate ATM flow

Boards introduction

IMA: Inverse Multiplexing on ATM


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CXIE Appearance

To BTS

Boards introduction

To BTS

To BTS


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CBIE

32 standard E1/T1 interfaces

Providing a processing capability of 32 E1/T1 IMAs andsupporting pure ATM over E1 mode (UNI mode)

the channels for inter-working between CIPS and CRPS

(Small capacity BSC)

Boards introduction

CBIE is responsible for:

Supporting Fractional ATM function


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CBIE Appearance

To BTS

Boards introduction

To BTS

J18

RUN

ALM

ACT

CLK1

E1/T1

CLK2

E1/T1

E1/T1

E1/T1

S14S12

S13

S11

S10

S6

S5

S15

S16

S9

S8

S7

S17

J19 J18

J21

To BTS

To BTS


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CFMR

Selection/Distribution

BTS1 BTS2

Power control

ServiceFrame

ServiceFrame

Frame protocolprocessing

Frame protocolprocessing

Best Frame

Multiplexing/Demultiplexing

LAC SAR

LAC PDU

TRAU frame RLP

CSPU CEVC CPPU

Boards introduction


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CFMR AppearanceBoards introduction


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CEVC

Supports three types of coding: EVRC, QCELP8K andQCELP13K

Perform ISLP rate adaptation for circuit data services

below 64Kbps

Checks and inserts DTMF signals

Provides the echo cancellation functionbetween BSC & MSC (CEVD could not support this )

Boards introduction


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CIWFBoards introduction

Asynchronous data processing

Facsimile G3 processing

Analog facsimile processing


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CLAP

Process the A1/A2 signaling (Layer2)

Measure, maintain and troubleshoot the A1/A2 signaling

Boards introduction


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CSPU

Process the upper-layer signaling including: Um interface

Abis interface A1/A2 interface A3 interface A7 interface A9 interface

Boards introduction


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CAIE

Provide 32 E1/T1 interfaces

Clock extraction

Boards introduction


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CAIE Appearance

S5 S4 S9 S8

S6

S7

S11

S12S15S18

S3 S2 S16 S17 S10 S13

J18

RUN

ALM

ACT

CLK1

E1/T1

CLK2

E1/T1

E1/T1

E1/T1

To GCKP

MSC

Boards introduction


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Voice Traffic Flow in CIPS

CXIE CFMR CMUX CEVC CAIE

ATM Bus

Extended TDM Bus

TDM Bus

Functions


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1X & DO Packet Traffic Flow in CIPSFunctions

CMUXCXIE CFMR

ATM Bus

CBTSCRPS


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CEVCCIWF

Circuit Data Traffic Flow in CIPSFunctions

CXIE CFMR CMUX

To CBTS

CAIE

ATM Bus

Expand TDM Bus

TDM BUS


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Voice Signaling Flow in CIPS

CXIE CFMR CSPU CMUX CAIE

ATM BUS

Expand TDM Bus

TDM BUS

CLAP

Out-band signaling

Functions

In-band signaling


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1X & DO Packet signaling Flow in CIPSFunctions

CXIE CFMR CSPU

ATM Bus

Outbandsignaling

To CRPS

Inband signaling

To CBTS

CMUX


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Circuit signaling Flow in CIPS

CXIE CFMR CSPU

ATM Bus

Out-band signaling

In-band signaling

To CBTS

Functions

CIWF

CLAP

CAIECMUX

ATM Bus

Expand TDM Bus

TDM BUS

Contents


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Contents

Overview

CSWS

CIPS

CRPS

Clock System

Windup


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Provide periodicaltime synchronization

Packet dataservice processing

Functional Diagram of CRPS

Provide A3/A7/A13

physical interface

Resourcemanagement

From CIPS

From original CIPS

To CIPSFrom CLKM

To PDSN

To target CIPS

CRPS


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Boards Position in CRPS

CX

IE

CB

PU

CR

MU

CR

MU

CP

CU

CP

CU

CH

AC

CM

UX

CM

UX

CH

AC

CB

PU

CP

PU

CP

PU

CX

IE

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

CRPS

CMUX


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CMUX

Manage & maintain the boards in CRPS

Provide RFN for the system

Note:

The CMUX in the CRPS is the same as the CMUX in the CIPS.

Boards Introduction

CXIE


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CXIE

Provide inter-BSC A3/A7 interface

Offer 24 standard E1s/T1s

Note:

The CXIE boards in CRPS and CIPS are the same

Boards Introduction

CRMU


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CRMU

Note:

The CRMUs hardware structure is the same as that of CSPUs,so the indicator meaning of CRMU are also the same.

Process the A3, A7 and A9 interfaces signaling

Maintenance management and distribution of theA2, A3 and A8 interface resources

Boards Introduction

CPPU


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CPPU

Store and transfer the data packets

Work in load sharing to achieve resourcepool mechanism

Note:

The CPPUs hardware structure is the same as that of CSPUs

The indicator states are also similar to the CSPU indicators.

Boards Introduction

CPCU


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A9

CPCU

Signaling Processing A11

CBPU and PPU Session ID

management

Setup of signaling and trafficconnection

Packet call status maintaining

Note:

The CPCUs hardware structure is the same as that of CSPUs.


Boards Introduction

CBPU


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CBPU

Downlink data buffering, processing and transferring

Note:The CBPUs hardware structure is the same as that of CSPUs.


Work in load sharing mode to achieve resource poolmechanism

Re-sequencing the packet sent from PDSN

(transferred via CHAC)

Boards Introduction

CHAC


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CHAC

Transfer the traffic data (A10 interface) from PDSN to CBPU

Process the traffic data (A8 interface) from CPPU and SDB data

from CPCU, and transfer them to PDSN via the A10 interface

Transfer A11 signaling data from PDSN to CPCU directly

Provide 1000Mb Ethernet interface to PDSN

Boards Introduction

CHAC Appearance


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CHAC Appearance

RUNALM

RESET

O1GIE

TX

RX

SW1

T

R

Boards Introduction

Downlink Data Flow in CRPS


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Downlink Data Flow in CRPS

CHAC CBPU CPPU CMUX

To PDSN To CIPS

ATM Bus

Functions

Uplink Data Flow in CRPS


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Uplink Data Flow in CRPS

CHAC CBPU CPPU CMUX

To PDSN To CIPS

ATM Bus

Functions

Bypass the CBPU

Signaling flow in CRPS


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Signaling flow in CRPS

CHAC CPCU CRMU CMUX

To PDSN To CIPS

ATM Bus

Functions

CPMS


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CPMSFunctions

CDMA Packet Module Subrack provides PCF functions, it accomplishes the:

Connection management, mobility management, charging, shortdata burst & MD5 encryption

Convert A8 interface data to A10 and vice versa

Provides GRE and IP route displacement and forwarding function

Note: If data throughput is less than 40Mb then only CRPS is enough. For more

throughput we need to configure CPMS.

CPMS


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CPMSFunctions

1514131211109876543210

CP

CU

CP

PU

CM

UX

CM

UX

CB

PU

CH

AC

CH

AC

CB

PU

CB

PU

CB

PU

CB

PU

CP

PU

CP

PU

CP

PU

CP

PU

CP

CU

C t t


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Overview

CSWS

CIPS

CRPS

Clock System

Windup

Types of Synchronization


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Types of Synchronization

Transmission Synchronization

Synchronize the transmission between BSC and MSC

Time Synchronization

Synchronize the radio frame number (FN) between BSC and

BTS

Clock system

CLKM


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CLKM

CLKM (CLocK processing Module ) is composed of two parts: GCKP (GPS/GLONASS & ClocK Processing Board )

GCKB (Backplane of CLKM )

ACTCOM IN0 IN1 OUT ANT

CLK_B COM_B ETH_B CLK_A COM_A ETH_A

Panel of GCKB

Panel of GCKP (Active/Standby)

Functions

ACTCOM IN0 IN1 OUT ANT

CLKM

GCKP GCKP


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BSCClock

SystemStructure

CLKC

C

N

E

T

CM

P

U

CSWS

C

LP

CC

B

P

U

C

M

U

X

C

P

P

U

C

P

C

U

C

X

I

E

C

M

U

X

C

B

P

U

C

R

M

U

C

P

P

U

BITS clock source

2MHz circuit clock extracted from A-Interface

CPMS

CRPS

RFN cell

8k 32M

8k 32M

MSC

A1/A2

Abis

PDSN

A10/A11

GCKP GCKP

C

S

P

U

C

M

U

X

C

F

M

R

C

X

I

E

CIPS

RFN pulse

8k 32M

RFN cell

8k

PP16Sabsolute time infomation

C

E

V

C

C

L

A

P

C

A

I

E

BTS

C

H

A

C

C

P

C

U

C

H

A

C

PDSN

A10/A11

A3/A7BSC

Physical Connection


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Physical ConnectionFunctions

RUN ALM ACT COM IN0 IN1 T ES T A NT

TX

RX

ETH

1PPS

COM1

COM2

RUN

ALM

ACT

RESET

7#CMUX

(CRPS/CRMS)

CLK1

CLK2

E1/T1

E1/T1

E1/T1

E1/T1

RUN

ALM

ACT

CAIE

GCKP1

ETH_BCOM_BCLK_B ETH_ACOM_ACLK_A

GCKB

TX

RX

ETH

1PPS

COM1

COM2

RUN

ALM

ACT

RESET

8#CMUX

(CRPS/CRMS)

RUNALMACTCOM IN0 IN1 T ES T AN T

GCKP2

CLK1

CLK2

E1/T1

E1/T1

E1/T1

E1/T1

RUN

ALM

ACT

CAIE

ToGPS/Glonassantenna

Contents


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Contents

Overview

CSWS

CIPS

CRPS

Clock System

Windup

Software Loading Flow


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So wa e oad g ow

BAM

CMUXin CRPS

Other boardsin CRPS

CMUXin CIPS

Other boardsIn CIPS

GCKBIn

CLKM

Windup

CSWS

Voice Signaling Flow


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g gWindup

C

L

P

C

C

N

E

T

C

X

I

E

C

F

M

R

C

M

U

X

C

S

P

U

C

L

A

P

C

A

I

E

C

B

T

S

C

M

S

C

CSWS

CIPS

TDM switching

AAL2 switching

AAL2 termination

TDM bearing

AAL2 bearing

AAL5 bearing

In-bandsignaling SS7

signaling

Abis

A1

In-bandsignaling

MS

Um

Out-bandsignaling

C

R

M

U

C

M

U

X

CRPS

C

X

I

E

Voice Service Flow


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Voice Service FlowWindup

C

X

I

E

C

F

M

R

C

M

U

X

C

E

V

C

C

E

V

C

C

A

I

E

CB

T

S

C

M

S

C

CIPS

TDM switching

AAL2 switching

AAL2 termination

TDM bearing

AAL2 bearing

Abis

A2

MS

Um

Packet Data Signaling Flow


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Packet Data Signaling FlowWindup

CL

P

C

C

X

I

E

C

F

M

R

C

M

U

X

C

S

P

U

C

L

A

P

C

A

I

E

C

B

T

S

CSWS

CIPS

AAL2 switching

AAL2 termination

AAL2 bearing

AAL5 bearing

In-bandsignaling

Out-bandsignaling

CN

E

T

Ethernet bearing

AbisMS

Um

SS7

signaling

C

M

S

CA1

C

X

I

E

C

R

M

U

C

H

A

C

P

D

S

N

CRPS

C

P

C

U

A11

C

M

U

X

TDM switching

TDM bearing

Packet Data Service Flow


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Windup

C

L

P

C

C

X

I

E

C

F

M

R

C

M

U

X

C

E

V

C

C

E

V

C

C

A

I

E

C

B

T

S

CSWS

CIPS

AAL2 switching

AAL2 termination

Ethernet bearing

AAL2 bearing

C

N

E

T

AAL5 bearing

AbisMS

Um

C

PP

U

C

BP

U

CRPS/CPMS

C

HA

C

C

PC

U

P

D

S

N

A10

C

MU

X

Packet Data Service Flow


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Documents

BSC Hardware System (Large Capacity)