DESIGN OF PARALLEL MULTIPLIER USING MODIFIED BOOTH

ALGORITHMBy:

Bipin

VLSI Design

(601161004)

Under the guidance of:Ms. SakshiECEDTU, Patiala

Need Of Multiplier

• Enhancing the processing performance and reducing the power dissipation of the systems are the most important design challenges for multimedia and digital signal processing (DSP) applications, in which multipliers frequently dominate the system’s performance and power dissipation.

Applications Of Multipliers

used commonly in processors like digital signal processes(DSPs) and microprocessors.

digital filter. Multiplication is an essential arithmetic

operation in DSP applications. multimedia applications such as 3D graphics signal processing systemsvideo processing baseband processing for communication

operations.

Classification Of Multipliers

Steps For Multiplication

• Generating partial products.

• Summing up all partial products until only two rows remain.

• Adding the remaining two rows of partial products by using a carry propagation adder.

Methods for Regular Partial Product

• Radix – 2 multiplication multiplier

• Radix – 4 modified booth multiplier

• Higher radix booth multiplier

Comparison of radix 2, radix 4 and radix 8 algorithm

• Problem of isolated 1’s in radix-2 is overcome by radix– 4.

• In radix-8 more number of operations are required to generate {+1,+2, +3, +4, -1, -2, -3, -4}.

• Speed of Radix 8 is highest among Radix 2, 4 and 8 but the complexity increases.

Radix-4 Multiplication

• Irregular structure.• Number of PP are n/2+1.

Regular structure but still n/2+1 PP’s rows.

• PP reduced to n/2 by 2’s complement technique.

• Irregular structure.

• Taking both above technique , result will be regular PP with n/2 PP rows.

Waveforms

Results

8 bit modified booth multiplier

8 bit modified booth multiplier(2’s complement)

16 bit modified booth multiplier

16 bit modified booth multiplier(2’s complement)

Delay (in nsec)

28.06 ns 27.23 ns 52.75ns 49.24ns

Total area(um2)

5446.52 um2 4065.35 um2 18,845.66 um2 16,164.59 um2

Power(in mw)

5.877 mW 4.21mW 26.688mW 22.58mW

Objectives

• To implement multiplication on higher order radix.

• Faster methods must be used to find 2’s complement.

• Some methods can be adopted to reduce power dissipation in recursive modified booth multiplier.

THANKS