BJT-Transistor Analysis

7/25/2019 BJT-Transistor Analysis

1/100

1

BJT transistors

Widely used in amplifier circuits

Formed by junction of 3 materials

npn or pnp structure


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2

pnptransistor


3/100

3

Large current

Operation of npn transistor


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4

Modes of operation of a BJT transistor

Mode BE junction BC junction

cutoff reverse biased reverse biased

linear(active) forward biased reverse biased

saturation forward biased forward biased


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5

ummary of npn transistor be!avior

npn

collector

emitter

base

"B

"#

"$

smallcurrent

large current

%

&B#

'


6/100

6

ummary of pnp transistor be!avior

pnp

collector

emitter

base

"B

"#

"$

smallcurrent

large current

%

&B#

'


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7

ummary of e(uations for a BJT

"#"$

"$) "B

is t!e current gain of t!e transistor *++

&B#) +,-&.npn/

&B#) '+,-&.pnp/


8/100


9/100

9

"nput c!aracteristics

cts as a diode &B#+,-&

"B "B

&B#

+,-&


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10

Output c!aracteristics

"$

"$

&$#

"B) *+

"B) 4+

"B) 3+

"B) 0+

$utoff

region

t a fi5ed "B6 "$is not dependent on &$# lope of output c!aracteristics in linear region is near + .scale e5aggerated/

#arly voltage


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11

Biasing a transistor

We must operate t!e transistor in t!e linear region, transistor7s operating point .8'point/ is defined by

"$6 &$#6 and "B,


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12

small ac signal vbeissuperimposed on t!e 9$ voltage

&B#, "t gives rise to a collector

signal current ic6 superimposed on

t!e dc current "$,

Transconductance

ac input signal

.9$ input signal +,-&/

ac output signal

9$ output signal

"B

T!e slope of t!e ic' vB#curve at t!e

bias point 8 is t!e

transconductance gm: t!e amount of

ac current produced by an ac

voltage,


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13

0,; nalysis of transistor circuits at 9$For all circuits: assume transistor operates in linear region

write B'# voltage loop

write $'# voltage loop

#5ample 0,4

B'# junction acts li$) *+ ' *.0,-/ ) 1,3&


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14

#5ample 0,;

B'# &oltage loop

1 ) "B>B% &B#6 solve for"B

"B ) .1 ' &B#/=>B ) .1',-/=*++< ) +,+03m

"$) "B) .*++/+,+03m ) 0,3m

&$) *+ ' "$>$) *+ ' 0,3.4/ ) *,0&"#

"$

"B

) *++


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15

#5ercise 0,@

) + ' ,- ) '+,-&

"#

"$

"B

) 1+"# ) .' '*+/=># ) .',- %*+/=*+? )

+,A3m

"$"#) +,A3m

"B) "B= = .93m/50 = 18.6

&$) *+ ' "$>$) *+ ' ,A3.1/ ) 1,31&


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16

rob, 0,34 Cse a voltage divider6 >B*and >B4to bias &Bto

avoid two power supplies,

MaB*and >B4form a voltage divider,

ssume " DD "B " ) &$$=.>B*% >B4/

,4m ) A =.>B*% >B4/

E9

&B) &$$>B4=.>B*% >B4/G

3 ) A >B4=.>B*% >B4/G6 olve for >B*and >B4,

>B*) 3+?6 and >B4 ) *1?,


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17

rob, 0,34

Find t!e operating point

Cse t!e T!evenin e(uivalent circuit for t!e base

MaBBis measured wit! voltage sources grounded >BB) >B*HH >B4) 3+? || *1? = , *+?


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18

rob, 0,34

Write B'# loop and $'# loop

B'#loop

$'# loop

B'# loop

&BB) "B>BB% &B#%"#>#

"#)4,+A m$'# loop

&$$) "$>$% &$#%"#>#

&$# )0,@ &

T!is is !ow all 9$ circuits are analyIed

and designed


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19

#5ercise 0,40

.a/ Find &$

6 &B

6 and

6 given: ) *++6 &

) *++&

"#) * m

"B"#=) +,+*m

&B) + ' "B*+? ) '+,*&

) &B' &B# ) '+,* ' +,- ) '+,@&

&$) *+& ' "$@? ) *+ ' *.@/ ) 4&

&B


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20

#5ample 0,@

4'stage amplifier6 *st stage !as

an npn transistorK 4nd stage !as

an pnp transistor,

"$) "B

"$"#

&B#) +,-.npn/) '+,-.pnp/

) *++

Find "$*6 "$46 &$#*6 &$#4

Cse T!evenin circuits,


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21

#5ample 0,@

>BB*) >B*HH>B4) 33?

&BB*) &$$>B4=.>B*%>B4/G

&BB*) *11+?=*1+?G ) 1&

tage * B'# loop

&BB*) "B*>BB*% &B#%"#*>#*

Cse "B*"#*=

1 ) "#*33?= *++ % ,- % "#*3?

"#* ) *,3m

"B*

"#*


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22

#5ample 0,@

$'# loop

neglect "B4 because it is "B4 "$*

"#*

"$*&$$) "$*>$*% &$#*%"#*>#*

*1 ) *,3.1/ % &$#*%*,3.3/

&$#*) 0,@-&


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23

#5ample 0,@

tage 4

B'# loop

"B4

"#4&$$) "#4>#4% B%"B4>BB4 % &BB4

*1 ) "#4.4?/ % ,- %"B4 .1?/% 0,@- % *,3.3/

Cse "B4"#4= , solve for "#4

"#4 ) 4,@m


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24

#5ample 0,@

tage 4

$'# loop

"#4

"$4

&$$) "#4>#4% $4%"$4>$4

*1 ) 4,@.4/ % $4% 4,@.4,-/

solve for $4

&$#4 ) *,@0&


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25

ummary of 9$ problem Bias transistors so t!at t!ey operate in t!e linear region B'

# junction forward biased6 $'# junction reversed biased

Cse &B#) +,- .npn/6"$"#6 "$) "B

>epresent base portion of circuit by t!e T!evenin circuit

Write B'#6 and $'# voltage loops,

For analysis6 solve for "$6 and &$#,

For design6 solve for resistor values ."$ and &$#

specified/,


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26

ummary of npn transistor be!avior

npn

collector

emitter

base"B

"#

"$

small

current

large current

%

&B#

'


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27

0,- Transistor as an amplifier

Transistor circuits are analyIed and designed in terms of 9$

and ac versions of t!e same circuit,

n ac signal is usually superimposed on t!e 9$ circuit,

T!e location of t!e operating point .values of "$ and &$#/ of

t!e transistor affects t!e ac operation of t!e circuit,

T!ere are at least two ac parameters determined from 9$

(uantities,


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28

small ac signal vbeissuperimposed on t!e 9$ voltage

&B#, "t gives rise to a collector

signal current ic6 superimposed on

t!e dc current "$,

Transconductance

ac input signal

.9$ input signal +,-&/

ac output signal

9$ output signal

"B

T!e slope of t!e ic' vB#curve at t!ebias point 8 is t!e

transconductance gm: t!e amount of

ac current produced by an ac

voltage,


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29

Transconductance ) slope at 8 point

gm) dic=dvBE|ic= ICQ

w!ere "$) "e5p.'&B#=&T/'*GK t!e

e(uation for a diode,

Transconductance

ac input signal

9$ input signal .+,-&/

ac output signal

9$ output signal

gm ) "e5p.'&B#=&T/ .*=&T/

gm "$=&T .=&/


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30

ac input resistance *=slope at 8 point

r) dvBE=dib|ic= ICQ

r&T ="B

re&T ="#

ac input resistance of transistor

ac input signal

9$ input signal .+,-&/

ac output signal

9$ output signal

"B


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31

0,@ mall'signal e(uivalent circuit models

ac model ybrid'model T!ey are e(uivalent Wor


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32

teps to analyIe a transistor circuit

* 9$ problem

et ac sources to Iero6 solve for 9$ (uantities6 "$and &$#,

4 9etermine ac (uantities from 9$ parametersFind gm6 r,and re,

3 ac problem

et 9$ sources to Iero6 replace transistor by !ybrid' model6

find ac (uantites6 >in6 >out6 v6 and i,


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33

#5ample 0,A

Find vout=vin6 .) *++/

9$ problem

!ort vi6 determine "$and &$#

B'# voltage loop

3 ) "B>B% &B#

"B) .3 ' ,-/=>B) +,+43m

$'# voltage loop

&$#) *+ ' "$>$

&$# ) *+ ' .4,3/.3/&$# ) 3,*&

8 point: &$# ) 3,*&6 "$)4,3m


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34

#5ample 0,A

ac problem

!ort 9$ sources6 input and output circuits are separate6 only coupled mat!ematically

gm) "$=&T) 4,3m=41m& ) A4m=&

r) &T= "B) 41m&=,+43m ) *,*?

vbe) vir= .*++? % r)] = 0.+**vivout) ' gm vbe>$

vout) ' A4.0.+**vi/3?vout=vi) '3,+0

%

vout

'e

b c%

vbe

'


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35

#5ercise 0,40

Find gm6 r6 and r06 given: ) *++6 &) *++&6"$)* m

gm) "$=&T) * m=41m& ) 0+ m=&

r) &T= "B) 41m&=,+*m ) 4,1?

r+ ) output resistance of transistor

r+ ) *=slope of transistor output c!aracteristics

r+ ) H &H="$) *++?


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36

ummary of transistor analysis

Transistor circuits are analyIed and designed in terms of 9$

and ac versions of t!e same circuit,

n ac signal is usually superimposed on t!e 9$ circuit,

T!e location of t!e operating point .values of "$ and &$#/ of

t!e transistor affects t!e ac operation of t!e circuit,

T!ere are at least two ac parameters determined from 9$

(uantities,


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37

teps to analyIe a transistor circuit

* 9$ nalysis et ac sources to Iero6 solve for 9$ (uantities6 "$

and &$#,

4 9etermine ac (uantities from 9$ parameters

Find gm6 r,and ro,

3 $ nalysis

et 9$ sources to Iero6 replace transistor by !ybrid' model6find ac (uantities6 >in6 >out6 v6 and i,

ro


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38

$ircuit from #5ercise 0,40

"#) * m &$) *+& ' "$@? ) *+ ' *.@/ ) 4&

"B"#=) +,+*m gm) "$=&T) * m=41m& ) 0+ m=&&B) + ' "B*+? ) '+,*& r) &T= "B) 41m&=,+*m ) 4,1?

) &B' &B# ) '+,* ' +,- ) '+,@&

%

&out

'


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39

ac e(uivalent circuit

b

e

c

vbe) .>bHH>pi/= .>bHH>pi/ %>sGvi

vbe) +,1vi

vout) '.gmvbe/HH.>oHH>c HH>L/

vout) '*10vbe

v )vout=vi ) ' --

%

vout

'

Eeglecting>ovout) '.gmvbe/HH.>c HH>L/

v )vout=vi ) ' @+


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40

rob, 0,-;

%&out

'

)*++


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41

rob, 0,-;

%&out

'

.a/ Find >in

>in) >pi) &T="B ) .41m&/*++=,* ) 4,1?

.c/ Find >out

>out) >c) 0-?

>in >out

.b/ Find v) vout=vin

vout ) ' ib >cvin ) ib .> %>pi/

v) vout=vin ) ' ib >c= ib .> %>pi ) ' >c=.> %>pi/ ) ' 100.0-?/=.*++? %4,1?/ ) ' 37.6

) ib

b

e

c

ib


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42

0,A 2rap!ical analysis

"nput circuit

B'# voltage loop

&BB) "B>B%&B#

"B) .&BB' &B#/=>B


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43

2rap!ical construction of "Band &B#

"B) .&BB' &B#/=>B

"f &B# ) +6 "B) &BB=>B

"f "B ) +6 &B#) &BB

&BB=>B


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44

Load line

Output circuit

$'# voltage loop

&$$) "$>$%&$#

"$) .&$$' &$#/=>$


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45

2rap!ical construction of "$and &$#

&$$=>$

"$) .&$$' &$#/=>$

"f &$# ) +6 "$) &$$=>$

"f "$ ) +6 &$#) &$$


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46

2rap!ical analysis

"nput

signal Output

signal


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47

Load'line results in bias point QAw!ic! is too close to V

CCand t!us limits t!e

positive swing of vCE

,

Load'line B results in an operating point too close to t!e saturation region6 t!us

limiting t!e negative swing of vCE

,

Bias point location effects


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48

0,** Basic single'stage BJT amplifier

configurations

We will study 3 types of BJT amplifiers

CE - common emitter,used for &6 i6 and general purpose

CE with RE' common emitter with RE6same as $# but more stable

CC common collector, used for i6 low output resistance6

used as an output stage

$B common base .not covered/


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49

$ommon emitter amplifier



50/100

50

$ommon emitter amplifier

>in >out

%

&out

'

Rin

.9oes not include source/

>in )>pi

Rout

.9oes not include load/

>out )>$

AV

) &out=&in

&out) ' ib>$&in) ib.>s% >pi/

& ) ' >$= .>s% >pi/

Ai

) iout=iin

iout

) ' ib

iin) ib

i ) '

ib iout


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51

$ommon emitter wit! >#amplifier



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52

$ommon emitter wit! >#amplifier

>in >out

%

&out

'

Rin

>in )&=ib

&) ib >pi % .ib% ib/>#

>in ) >pi % .*% />#

.usually large/

Rout

>out )>$

AV

) &out=&in

&out) ' ib>$

&in) ib >s % ib >pi % .ib% ib/>#

& ) ' >$= .>s% >pi% .*% />#/.less t!an $#6 but less sensitive to variations/

Ai

) iout=iin

iout) ' ibiin) ib

i ) '

ib

iout

ib% ib

%

&

'


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53

$ommon collector .emitter follower/ amplifier

b c

e%

vout

'

.voutat emitter/ ac e(uivalent circuit


54/100

54

$ommon collector amplifier

>in

%

vout

'

Rin

>in )&=ib

&) ib >pi % .ib% ib/>L

>in ) >pi % .*% />L

AV

) vout=vs

vout) .ib % ib/>L

vs) ib >s % ib >pi % .ib% ib/>L

& ) .*% )>L= .>s% >pi% .*% />L/.always */

ib

ib% ib

%

&

'


55/100

55

$ommon collector amplifier

>out

%

vout

'

Rout

.don7t include >L6 set &s ) +/

>out ) vout=' .ib% ib/vout) 'ib >pi % 'ib>s

>out ) .>pi % >s/= .*% ) .usually low/

Ai

) iout=iin

iout) ib % ibiin) ib

i ) + 1

ib

ib% ib

rob 0 @0


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56

rob, 0,@0

%

vout

'

) 1+

ac

circuit

$# wit! >#

amp6 because >#

is in ac circuit

2iven

>pi)&T="B

) 41m&.1+/=,4m

) ;,41?


57/100

57

rob, 0,@0

.a/ Find >in

>in )&=ib

&) ib >pi % .ib%ib/>#>in ) >pi % .*%/>#

>in ) ;,41?% .*%50/*41>in *4,;4?

>in

%

&

'

ib

ib% ib


58/100

58

rob, 0,@0

.b/ Find &) vout=vs

vout) ' ib.>$HH>L/

vs

) ib

>s

% ib

>pi

% .ib

%ib

/>#

& ) ' .>$HH>L/= .>s% >pi% .*%/>#/

& ) ' 50 .*+?HH*+?/=.*+? % ;,41?i% .*%50/*41/& ' 11

ib

ib% ib

%

vout

'

ib


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59

rob, 0,@0

.c/ "f vbeis limited to 1m&6 w!at is t!e largest signal at input and outputN

vbe) ib >pi) 1m&

ib) vbe =>pi) 1m&=;,41? ) +,@ .ac value/

vs) ib >s % ib >pi % .ib%ib/>#vs) .+,@/*+? % .+,@/ ;,41? % .+,@ % .50)+,@ /*41vs*@m&

ib

ib% ib

%

vout

'

%

vbe

'


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60

rob, 0,@0

.c/ "f vbeis limited to 1m&6 w!at is t!e largest signal at input and outputN

vout) vs &

vout) *-,0m&.'**/

vout'*A*m& .ac value/

ib

ib% ib

%

vout

'

%

vbe

'


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61

rob, 0,-A

Csing t!is circuit6 design an ampwit!:

"#) 4m

&) '@

current in voltage divider " ) +,4m

.$# amp because ># is not in ac circuit/

) *++

&oltage divider&cc=" ) A=+,4m ) 01?

01? ) >*% >4

$!oose &B*=3 &cc to put operating point near t!ecenter of t!e transistor c!aracteristics

>4=.>*% >4/ ) 3&

$ombining gives6 >*) 3+?6 >4) *1?


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62

rob, 0,-A

) *++Find ># .input circuit/Cse T!evenin e(uivalent

B'# loop

&BB)"B>BB%&B#%"#>#

using "B"#=># ) &BB ' &B#' ."#=/>BBG="#

># ) 3' ,- ' .4m=100/*+?G=4m

># ) *,+1?

%

&B# '

"#

"B


63/100

63

rob, 0,-A

Find >c .ac circuit/

>pi ) &T="B) 41m&.*++/=4m ) *,41?>o ) &="$) *++=4m ) 1+?

v ) vout=vin

vout) 'gmvbe .>oHH>cHH>L/

vbe) *+?HH*,4? = *+?% *+?HH*,4?Gvi

v ) 'gm.>oHH>cHH>L/.*+?HH*,4?/ = *+?HH*,4? %>sG

et v ) '@6 and solve for >c6 >c 4?

%vout

'


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64

$# amplifier


65/100

65

$# amplifier

v '*4,4


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66

FOC>"#> $OMOE#ET OF T>E"#ET >#OE# &.EP+++A/

9$ $OMOE#ET ) '*,44;+-0#'+*

>MOE"$ F>#8C#E$Q FOC>"#> EO>ML"R#9 # EO>ML"R#9 EO .R/ $OMOE#ET $OMOE#ET .9#2/ # .9#2/

* *,+++#%+3 *,1@*#%++ *,+++#%++ '*,-A1#%+4 +,+++#%++

4 4,+++#%+3 *,AA4#'+* *,4;+#'+* A,***#%+* 4,-+;#%+4

3 3,+++#%+3 4,*-*#'+4 *,3-0#'+4 '*,--@#%+4 *,;;@#%++

0 0,+++#%+3 3,3-;#'+3 4,*3;#'+3 '*,00*#%+4 3,133#%+*

TOTL >MOE"$ 9"TO>T"OE ) *,4;-0-@#%+* #>$#ET

$# amplifier


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67

$# amplifier wit! >#


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68

$# amplifier wit! >#

v ' -,1


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69

FOC>"#> $OMOE#ET OF T>E"#ET >#OE# &.EP+++A/

9$ $OMOE#ET ) '*,3131;@#'+4

>MOE"$ F>#8C#E$Q FOC>"#> EO>ML"R#9 # EO>ML"R#9

EO .R/ $OMOE#ET $OMOE#ET .9#2/ # .9#2/

* *,+++#%+3 -,@-A#'+* *,+++#%++ '*,-A0#%+4 +,+++#%++

4 4,+++#%+3 *,;+0#'+4 4,+3;#'+4 A,0++#%+* 4,-30#%+4

3 3,+++#%+3 1,4*+#'+3 ;,;*4#'+3 '*,3@A#%+4 0,+1;#%+*

0 0,+++#%+3 3,@40#'+3 0,@10#'+3 '*,*-*#%+4 ;,43*#%+*

TOTL >MOE"$ 9"TO>T"OE ) 4,*A0@@4#%++ #>$#ET


70/100

70

ummary

Av !"

$# '*4,4 *4,-S

$# w=># .># ) *++/ '-,1 4,*AS


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71

rob, 0,@3

%

vout

'

4 stage amplifier .a/ Find "$and &$of eac! transistor Bot! stages are t!e same .same for eac! stage/ $apacitively coupled

) *++

RL=2K

>c);,@?


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72

rob, 0,@3

.a/ Find "$and &$of eac! transistor

.same for eac! stage/

B'# voltage loop

&BB) "B>BB% &B#% "#>#

w!ere >BB) >*HH>4) 34?

&BB) &$$>4=.>*%>4/ ) 0,@&6 and

"B"#=

"#)&BB' &B# G=>BB=% >#G

"#) +,A-m

&$) &$$' "$>$&$) *1 ' ,A-.;,@/

&$) @,3A&

%

&$

'


73/100

73

rob, 0,@3

b c

e

%

vout

'

.b/ find ac circuit

b c

e

>BB) >*HH>4) *++?HH0-? ) 34?>pi ) &T="B) 41m&.*++/=,A-m 4,;?gm) "$=&T) ,A-m=41m& 3Am=&

RL=2K


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74

rob, 0,@3

b c

e

%

vout

'

.c/ find >in*>in* ) >BBHH>pi

) 34?HH4,;?

) 4,0?

b c

e>in*

.d/ find >in4>in4 ) >BBHH>pi

) 4,0?

>in4

find vb*=vi) >in*=>in* % >G

) 4,0?=4,0? % 1?G

) +,34

%

vb*

'

find vb4=vb*

vb4) 'gmvbe*>$HH>BBHH>piG

vb4=vbe*) 'gm>$HH>BBHH>piG

vb4=vb*) '.3Am=&/;,@HH34?HH4,;?G

) ';A,*

%

vb4

'

RL=2K


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75

rob, 0,@3

b c

e

%

vout

'

.e/ find vout=vb4vout) 'gmvbe4>$HH>LG

vout=vbe4) 'gm>$HH>LG

vb4=vb*) '.3Am=&/;,@?HH4?G

) ';+,3

b c

e

.f/ find overall voltage gainvout=vi) .vb*=vi/ .vb4=vb*/ .vout=vb4/

vout=vi) .+,34/ .';A,*/ .';+,3/

vout=vi) *334

%

vb*

'

%

vb4

'

RL=2K

b 0 A;


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76

rob, 0,A;

Find "#*6 "#46 &B*6 and &B4

"#4) 4m

"#*) "4+% "B4

"#*) "4+% "#4=4"#*) 4+ % *+"#*) 3+

"#* "#4

8* !as 1) 4+

84 !as 2) 4++8*

84"B4


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77

rob, 0,A;

Find &B*6 and &B4Cse T!evenin e(uivalent

&B*) &BB*' "B*.>BB4/

) 0,1 ' .3+=4+/1++?

) 3,@&

&B4) &B*' &B#

) 3,@& ' +,-

) 3,*&

8* !as 1) 4+

84 !as 2) 4++

"B4%

vB*

'

%

vB4

'

"B*

rob 0 A;


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78

rob, 0,A;

.b/ find vout=vb4

vout) .ib4% 2ib4/>Lvb4) .ib4% 2ib4/>L % ib4>pi4

vout=vb4) .* % 4/>L=.* % 4/>L % >pi4G ) .* % 200/*?=.* % 200/*?% 4,1?G +,A@@

b*

e*

c*

b4

e4

c4

%

vout

'

%

vB4

'

>pi4) &T="B4 ) &T4="#4 ) 41m&.4++/=4m

) 4,1?

rob 0 A;


79/100

79

rob, 0,A;

.b/ find >in4 ) vb4=ib4

vb4) .ib4% 2ib4/>L % ib4>pi4

>in4 ) vb4=ib4) .* % 2/>L % >p ) .* % 200/*? % 4,1? 4+0?

b*

e*

c*

b4

e4

c4%

vB4

'>in4

rob 0 A;


80/100

80

rob, 0,A;

.c/ find >in* ) >BB*HH.vb*=ib*/

) >BB*HH ib*>pi* %.ib*% 1ib*/>in4G=ib*) >BB*HH >pi* %.*% 1/>in4G6w!ere >pi*) &T*="#*) 41m&.4+/=3+ ) *;,-?) 1++?HH*;,-? %.*% 20/4+0?G1++?

b*

e*

c*

b4

e4

c4

%

vB*

'>in*

iB*

rob 0 A;


81/100

81

rob, 0,A;

.c/ find ve*=vb*

ve*) .ib*% 1ib*/>in4vb*) .ib*% 1ib*/>in4 % ib*>pi*

ve*=vb*) .* % */ >in4 =.* % */ >in4 % >pi*G ) .* % 20/4+0?=.* % 20/4+0?% *;,-?G +,AA;

b*

e*

c*

b4

e4

c4

%

ve*

'

iB*%

vB*

'

rob 0 A;


82/100

82

rob, 0,A;

.d/ find vb*=vivb*=vi) >in*=>% >in*G

) +,@4

b*

e*

c*

b4

e4

c4

%

vb*

'

.e/ find overall voltage gainvout=vi) .vb*=vi/ .ve*=vb*/ .vout=ve*/

vout=vi) .+,@4/ .+,AA/ .+,AA/

vout=vi) +,@*


83/100

83

.rob, 0,A;/ &oltage outputs at eac! stage

Output of

stage 4

Output of

stage *

"nput

.rob 0 A;/ $urrent


84/100

84

.rob, 0,A;/ $urrent

"nput

current"nput to

stage 4 .ib4/

. b 0 A;/ $ t


85/100

85

.rob, 0,A;/ $urrent

output

current

"nput to

stage 4 .ib4/

.rob 0 A;/ $ rrent


86/100

86

.rob, 0,A;/ $urrent

output

current

"nput to

stage 4 .ib4/#n$ut

current


87/100

87

.rob, 0,A;/ ower and current gain

"nput current ) .&i/=>in) *=1++? ) 4,+

output current) .&out/=>L) .+,@*&/=*?) +,@*m

current gain ) +,@*m= 4,+ ) 0+1

"nput power ) .&i/ .&i/=>in) * 5 *=1++? ) 4,+W

output power ) .&out/ .&out/=>L) .+,@*&/ .+,@*&/=*?) ;1;W

power gain ) ;1;W=4W ) 34A

B% &ut$ut Characteristics


88/100

88

$

lot "c vs, &ce for multiple values of &ce and "b

From nalysismenu use 9$ weep CseEested sweepin 9$ weepsection

'robe B% &ut$ut Characteristics


89/100

89

* >esult of probe

4 dd plot .plot menu/ 'D dd trace .trace menu/ 'D "$.8*/

3 9elete plot .plot menu/

B% &ut$ut Characteristics current ain


90/100

90

"b ) 1.#ac! plot *+ difference/

at &ce ) 0&6 and "b ) 01) @m=01 ) *-@

B% &ut$ut Characteristics transistor

out$ut resistance


91/100

91

out$ut resistance

"b ) 1

.#ac! plot *+ difference/

>o ) *=slope

t "b ) 016*=slope ) .@,+ ' *,;/&=.@,1 ' -,@/m

>out ) A,*?

CE Am$lifier Measurements with *$ice


92/100

92

>in >out


93/100

93

#n$ut Resistance Measurement +sin *'#CE

>eplace source6 &s and >s wit! &in6 measure

>in ) &in="in

9o not c!ange 9$ problem: cap ) H*=$H, For $ ) *++F6 = 1?I6 >cap ) *=4.*?/.*++#';/ *,;

&in s!ould !ave a small value so operating point does not c!ange

&in *m&

Rin Measurement


94/100

94

Transientanalysis

'robe results


95/100

95

".$4/

>in ) *m&=4+0n ) 0,A?

& t t R i t M t + i *'#CE


96/100

96

&ut$ut Resistance Measurement +sin *'#CE

>eplace load6 >L wit! &in6 measure >in ) &in="in

et &s ) +

9o not c!ange 9$ problem: cap ) H*=$H, For $ ) *++F6 = 1?I6 >cap ) *=4.*?/.*++#';/ *,;

&in s!ould !ave a small value so operating point does not c!ange

&in *m&

Rout Measurement


97/100

97

Transientanalysis

'robe results


98/100

98

'".$*/

>out ) *m&=***n

) A?

'".$*/ is current in &in flowing out of % terminal

"C 'ower measurements


99/100

99

ower delivered by % *+ sources:

.*+/.@-4/ % .*+/.@--/ ) @,-4mW % @,--mW ) *-,0mW

ac 'ower Measurements of oad


100/100

instantaneous

power

average

power

&out

&in

Documents

BJT-Transistor Analysis