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Confidential © ams AG
Bip AK München 2016
E. SeebacherA. Steinmair
2016-11-25
Confidential © ams AGPage 2
Simulation of Process Variability Introduction
Unavoidable statistical fluctuation in the silicon process Design of products needs to take the variability into account. IC design is extensively dependent on the simulation and models Implementation of variability in Compact models. Corner models support during process/device development
Definition of parameter Spec based on statistical data Generation of Corner Models
November 22, 2016 © austriamicrosystems AG
Correlated Statistical SPICE Models for High-Voltage LDMOS Transistors based on TCAD
Cooperation ams and TUW
Ehrenfried Seebacher
Confidential © ams AGPage 4
TCAD Simulations of Statistical Process Variationsfor High-Voltage LDMOS Transistors
Parameter Variability for:RON, VT, IDSAT, Gamma
7- 8 critical process variables as input parameter Responsible for the variability of the electrical parameters
Input and Output parameter
Output Parameter: VTlargVTshort, RON, IDSAT, Gamma
Input Parameter
SX….. Substrate resistivityDN_DOSE…. DN DotierungDPOVERLAY…. DP variation under activeSNOVERLAY…. SN variation under activePADOX_VTH…. Screening oxide thickness
during VT implant VT_Imp….. VT implant doseTOX…… OXIDE thickness for thin oxide
•time consuming method of 3^8=6561 full factorial combinations
Central Composite Face - centered (CCF) design was chosen
PROCESS VARIATION AWARE TCADSIMULATION
CCF Method:• For n parameters this method
consists of 2n full factorial simulations of the min/max combinations,
• 2n axial points of the screening analysis, and one simulation for the center point.
In sum this leads to 273 (143) variations in 8 (7) parametersfor each, minimum and long channel length device.
R. Plasun, “Optimization of VLSI semiconductor devices,”Dissertation, Technische Universit¨at Wien, 1999,http://www.iue.tuwien.ac.at/phd/plasun.
Input Parameters (N & PLDMOS)
SX 18 20 22
DN_DOSE 4.05E+012 4.10E+012 4.15E+012
DPOverlay(SPOverlay)
-0.1 0 0.1
SNOverlay -0.1 0 0.1
PADOX_VthM 0.1 10.05 20
Vt_2p7e12 2.65E+012 2.70E+012 2.75E+012
TOXTH -2 0 2
- 143 (7 PV for HV-PMOS) and - 272 (8 PV for HV-NMOS) - Full Process and Device Simulations
SX….. Substrate resistivityDN_DOSE…. DN DotierungDPOVERLAY…. DP variation under activeSNOVERLAY…. SN variation under activePADOX_VTH…. Screening oxide thickness during VT implant VT_Imp….. VT implant doseTOX…… OXIDE thickness for thin oxide
Confidential © ams AGPage 8
Extracted Data based on process and device simulationResulting Input and Output Parameter (142 PMOS, 272 NMOS)
Measurements v. TCAD
?
Data GenerationTCAD Process & device simulations (sprocess & Minimos-NT)
Quadratic fitting (all PV versus electrical data)
Data analysis
• Random 10000 PV-set generation by considering inline PV distributions• Electrical parameter calculation from the quadratic formula
model each electrical outputparameter y as a quadratic model functionof the based input parameters x by a least square fit of A, b, and c for all design points i of their simulated output parameters yi.
PLDMOS (20/0.6): Vthlin and Vthlin-fit
0 50 100 1500.5
0.52
0.54
0.56
0.58
0.6
0.62
0.64
0.66
0.68
count
vthl
in, v
tlin-
fit
0 50 100 150-0.025
-0.02
-0.015
-0.01
-0.005
0
0.005
0.01
0.015
0.02
count
vthl
in -
vthl
in-fi
t
PLDMOS (20/0.6): Ron and Vthlin correlation
0.5 0.55 0.6 0.65 0.711
11.5
12
12.5
13
13.5
14
14.5
15
15.5
16
vthlin
Ron
0.5 0.55 0.6 0.65 0.711
11.5
12
12.5
13
13.5
14
14.5
15
15.5
16
vthlin-fit
Ron
-fit
PLDMOS (20/0.6): Ron and Vthlin correlation PLDMOS (20/0.6): 7 PV distributions (10000 random values)
16 18 20 22 240
50
100
150
200
250
300
350
SX
n
4 4.05 4.1 4.15 4.2x 1012
0
50
100
150
200
250
300
350
400
DN dose
n
-0.2 -0.1 0 0.1 0.20
50
100
150
200
250
300
350
DP overlay
n
-0.2 -0.1 0 0.1 0.20
50
100
150
200
250
300
350
SN overlay
n
-10 0 10 20 300
50
100
150
200
250
300
350
Pad Ox
n
2.6 2.65 2.7 2.75 2.8x 1012
0
50
100
150
200
250
300
350
Vt implant
n
11 12 13 14 150
50
100
150
200
250
300
350
Ron random
n
0.5 0.55 0.6 0.65 0.70
50
100
150
200
250
300
350
400
vthlin random
n
PLDMOS (20/0.6): Ron and Vthlin distribution
Summary of PV TCAD SimulationSimulation Flow with resulting PV and Correlation (Cij Covariance Matrix)
Si SPICE parameter under investigation, Si0 mean value, N(0,ơi),N(0, ơj) mean-free normal distributions, Sj correlated parameters, Cij correlation coefficients S sensitivity matrix indicating the sensitivity of the underlying
compact model equations.
GENERATION OF STATISTICALSPICE MODELS WITH MONTE CARLO
Electrical (MAP) Parameter and corresponding SPICE Parameter
Process variable HiSIM_HV parameter
Oxide Thickness TOX
Large threshold VFBC, NSUBC
Small threshold VFBC, NSUBP
Body factor NSUBC
Saturation current MUEPH1, VMAX, RDVD
On-resistance RD, RDVD, RD23
Leakage current VFBC
Benchmark MC v. TCAD
•PV of N- and P- channel LDMOS transistors has been investigated by means of simulations•Process and device simulations were performed by the SYNOPSYS tools and MINIMOS-NT•Statistical data analysis with quadratic parameter optimization•Benchmarked versus electrical process monitoring parameters from large silicon database•TCAD based statistical SPICE models were successfully Implemented•Deviations between TCAD and final simulation results (SPICE model) are in the few per cent range.
Summary
Confidential © ams AG
Thank you
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