BI-DIRCTIONAL ACDC CONVERTER BASED ON NEUTRAL POINT CLAMPED

Bor-Ren Lin, IEEE Member, Der-Jan Chen and Hui-Ru Tsay Power Electronics Research Laboratory

Department of Electrical Engineering, National Yunlin University of Science and Technology Touliu City, Yunlin 640, Taiwan, ROC; Email:linbr@pine.yuntech.edu.tw

ABSTRACT A single-phase bi-directional AC/DC converter

based on neutral point diode clamped configuration is proposed to draw a clean sinusoidal line current with nearly unity input power factor and to achieve DC bus voltage regulation. Based on the neutral point diode clamped scheme, the voltage stressof the power devices is clamped to half DC bus voltage instead of full DC link voltage in the conventional half and full bridge PWM rectifier. The line current command tracking, voltage regulation and balanced neutral point voltage are performed by the inner loop current controller, the outer loop voltage controller and voltage balance compensator, respectively. To generate a three-level PWM pattem on the AC terminal of the AC/DC converter, a region detector of the mains voltage is employed. The effectiveness of the proposed control scheme is confirmed by the experimental results.

1. INTRODUCTION The nonlinear loads such as diode or

phase-controlled rectifiers for the switching mode power supplies or front-end stage of AC/DC/AC converter for inverter drives have caused.serious power pollution in the transmission or distribution system. The power pollution such as reactive power and current harmonics results in low power factor, line voltage distortion, heating of core of transformer and electrical machines, and increasing losses in the transmission and distribution line. The passive filters are usually used to filter low order current harmonics. But the drawbacks of passive filters are bulky components, fixed compensated characteristics, sensitive to the line impedance, and series and parallel resonance with the system. Active current shaping techniques are altemative approach to reduce current harmonics and reactive power compensation. Power factor corrector [ 1-61 and active power filter [7-101 are proposed to solve the harmonics elimination and reactive power compensation. Power factor corrector is used as a front-end stage of the equipment to draw a clean sinusoidal line current with low total harmonic distortion. Active power filter is employed in the environment of many nonlinear loads to achieve reactive power compensation and current harmonics elimination. The control schemes of the single-phase [ 1-31 and three-phase [4-61 AC/DC converters have been proposed to draw a nearly sinusoidal line current. For low

power applications, a diode rectifier followed by a DC/DC converter is employed to achieve a unity power factor. The drawback of this scheme is unidirectional power flow when the converter is used in the front stage of the motor drive. Full-bridge PWM AC/DC converter has capability of bi-directional power flow. But four and six power switches are used in the single-phase and three-phase AC/DC converter, respectively. Single-phase half-bridge PWM AC/DC converter employs two power switches to achieve double boost conversion in the DC bus. But the drawback of this scheme is high voltage stress of the power switches. For high voltage or high current applications, power devices with high voltage or high current stress are generally required in the conventional PWM AC/DC converters. The series or parallel connections of power semiconductors can achieve high voltage or high current applications. Multilevel scheme provides a greater number of advantages over the conventional schemes especially for high power or medium voltage applications [ 11-15]. The advantages of multilevel converters over the two-level converters are improved voltage waveform on the AC side, smaller filter size, lower switching losses, lower electromagnetic interference and lower acoustic noise. However, this scheme can be easily applied to medium and low power applications.

Single-phase bi-directional power flow AC/DC converter based on neutral point diode clamped configuration is proposed to reduce the line current harmonics and reactive power. Six power switches are used in the adopted converter. Power devices Tl-T2’ as shown in Fig. 3 has a voltage stress of half DC link voltage and the voltage stress of devices T3 and T3’ is equal to DC link voltage. Three voltage levels are generated on the AC terminal of the converter on each half cycle of mains voltage. The line current, DC link voltage and neutral point voltage are controlled by the inner loop current controller, outer loop voltage controller and neutral point voltage compensator, respectively. To verify the validity of the proposed control strategy, the experimental results are provided and discussed.

2. SYSTEM DESCRIPTION Fig. 1 shows a conventional two-level half-bridge

PWM AC/DC converter and a bipolar voltage waveform on the AC side. The voltage stress of the power devices is

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equal to DC link voltage. The full-bridge AC/DC converter is shown in Fig. 2. Power switches are controlled to generate a two-level unipolar voltage waveform on the AC side in each half cycle of line Frequency. In the positive mains voltage, voltage levels vo and 0 are generated. On the other hand, voltage levels -vo and 0 are achieved in the negative half cycle. Since the multilevel voltage approaches the sinusoidal signal closer than the two-level voltage waveform. A three-level PWM AC/DC converter with bi-directional power flow capability as shown in Fig. 3 is employed to draw a sinusoidal line current. The power stage of the adopted AC/DC converter is constructed by six power switches, two clamped diodes and two capacitors on the DC link. The neutral point voltage on the DC-link is controlled by power switches to adjust the neutral point current io. If the average neutral point current io,,, is zero, the neutral point voltage is equal to half DC-link voltage, i.e. v,=v2=vJ2. By the appropriate control, five different voltage levels, vo, vd2, 0, -vJ2, -vo, are generated on the voltage v,b. The voltage stress of power switch T3 and T3 ' is v, and power switches TI , T2, TI ' and T2' have a voltage rating of vJ2 which is a lower cost device.

vJ2

-vJ2

(b) Fig. 1 Conventional half-bridge PWM AC/DC converter (a) circuit configuration (b) voltage waveform on the AC side.

3. OPERATION PRINCIPLE Features of the adopted bi-directional AC/DC

converter are current harmonics elimination; DC link voltage regulation and neutral point voltage compensation. To achieve the above purposes, power devices of the adopted converter are switched on or off according to the line current error and the sign of mains voltage. The voltage v,b waveform generated by the converter depends on the switching states of the power switches. Some constraints of power switches are defined so as to avoid the power switches in each converter leg conducting at the same time

where Ti=l if switch Ti is on, or Ti=O if switch Ti+Ti'=I, (1)

is off,

i=l , 2, 3. The equivalent switching function in each converter leg is defined as

1 if T1 and T 2 are turned on

0 if Tl'and T2 are turned on , (2) - 1 if TI' and T2' are turned on

I I I

( 4

u u (b)

Fig. 2 Conventional full-bridge PWM AC/DC converter (a) circuit configuration (b) voltage waveform on the AC side.

(b) Fig. 3 Proposed three-level PWM AC/DC .converter (a) circuit configuration (b) voltage waveform on the AC side.

'Table 1 Valid switching states and the corresponding voltage v,b.

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1 -1 if T3’is tumedon ‘

if T3 is tumed on (3)

The voltage v,b generated by the rectifier can be expressed as

The relationships between the equivalent switching functions g, and gb and the voltages v,, and vbo are illustrated as

‘ah = ‘ U , - ‘bo . (4)

Substituting (5) and (6) into (4), voltage v,h is given as

If two capacitor voltages vi and v2 are equal, i.e. AFO, then there are five different voltage levels, v,, vJ2, 0, -vJ2, -vo, on the voltage. Vab. The valid swtching states of power switches and the corresponding voltage on the AC side of converter are shown in Table 1. There are six valid switching states in the adopted converter. Two switching states of power switches generate voltage v,b=o. The operation modes of the’adopted AC/DC converter and the corresponding equivalent circuits are shown in Fig. 4.

. .

‘ Y

I (e) (0 Fig. 4 Operation modes of the adopted rectifier (a) mode 1

(b) mode 2 (c) mode 3 (d) mode 4 (e) mode 5 (f) mode 6.

Mode 1 [g,=I, &=-I, v,b=v,]: Power switches TI , T2 and T3’ are tumed on in this mode to achieve voltage v,b=v,. Positive (or negative) line current will charge (or discharge) both capacitor voltages vl and v2. Line current is controlled to decrease since the boost inductor voltage is negative. Mode 2 [g,=o, &=-I, vab=vd2]: Power switches TI I, T2 and T3 ’ are tumed on to generate voltage level v7 on the AC side of the converter. Capacitor voltage v2 is charged (or discharged) by the positive (or negative) line current. Capacitor voltage v, is discharged by the load current in this operation mode. The line current is linearly increasing or decreasing if the voltage vs>v2 or vs<v7. Mode 3 [go=-], &=-I, v,b=o]: Voltage v,b equals zero in this operation mode. Power devices TI ’, T2’ and T3’ are tumed on in this mode. The boost inductor voltage is equal to v,. Both capacitors are discharged by the load current. Line current is increasing or decreasing according to the sign of mains voltage. Mode 4 [gu=l, &=I, v,b=o]: AC side voltage of the converter equals zero in this operation mode. Power switches TI, T2 and T3 are tumed on. Load current discharges capacitor voltages on the DC link. Line current is increasing or decreasing according to the sign of mains voltage.

equals -vi in this operation mode. Power devices TI ’, T2 and T3 are tumed on. The boost inductor voltage is equal to vs+vl. Capacitor voltage vI is charged (or discharged) by the negative (or positive) line current. The line current is increasing (or decreasing) if the mains voltage greater (or less) than -vl. Mode 6 [g,=-I, gb=I, vab=-v,]: In this mode, power switches TI ’, T2 ’ and T3 are tumed on to achieve voltage vub=-v,. Negative (or positive) line current will charge (or discharge) both capacitor voltages vi and v2. Line current is controlled to increasing since the boost inductor voltage is positive.

In the positive or negative mains voltage, power switch T3 ’ or T3 is tumed on, respectively. Voltage vbo is equal to -v2 (or vl) in the positive (or negative) half cycle of the mains voltage. In the positive half cycle, power switches TI and T2 are tumed on to generate voltage v,b=vI+v2 (mode 1) and to decrease the line current. In this case, the line current charges both DC-link capacitors. Power switches TI ’, T2 and T3 ’ are tumed on to generate v,b=v2 (mode 2). In this mode, line current will compensate voltage v2. The line current is increasing or decreasing if the mains voltage is greater or less than capacitor voltage v2. If power switches TI ’=T2’=T3’=1 (mode 3) or TI=T2=T3=I (mode 4), the voltage v,b is shorted and line current is linearly increasing. In this positive half cycle, three voltage levels, v,, vd2, 0, are

Mode 5 [ga=o, V,b=-Vd2]: AC side Voltage Vab

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generated. During the negative half cycle of mains voltage, the converter produces another three voltage levels, 0, -vd2, -vo, on the AC terminal of the converter. Power switch T3 is tumed on in this half cycle and voltage vbo=v/. Mode 4, mode 5, and mode 6 are employed to achieve voltage v,b=O, -vd2 and -vo, respectively (assumed vI=v2=vo/2). From the above analysis, one can obtain that the switching frequency of power switches T3 and T3 ’ is equal to the line frequency. The AC side voltage equation of the adopted converter can be expressed as

= A X + B v , , x where

r

1 - L 0 , B = 0

r _ _

di, v, = ri, + L- + vub .

dt According to (7), (8) can be derived as

v3 = ri, + dis L - + L v o g -gb +“AV. g2-ggb2 (9) dt 2 2 12

I !

I 2

ngion 2

region ! -vo 12

TI

If the capacitor voltages on the DC side are equal, (9 ) can be further described by

TZ

TI ’ T2’

T3

T3

If power switches are considered idea, there is no power loss and energy storage during the instantaneous commutation. The instantaneous power at the AC side and DC side of the converter are equal.

According to (7), the currents i, and i2 on the DC side based on ( 1 1) can be given as

vu& = vlil - v2i2 . (1 1 )

’06

Fig. 5 Operation region and the corresponding switch gating signals.

4. CONTROL STRATEGY The features of the proposed control scheme are

drawing a clean sinusoidal line current with low current distortion, achieving a unity displacement power factor, regulating the DC link voltage, and compensating the neutral point voltage. To generate a three-level voltage waveform on the AC side of the converter, two operation regions of mains voltage during one cycle of the input line frequency are defined. In the first region, the line voltage is greater then -vJ2 and less than vJ2. Voltage levels 0 and vJ2 (or -vJ2) are generated on the voltage vab in the positive (or negative) mains voltage. In the second region, the absolute value of the mains voltage is less than the DC bus voltage. Voltage levels v, and vJ2 (or -vo and -vJ2) are achieved in the positive (or negative) half cycle of the mains voltage.- These operation regions and the corresponding PWM voltage waveforms are shown in Fig. 5 and Table 2. There is one high voltage level and one low voltage level in each operation region. In the positive half cycle of mains voltage, power switch T3’ is tumed on. Power devices TI ’ and T2’ (or T2) are tumed on to generate voltage V&=O (or vJ2) in the first region. On the other way power devices T2 and TI (or TI ’) are tumed on

L L The neutral point current io can be expressed in terms of the switching functions g,, and gb.

where gu=l, 0, - 1 , and gb=l, - 1. To further obtain a general control law for the neutral point current, the DC side currents are given as

(14) . . io = -1, - z2 = -(gz - gi) i , = (I - g,2)is

dvl v1 + v2 il = C-+-

dt R ’

Substituting (1 5) and ( 1 6 ) into (1 4), one obtains

This equation gives

( 1 8) A v = ( v ~ - ~ , ) = - - J 5 ~ d t + k . 1 .

C The neutral point current io can be used to compensate the capacitor voltage unbalance problem. Based on (9), (1 5) and (16), the state equations in the matrix form of the adopted AC/DC converter are expressed as

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to achieve voltage v,,b=vo (vJ2) in the second operation region. Three voltage levels vo, vJ2 and 0 are generated on the AC side voltage v,b. For the negative mains voltage,, power switch T3 is tumed on. Operation mode 4 and mode 5 are employed to obtain voltage v,b=o and -vd2 in the first region. In the second region, mode 5 and mode 6 are adopted to achieve voltage levels -vo/2 and -vo on the AC side of the converter. Fig. 6 shows the block diagram of the adopted ACIDC converter. The voltage controller, line current controller and voltage compensator are employed to achieve DC link voltage regulation, line current tracking and neutral point voltage compensation. A proportional - integral (PI) voltage controller is employed in the outer loop control to maintain the constant DC link voltage. The line current command is derived from the multiplication of the output of PI controller and the unit sinusoidal wave. The phase-locked loop circuit generates a unit sinusoidal wave in phase with mains voltag6. The line current command is in phase with the mains voltage. The mains only supplies the converter loss and the real power required on the DC load. The voltage variation between two capacitors is added to the line current command so as to balance the neutral point voltage. The sensed line current is compared with the reference line current. The current error is sent to the current controller to track the source current command.

Region

High Level Low Level

v..

Fig. 6 Control block diagram of the adopted ACIDC converter.

1 2 v,>o v,<o v,>o v,<o v012 0 V O - v012

0 - v d 2 vd2 - v ,

In the proposed control scheme, three control signals kl-k3 are employed to generate three-level voltage waveform on the AC terminal of the converter. These three control signals are

Region

High Level Low Level

k l = { 0, if v, > 0 I, i fv , < o '

1 2 v,>o v,<o v,>o v,<o v012 0 V O - v012

0 - v d 2 vd2 - v ,

0, i f - v o 1 2 < v , < v o 1 2 I, i fv , < - v 0 / 2 o r v , > v o 1 2 ' (22)

1 1

0, if Ai, > h 1, ifAi, <-h'

1 0 1 -1 1 1 I -yo 1 1 I o 1 1 I -VI

(23)

According to three control signals, the equivalent switching functions go and gb are generated based on the look-up table 3. For example, if the ( k l , k2, k3)=(0, 0, 0), i.e. positive mains voltage, first operation region and line current error Ai,>h, then voltage v,b=O is generate to

increase the line current. Similarly switching functions can be achieved if three control signals are given. The actual switching signals of power switches are expressed as followings

Table 3 Control strategy of the adopted three-level PWM

5. EXPERIMENTAL RESULTS To demonstrate the effectiveness of the proposed,

control algorithm of the adopted ACIDC converter, the experimental results are presented. The capacitance of two capacitors is 2200pF. The mains voltage is IIOV, and source frequency is 60Hz. The boost inductance is 3mH. The DC-link voltage of the converter is 200V. The current hysteresis band is OSA. Fig. 7 shows the measured waveforms of adopted bi-directional converter for the rectification operation. The is a three-level voltage pattem on the voltage v,b. The line current is in phase with the mains voltage. The line current is nearly sinusoidal wave with unity power factor. The power factor is close to 0.99 and total harmonic distortion of line current is about 4.2% based on the simulated results. For the regeneration operation of the converter, Fig. 8 shows the measured results. The line current is 180" out of phase with the mains voltage. Fig. 9 shows the capacitor voltage on the DC link. The voltage variation between two capacitor voltages is below 5V based on the measured result.

6. CONCLUSION This paper presents a simple control algorithm for

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the three-level PWM AC/DC converter. The proposed control scheme is based on a look-up table instead of the conventional complex control algorithm. The high power factor, low current distortion, and stable capacitor voltages are implemented from the experimental results. The advantages of the adopted three-level PWM converter instead of two-level PWM converter are implementing high voltage application by using low voltage stress devices and reducing the voltage harmonic contents.

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[3] BOYS, J.T., and GREEN, A.W.: ‘Current-forced single-phase reversible .rectifier’, IEE Proc. B, 1989, 136, (5) , pp.

[4] WU, R., DEWAN, S.B., and SLEMON, G.R.: ‘A PWM AC-DC converter with fixed switching frequency’, IEEE Trans., 1990, IA-26, (9, pp. 880-886

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[6] ZARGARI, N.R., and JOOS, G.: ‘A three-phase current-source type PWM rectifier with feed-forward compensation of input displacement factor’. PESC-94, LEEE power electronics specialists conference; 1994, pp. 363-368

[7] GRADY, W.M.,.SAMOTYJ, M.J., and NYOLA, A.H.: . ‘Suvey of active power line conditioning methodoloBes’,

IEEE Trans. 1990, PD-5, (3), pp. 1536-1542 [8] AKAGI, H., NABAE, A., and ATOH, S.: ‘Control strategy of

active power filters using multiple voltage-source -pwm converters’, IEEE Trans. 1986, IA-22, (3), pp. 460-465

[9] PENG, F.Z.:. ‘Application. issues of active power filters’, IEEE Industry Applications magazine, 1998, (9, pp. 21-30

[ I O ] . MORAN, L., WERLINGER, P., DIXON, J., and WALLACE, R.: ‘A Series Active Power, Filter Which Compensates Current Harmonics and Voltage Unbalance Simultaneously’, IEEE Power Electronics Specialists Conference, PESC’95, 1995, pp.222-226

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[I31 B. S. Suh, and D. S. Hyun, “A New N-Level High Voltage Inversion System’, IEEE Trans. on Industria1 Applications,

[I41 J. R. Pinheiro, D. L. Vidor, and H. A. Grundling, “Dual Output Three-Level Boost . Power Factor Correction Converter with Unbalanced Loads”, IEEE Power Electronics Specialists Conference Record, pp. 733-739, 1996.

pp. 532-539

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vx

[I51 J. S. Lai, and F. Z. Peng, “Multilevel Converters - A New Breed of Power Converters”, IEEE Trans. on Industrial Applications, vol. 32, pp. 509-551, 1996.

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. . . . . . . . . . . . . . . . . . . . . . - . . . : I . .

. . _ : _ . ; . . . . . . . . . ; i : : : . . . . . ; . . T i ; : . . . ; . . . . ; : : . . . . . . I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 .s

‘ob

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Fig. 7 Measured waves of the adopted converter operated in the rectification mode.

: : : : . . . . . . . . . . . i i : : ; . : : : , . . . . . . . . . , . j . . . . i : . . . . . . . . . . , , I . . . . . . . . . . .

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Fig. 8 Measured waves of the adopted, converter operated in the regeneration mode.

. . . . . . . . : : . . . i . ; . . . . . . . . . . . . . . . . . . . . . . . i i ; : j . . .

I , , a ” ” . . I I , . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.;. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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Fig. 9 Measured voltage variation between two capacitor voltages.

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