BCC-35 A.K. Bhattacharyya, A. Butterworth, F. Dubouchet, J. Molendijk, T. Mastoridis, J. Noirjean(reporter), S. Rey, D. Stellfeld, D. Valuch, P.Baudrenghien

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3 Each Klystron driving one or more cavities has its own electronic system (one VME crate) in phase with its RF signal reference

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BCC-35 A.K. Bhattacharyya, A. Butterworth, F. Dubouchet, J. Molendijk, T. Mastoridis, J. Noirjean(reporter), S. Rey, D. Stellfeld, D. Valuch, P.Baudrenghien J.Noirjean / LLRF Cavity controller Servo loops Reference line Clocks Distributor module Tuner Loop module Cavity Loop module Switch and Limit module J.Noirjean / 3 Each Klystron driving one or more cavities has its own electronic system (one VME crate) in phase with its RF signal reference J.Noirjean / Tuner Loop keeps the structure on resonance J.Noirjean / RF Feedback and Feedforward keep the accelerating voltage at the desired value in the presence of beam transient J.Noirjean / Klystron Drive Limiter prevents driving the klystron over the saturation limit during loop transients J.Noirjean / Klystron Polar Loop compensates the variation gain across klystron/circulator and phase shift caused by High Voltage (HV) supply fluctuations and droop J.Noirjean / Designer D.Valuch Some coupler properties -Coupling ~30 dB -Output RF level ~20 dBm J.Noirjean / Concept J.Molendijk,Designer J.Noirjean/J.Lolleriou -Generates harmonically related clocks for the Digital Demodulators -We have different versions for different systems (SPS TWC800MHz, SPS TWC 200MHz, Linac4) LO Phase noise = 167 fs jitter(= 0.02 degree) J.Noirjean / Designer J.Noirjean Main electronics components: -Xilinx Virtex-5 -ADI SHARC DSP, 400 MHz -2 x 72 Mbit SRAM -4 x Dual ADI ADC, 125 MSPS, 14 bit -2 x SerDes transceivres, 1.5 GBps -Dual DAC, 125 MSPS, 14 bits -8 x RF Front-end channels, ENOB bits J.Noirjean / Tuner Loop control acts on: -The tuner position -The phase shifter (communication over Ethernet) J.Noirjean / Tuner Loop control acts on: -The tuner position -The phase shifter (communication over Ethernet) Courtesy:N.Schwerg J.Noirjean / Designer G.Hagmann -Module being designed for SPS 800MHz -Will be adapted for Linac4: Low latency digital chips(ADCs,and DACs) Redesigned analog filters J.Noirjean / Cavity loop acts on: -The RF drive to regulate the field in the cavities -The phaseshifter to balance the hybrid, compensating for its asymmetry J.Noirjean / Cavity loop acts on: -The RF drive to regulate the field in the cavities -The phaseshifter to balance the hybrid, compensating for its asymmetry Courtesy:N.Schwerg J.Noirjean / Desiger G.Hagmann -Prevents from driving the klystron in saturation -Entry point for the High power RF interlock -Adapted from SPS TWC 800MHz system for Linac4 purposes Thank you for your attention J.Noirjean /